m68k: ColdFire mcf5441x, add eSDHC support

PATCH New Angelo Dureghello 1 participant 1 message Aug 5, 2018 m68k architecture

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Angelo Dureghello

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2018-08-05 10:45 UTC #0 lore raw

PATCH 1/1 m68k: ColdFire mcf5441x, add eSDHC support

This patch adds mcf5441x eSDHC support for the mcf5441x family.

Signed-off-by Angelo Dureghello <[email protected]>

---
 arch/m68k/cpu/mcf5445x/cpu_init.c   | 10 ++++++++++
 arch/m68k/cpu/mcf5445x/speed.c      |  2 ++
 arch/m68k/include/asm/global_data.h |  3 +++
 3 files changed, 15 insertions(+)

arch/m68k/cpu/mcf5445x/cpu_init.c +10 -0

index 0b86020204..7632d9262c 100644
@@ -173,6 +173,15 @@ void cpu_init_f(void)
 
 	/* Lowest slew rate for UART0,1,2 */
 	out_8(&gpio->srcr_uart, 0x00);
+
+#ifdef CONFIG_FSL_ESDHC
+	/* eSDHC pin as faster speed */
+	out_8(&gpio->srcr_sdhc, 0x03);
+
+	/* All esdhc pins as SD */
+	out_8(&gpio->par_sdhch, 0xff);
+	out_8(&gpio->par_sdhcl, 0xff);
+#endif
 #endif		/* CONFIG_MCF5441x */
 
 #ifdef CONFIG_MCF5445x

@@ -534,4 +543,5 @@ void cfspi_release_bus(uint bus, uint cs)
 		clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
 #endif
 }
+
 #endif

arch/m68k/cpu/mcf5445x/speed.c +2 -0

index 5214730a0f..e15e32ebde 100644
@@ -120,6 +120,8 @@ void setup_5441x_clocks(void)
 	temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1;
 	gd->bus_clk = vco / temp;	/* bus clock */
 
+	temp = ((pdr & PLL_DR_OUTDIV3_BITS) >> 10) + 1;
+	gd->arch.sdhc_clk = vco / temp;
 }
 #endif

arch/m68k/include/asm/global_data.h +3 -0

index aa0be8191a..188055e9d3 100644
@@ -18,6 +18,9 @@ struct arch_global_data {
 	unsigned long vco_clk;
 	unsigned long flb_clk;
 #endif
+#ifdef CONFIG_MCF5441x
+	unsigned long sdhc_clk;
+#endif
 };
 
 #include <asm-generic/global_data.h>

Signature · 1 line

2.18.0