i2c-mux: pca954x: support pca9646 i2c switch

index 4debc03957..ab8b4000af 100644
@@ -17,7 +17,8 @@ DECLARE_GLOBAL_DATA_PTR;
 enum pca_type {
 	PCA9544,
 	PCA9547,
-	PCA9548
+	PCA9548,
+	PCA9646
 };
 
 struct chip_desc {

@@ -51,6 +52,11 @@ static const struct chip_desc chips[] = {
 		.muxtype = pca954x_isswi,
 		.width = 8,
 	},
+	[PCA9646] = {
+		.enable = 0x0,
+		.muxtype = pca954x_isswi,
+		.width = 4,
+	},
 };
 
 static int pca954x_deselect(struct udevice *mux, struct udevice *bus,

@@ -86,6 +92,7 @@ static const struct udevice_id pca954x_ids[] = {
 	{ .compatible = "nxp,pca9544", .data = PCA9544 },
 	{ .compatible = "nxp,pca9547", .data = PCA9547 },
 	{ .compatible = "nxp,pca9548", .data = PCA9548 },
+	{ .compatible = "nxp,pca9646", .data = PCA9646 },
 	{ }
 };
 

index ff07ca34aa..6c343072fb 100644
@@ -261,8 +261,14 @@ static int bus_i2c_write(struct udevice *bus, u32 chip, u8 *buf, int len)
 }
 
 
+u32 __weak imx_get_i2cclk(u32 i2c_num)
+{
+	return 0;
+}
+
 static int bus_i2c_set_bus_speed(struct udevice *bus, int speed)
 {
+	struct imx_lpi2c_bus *i2c_bus = dev_get_priv(bus);
 	struct imx_lpi2c_reg *regs;
 	u32 val;
 	u32 preescale = 0, best_pre = 0, clkhi = 0;

@@ -273,9 +279,18 @@ static int bus_i2c_set_bus_speed(struct udevice *bus, int speed)
 	int i;
 
 	regs = (struct imx_lpi2c_reg *)devfdt_get_addr(bus);
-	clock_rate = imx_get_i2cclk(bus->seq);
-	if (!clock_rate)
-		return -EPERM;
+
+	if (IS_ENABLED(CONFIG_CLK)) {
+		clock_rate = clk_get_rate(&i2c_bus->per_clk);
+		if (clock_rate <= 0) {
+			dev_err(bus, "Failed to get i2c clk: %d\n", clock_rate);
+			return clock_rate;
+		}
+	} else {
+		clock_rate = imx_get_i2cclk(bus->seq);
+		if (!clock_rate)
+			return -EPERM;
+	}
 
 	mode = (readl(&regs->mcr) & LPI2C_MCR_MEN_MASK) >> LPI2C_MCR_MEN_SHIFT;
 	/* disable master mode */

@@ -417,6 +432,11 @@ static int imx_lpi2c_set_bus_speed(struct udevice *bus, unsigned int speed)
 	return bus_i2c_set_bus_speed(bus, speed);
 }
 
+__weak int enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
+{
+	return 0;
+}
+
 static int imx_lpi2c_probe(struct udevice *bus)
 {
 	struct imx_lpi2c_bus *i2c_bus = dev_get_priv(bus);

@@ -440,10 +460,23 @@ static int imx_lpi2c_probe(struct udevice *bus)
 		return ret;
 	}
 
-	/* To i.MX7ULP, only i2c4-7 can be handled by A7 core */
-	ret = enable_i2c_clk(1, bus->seq);
-	if (ret < 0)
-		return ret;
+	if (IS_ENABLED(CONFIG_CLK)) {
+		ret = clk_get_by_name(bus, "per", &i2c_bus->per_clk);
+		if (ret) {
+			dev_err(bus, "Failed to get per clk\n");
+			return ret;
+		}
+		ret = clk_enable(&i2c_bus->per_clk);
+		if (ret) {
+			dev_err(bus, "Failed to enable per clk\n");
+			return ret;
+		}
+	} else {
+		/* To i.MX7ULP, only i2c4-7 can be handled by A7 core */
+		ret = enable_i2c_clk(1, bus->seq);
+		if (ret < 0)
+			return ret;
+	}
 
 	ret = bus_i2c_init(bus, 100000);
 	if (ret < 0)

index 3fbb40bdd1..2700e5f876 100644
@@ -8,6 +8,8 @@
 #ifndef __IMX_LPI2C_H__
 #define __IMX_LPI2C_H__
 
+#include <clk.h>
+
 struct imx_lpi2c_bus {
 	int index;
 	ulong base;

@@ -15,6 +17,7 @@ struct imx_lpi2c_bus {
 	int speed;
 	struct i2c_pads_info *pads_info;
 	struct udevice *bus;
+	struct clk per_clk;
 };
 
 struct imx_lpi2c_reg {