Add support for the Turris Mox router
Subsystems (9)
v2 cover Add support for the Turris Mox router
This adds preliminary support for the Turris Mox SOHO router developed by CZ.NIC to mainline kernel.
The differences from previous version of these patches:
The 1st patch should also change some devicetree bindings Documentation. Previously I only used the code change from the original patches from linux-marvell.
I also corrected the name of the commit as Andrew pointed out I should.
In the 2nd patch, which adds support for the Moxtet bus, I added code to check if a driver for the subdevice has it's it_table NULL. If so, the driver can be specifier only via device tree.
The 3rd patch, which adds support for GPIOs over Moxtet bus, I made the code more generic, so that it does not only support the current SFP cage module, but, in the future, maybe others.
In the 7th patch only a typo in commit name was changed.
Marek
PATCH v2 1/7 pinctrl: armada-37xx: Correct mpp definitions
From: Ken Ma <[email protected]>
This patch icorrects below mpp definitions:
- The sdio_sb group is composed of 6 pins and not 5;
- The rgmii group contains pins mpp2[17:6] and not mpp2[19:6];
- Pin of group "pmic0" is mpp1[6] but not mpp1[16];
- Pin of group "pmic1" is mpp1[7] but not mpp1[17];
- A new group "smi" is added in A0 with 2 pins - mpp2[19:18], its bitmask is bit4;
- Group "pcie1" has 3 pins in A0 - mpp2[5:3], its bit mask is bit5 | bit9 | bit10 but not bit4;
- Group "ptp" has 3 pins in A0 as Z1, but its bitmask is changed to bit11 | bit12 | bit13.
Reviewed-on: http://vgitil04.il.marvell.com:8080/41830
Reviewed-on: http://vgitil04.il.marvell.com:8080/42774
Reviewed-on: http://vgitil04.il.marvell.com:8080/41970
Reviewed-on: http://vgitil04.il.marvell.com:8080/42775
Verified-Armada37x0: Wilson Ding <[email protected]>
--- .../bindings/pinctrl/marvell,armada-37xx-pinctrl.txt | 14 +++++++++----- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 9 +++++---- 2 files changed, 14 insertions(+), 9 deletions(-)
Documentation/devicetree/bindings/pinctrl/marvell,armada-37xx-pinctrl.txt +9 -5
@@ -58,11 +58,11 @@ group pwm3 - functions pwm, gpio group pmic1 - - pin 17 + - pin 7 - functions pmic, gpio group pmic0 - - pin 16 + - pin 6 - functions pmic, gpio group i2c2
@@ -112,17 +112,21 @@ group usb2_drvvbus1 - functions drvbus, gpio group sdio_sb - - pins 60-64 + - pins 60-65 - functions sdio, gpio group rgmii - - pins 42-55 + - pins 42-53 - functions mii, gpio group pcie1 - - pins 39-40 + - pins 39-41 - functions pcie, gpio +group smi + - pins 54-55 + - functions smi, gpio + group ptp - pins 56-58 - functions ptp, gpio
drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +5 -4
@@ -157,8 +157,8 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {PIN_GRP_GPIO ("pwm1" ,12 ,1 ,BIT (4 ),"pwm" ),PIN_GRP_GPIO ("pwm2" ,13 ,1 ,BIT (5 ),"pwm" ),PIN_GRP_GPIO ("pwm3" ,14 ,1 ,BIT (6 ),"pwm" ), -PIN_GRP_GPIO ("pmic1" ,17 ,1 ,BIT (7 ),"pmic" ), -PIN_GRP_GPIO ("pmic0" ,16 ,1 ,BIT (8 ),"pmic" ), +PIN_GRP_GPIO ("pmic1" ,7 ,1 ,BIT (7 ),"pmic" ), +PIN_GRP_GPIO ("pmic0" ,6 ,1 ,BIT (8 ),"pmic" ),PIN_GRP_GPIO ("i2c2" ,2 ,2 ,BIT (9 ),"i2c" ),PIN_GRP_GPIO ("i2c1" ,0 ,2 ,BIT (10 ),"i2c" ), PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
@@ -182,8 +182,9 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {PIN_GRP_GPIO ("usb2_drvvbus1" ,1 ,1 ,BIT (1 ),"drvbus" ),PIN_GRP_GPIO ("sdio_sb" ,24 ,6 ,BIT (2 ),"sdio" ),PIN_GRP_GPIO ("rgmii" ,6 ,12 ,BIT (3 ),"mii" ), -PIN_GRP_GPIO ("pcie1" ,3 ,2 ,BIT (4 ),"pcie" ), -PIN_GRP_GPIO ("ptp" ,20 ,3 ,BIT (5 ),"ptp" ), +PIN_GRP_GPIO ("smi" ,18 ,2 ,BIT (4 ),"smi" ), +PIN_GRP_GPIO ("pcie1" ,3 ,3 ,BIT (5 ) |BIT (9 ) |BIT (10 ),"pcie" ), +PIN_GRP_GPIO ("ptp" ,20 ,3 ,BIT (11 ) |BIT (12 ) |BIT (13 ),"ptp" ),PIN_GRP ("ptp_clk" ,21 ,1 ,BIT (6 ),"ptp" ,"mii" ),PIN_GRP ("ptp_trig" ,22 ,1 ,BIT (7 ),"ptp" ,"mii" ), PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
Signature · 1 line
2.16.4
PATCH v2 2/7 drivers: mfd: Add support for Moxtet bus
In reply to Marek BehúnOn the Turris Mox router there can be connected different modules to the main CPU board, currently a module with a SFP cage, a module with MiniPCIe connector, a 4-port switch module and a 8-port switch module, for example:
[CPU]-[PCIe]-[8-port switch]-[8-port switch]-[SFP]
Each of this modules has an input and output shift register, and these are connected via SPI to CPU board.
Via this SPI connection we are able to discover which modules are connected and we can also read/write some configuration to the modules. Fromi/to each module 8 bits can be read (of which lower 4 bits identify the module) and written.
For example from the module with a SFP cage we can read the LOS, TX-FAULT and MOD-DEF0 signals, while we can write TX-DISABLE and RATE-SELECT signals.
Other modules may support something else.
This driver creates a new bus type, called "moxtet". For each Mox module it finds via SPI, it creates a new device on the moxtet bus so that drivers can be written for them, for example a gpio driver for the module with a SFP cage.
The topology of how Mox modules are connected can then be read by listing /sys/bus/moxtet/devices.
--- Documentation/devicetree/bindings/mfd/moxtet.txt | 36 ++ MAINTAINERS | 7 + drivers/mfd/Kconfig | 10 + drivers/mfd/Makefile | 1 + drivers/mfd/moxtet.c | 501 +++++++++++++++++++++++ include/linux/mfd/moxtet.h | 103 +++++ 6 files changed, 658 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/moxtet.txt create mode 100644 drivers/mfd/moxtet.c create mode 100644 include/linux/mfd/moxtet.h
Documentation/devicetree/bindings/mfd/moxtet.txt new file +36 -0
@@ -0,0 +1,36 @@ +Turris Mox module configuration bus (over SPI) + +Required properties: + - compatible : Should be "cznic,moxtet". + - #address-cells : Has to be 1 + - #size-cells : Has to be 0 +For other required and optional properties of SPI slave +nodes please refer to ../spi/spi-bus.txt. + +Required properties of subnodes: + - reg : Should be position on the Moxtet bus + - moxtet,id : Should be ID of the Moxtet device connected + +The driver finds the devices connected to the bus by itself, but it may be +needed to reference some of them from other parts of the device tree. In that +case the devices can be defined as subnodes of the moxtet node. + +Example: + + moxtet at 1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cznic,moxtet"; + reg = <1>; + spi-max-frequency = <1000000>; + spi-cpol; + spi-cpha; + + moxtet_sfp: moxtet-sfp at 0 { + compatible = "cznic,moxtet-sfp"; + gpio-controller; + #gpio-cells; + reg = <0>; + moxtet,id = <1>; + } + };
MAINTAINERS +7 -0
@@ -1378,6 +1378,13 @@ F: drivers/clocksource/timer-prima2.c F: drivers/clocksource/timer-atlas7.c N: [^a-z]sirf +ARM/CZ.NIC TURRIS MOX SUPPORT +M: Marek Behun <[email protected]> +W: http://mox.turris.cz +S: Maintained +F: include/mfd/moxtet.h +F: drivers/mfd/moxtet.c + ARM/EBSA110 MACHINE SUPPORT M: Russell King <[email protected]> L: linux-arm-kernel at lists.infradead.org (moderated for non-subscribers)
drivers/mfd/Kconfig +10 -0
@@ -784,6 +784,16 @@ config MFD_MAX8998 additional drivers must be enabled in order to use the functionality of the device. +config MFD_MOXTET + tristate "CZ.NIC Turris Mox module configuration bus" + depends on SPI_MASTER && OF + help + Say yes here to add support for the module configuration bus found + on CZ.NIC's Turris Mox. This is needed for the ability to read + in what order the modules are connected and to get/set some of + their settings. For example the GPIOs on Mox SFP module are + configured through this bus. + config MFD_MT6397 tristate "MediaTek MT6397 PMIC Support" select MFD_CORE
drivers/mfd/Makefile +1 -0
@@ -147,6 +147,7 @@ max8925-objs := max8925-core.o max8925-i2c.o obj-$(CONFIG_MFD_MAX8925) += max8925.o obj-$(CONFIG_MFD_MAX8997) += max8997.o max8997-irq.o obj-$(CONFIG_MFD_MAX8998) += max8998.o max8998-irq.o +obj-$(CONFIG_MFD_MOXTET) += moxtet.o pcf50633-objs := pcf50633-core.o pcf50633-irq.o obj-$(CONFIG_MFD_PCF50633) += pcf50633.o
drivers/mfd/moxtet.c new file +501 -0
501 lines not on this page · raw message
include/linux/mfd/moxtet.h new file +103 -0
103 lines not on this page · raw message
Signature · 1 line
2.16.4
PATCH v2 3/7 drivers: gpio: Add support for GPIOs over Moxtet bus
In reply to Marek BehúnThis adds support for interpreting the input and output bits of one device on Moxtet bus as GPIOs.
This is needed for example by the SFP cage module of Turris Mox.
--- .../devicetree/bindings/gpio/gpio-moxtet.txt | 31 +++ MAINTAINERS | 1 + drivers/gpio/Kconfig | 9 + drivers/gpio/Makefile | 5 +- drivers/gpio/gpio-moxtet.c | 209 +++++++++++++++++++++ 5 files changed, 253 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-moxtet.txt create mode 100644 drivers/gpio/gpio-moxtet.c
Documentation/devicetree/bindings/gpio/gpio-moxtet.txt new file +31 -0
@@ -0,0 +1,31 @@ +Turris Mox Moxtet GPIO expander + +Required properties: + - compatible : Should be "cznic,moxtet-gpio". + - gpio-controller : Marks the device node as a GPIO controller. + - #gpio-cells : Should be two. For consumer use see gpio.txt. + - moxtet,input-mask : Bitmask. Those bits which correspond to input GPIOs + when read from Moxtet bus should be set here. + For example if bit 0 and bit 3 are input GPIO bits, + this should be set to 0x9. + Since there are only 4 input bits, 0xf is max value. + - moxtet,output-mask : Bitmask. Those bits which correspond to output GPIOs + when written to Moxtet bus should be set here. + For example if bit 1 and bit 6 are output GPIO bits, + this should be set to 0x41. + Since there are at most 8 output bits, 0xff is max + value. +Other properties are required for a moxtet bus device, please refer to +Documentation/devicetree/bindings/mfd/moxtet.txt. + +Example: + + moxtet_sfp: moxtet-sfp at 0 { + compatible = "cznic,moxtet-gpio"; + gpio-controller; + #gpio-cells; + reg = <0>; + moxtet,id = <1>; + moxtet,input-mask = <0x7>; + moxtet,output-mask = <0x3>; + }
MAINTAINERS +1 -0
@@ -1383,6 +1383,7 @@ M: Marek Behun <[email protected]> W: http://mox.turris.cz S: Maintained F: include/mfd/moxtet.h +F: drivers/gpio/gpio-moxtet.c F: drivers/mfd/moxtet.c ARM/EBSA110 MACHINE SUPPORT
drivers/gpio/Kconfig +9 -0
@@ -1048,6 +1048,15 @@ config GPIO_MAX77620 driver also provides interrupt support for each of the gpios. Say yes here to enable the max77620 to be used as gpio controller. +config GPIO_MOXTET + tristate "Turris Mox Moxtet bus GPIO expander" + depends on MFD_MOXTET + help + Say yes here if you are building for the Turris Mox router. + This is the driver needed for configuring the GPIOs via the Moxtet + bus. For example the Mox module with SFP cage needs this driver + so that phylink can use corresponding GPIOs. + config GPIO_MSIC bool "Intel MSIC mixed signal gpio support" depends on (X86 || COMPILE_TEST) && MFD_INTEL_MSIC
drivers/gpio/Makefile +3 -2
@@ -84,7 +84,8 @@ obj-$(CONFIG_GPIO_MC33880) += gpio-mc33880.o obj-$(CONFIG_GPIO_MC9S08DZ60) += gpio-mc9s08dz60.o obj-$(CONFIG_GPIO_ML_IOH) += gpio-ml-ioh.o obj-$(CONFIG_GPIO_MM_LANTIQ) += gpio-mm-lantiq.o -obj-$(CONFIG_GPIO_MOCKUP) += gpio-mockup.o +obj-$(CONFIG_GPIO_MOCKUP) += gpio-mockup.o +obj-$(CONFIG_GPIO_MOXTET) += gpio-moxtet.o obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc5200.o obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o
@@ -100,7 +101,7 @@ obj-$(CONFIG_GPIO_PCI_IDIO_16) += gpio-pci-idio-16.o obj-$(CONFIG_GPIO_PCIE_IDIO_24) += gpio-pcie-idio-24.o obj-$(CONFIG_GPIO_PISOSR) += gpio-pisosr.o obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o -obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o +obj-$(CONFIG_GPIO_PMIC_EIC_SPRD)+= gpio-pmic-eic-sprd.o obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
drivers/gpio/gpio-moxtet.c new file +209 -0
209 lines not on this page · raw message
Signature · 1 line
2.16.4
Andrew Lunn
maintainerPATCH v2 3/7 drivers: gpio: Add support for GPIOs over Moxtet bus
Quoted 15 lines
drivers/gpio/Makefile +2
-1@@ -84,7 +84,8 @@ obj-$(CONFIG_GPIO_MC33880) += gpio-mc33880.o obj-$(CONFIG_GPIO_MC9S08DZ60) += gpio-mc9s08dz60.o obj-$(CONFIG_GPIO_ML_IOH) += gpio-ml-ioh.o obj-$(CONFIG_GPIO_MM_LANTIQ) += gpio-mm-lantiq.o -obj-$(CONFIG_GPIO_MOCKUP) += gpio-mockup.o +obj-$(CONFIG_GPIO_MOCKUP) += gpio-mockup.o +obj-$(CONFIG_GPIO_MOXTET) += gpio-moxtet.o obj-$(CONFIG_GPIO_MPC5200) += gpio-mpc5200.o obj-$(CONFIG_GPIO_MPC8XXX) += gpio-mpc8xxx.o obj-$(CONFIG_GPIO_MSIC) += gpio-msic.o
drivers/gpio/Makefile obj-$(CONFIG_GPIO_PCI_IDIO_16) += gpio-pci-idio-16.o · line 107
Quoted 8 lines
drivers/gpio/Makefile +1
-1@@ -100,7 +101,7 @@ obj-$(CONFIG_GPIO_PCI_IDIO_16) += gpio-pci-idio-16.o obj-$(CONFIG_GPIO_PCIE_IDIO_24) += gpio-pcie-idio-24.o obj-$(CONFIG_GPIO_PISOSR) += gpio-pisosr.o obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o -obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o +obj-$(CONFIG_GPIO_PMIC_EIC_SPRD)+= gpio-pmic-eic-sprd.o obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o
Did you review your own patch? If so, you would of noticed something odd going on here.
Quoted 40 lines
drivers/gpio/gpio-moxtet.c new file +34
-0@@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0 +/* +* Turris Mox Moxtet GPIO expander +* +* Copyright (C) 2018 Marek Behun <[email protected]> +*/ + +#include <linux/gpio/consumer.h> +#include <linux/gpio.h> +#include <linux/mfd/moxtet.h> +#include <linux/module.h> +#include <linux/of_gpio.h> + +struct moxtet_gpio_chip { +struct device *dev; +struct gpio_chip gpio_chip; +u8 in_mask; +u8 out_mask; +}; + +static int moxtet_gpio_dir_mask (struct gpio_chip *gc,unsigned int offset, +int *dir,u8 *mask) +{ +struct moxtet_gpio_chip *chip =gpiochip_get_data (gc); +int i; + + *dir =0 ; +for (i =0 ; i <4 ; ++i) { + *mask =1 << i; +if (*mask & chip->in_mask) { +if (offset ==0 ) +return 0 ; + --offset; + }
drivers/gpio/gpio-moxtet.c line 44
Quoted 10 lines
drivers/gpio/gpio-moxtet.c new file +10
-0+ } + + *dir =1 ; +for (i =0 ; i <8 ; ++i) { + *mask =1 << i; +if (*mask & chip->out_mask) { +if (offset ==0 ) +return 0 ; + } + }
You need some comment about what is going on here, because it is not obvious.
Andrew
Andrew Lunn
maintainerPATCH v2 3/7 drivers: gpio: Add support for GPIOs over Moxtet bus
In reply to Marek BehúnQuoted 9 lines
+++
b/Documentation/devicetree/bindings/gpio/gpio-moxtet.txtDocumentation/devicetree/bindings/gpio/gpio-moxtet.txt new file +7
-0@@ -0,0 +1,31 @@ +Turris Mox Moxtet GPIO expander + +Required properties: + - compatible : Should be "cznic,moxtet-gpio". + - gpio-controller : Marks the device node as a GPIO controller. + - #gpio-cells : Should be two. For consumer use see gpio.txt. + - moxtet,input-mask : Bitmask. Those bits which correspond to input GPIOs
Documentation/devicetree/bindings/gpio/gpio-moxtet.txt line 17
Quoted 10 lines
Documentation/devicetree/bindings/gpio/gpio-moxtet.txt new file +10
-0+ when read from Moxtet bus should be set here. + For example if bit 0 and bit 3 are input GPIO bits, + this should be set to 0x9. + Since there are only 4 input bits, 0xf is max value. + - moxtet,output-mask : Bitmask. Those bits which correspond to output GPIOs + when written to Moxtet bus should be set here. + For example if bit 1 and bit 6 are output GPIO bits, + this should be set to 0x41. + Since there are at most 8 output bits, 0xff is max + value.
Lets see what Rob says, but i don't know if it should be so generic.
The SFP module probably has GPO's for tx-disable and rate-select, and GPI for mod-def0, LOS. So you can have a compatible for this, and have the bit masks associated to the compatible string. Don't put the masks in the device tree.
Andrew
PATCH v2 4/7 watchdog: Add support for Armada 37xx CPU watchdog
In reply to Marek BehúnThis adds support for the CPU watchdog found on Marvell Armada 37xx SoCs.
There are 4 counters which can be set as CPU watchdog counters. This driver uses the second counter (ID 1, counting from 0) (Marvell's Linux also uses second counter by default). In the future it could be adapted to use other counters, with definition in the device tree.
--- .../bindings/watchdog/armada-37xx-wdt.txt | 23 ++ MAINTAINERS | 1 + drivers/watchdog/Kconfig | 11 + drivers/watchdog/Makefile | 1 + drivers/watchdog/armada_37xx_wdt.c | 353 +++++++++++++++++++++ 5 files changed, 389 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt create mode 100644 drivers/watchdog/armada_37xx_wdt.c
Documentation/devicetree/bindings/watchdog/armada-37xx-wdt.txt new file +23 -0
@@ -0,0 +1,23 @@ +* Armada 37xx CPU Watchdog Timer Controller + +Required properties: +- compatible : must be "marvell,armada-3700-wdt" +- reg : base physical address of the controller and length of memory mapped + region. +- clocks : the clock feeding the watchdog timer. See clock-bindings.txt +- marvell,system-controller : reference to syscon node for the CPU Miscellaneous + Registers + +Example: + + cpu_misc: system-controller at d000 { + compatible = "syscon", "simple-mfd"; + reg = <0xd000 0x1000>; + }; + + wdt: watchdog-timer at 8300 { + compatible = "marvell,armada-3700-wdt"; + reg = <0x8300 0x40>; + marvell,system-controller = <&cpu_misc>; + clocks = <&xtalclk>; + };
MAINTAINERS +1 -0
@@ -1385,6 +1385,7 @@ S: Maintained F: include/mfd/moxtet.h F: drivers/gpio/gpio-moxtet.c F: drivers/mfd/moxtet.c +F: drivers/watchdog/armada_37xx_wdt.c ARM/EBSA110 MACHINE SUPPORT M: Russell King <[email protected]>
drivers/watchdog/Kconfig +11 -0
@@ -263,6 +263,17 @@ config ARM_SBSA_WATCHDOG To compile this driver as module, choose M here: The module will be called sbsa_gwdt. +config ARMADA_37XX_WATCHDOG + tristate "Armada 37xx watchdog" + depends on ARCH_MVEBU || COMPILE_TEST + select MFD_SYSCON + select WATCHDOG_CORE + help + Say Y here to include support for the watchdog timer found on + Marvell Armada 37xx SoCs. + To compile this driver as a module, choose M here: the + module will be called armada_37xx_wdt. + config ASM9260_WATCHDOG tristate "Alphascale ASM9260 watchdog" depends on MACH_ASM9260 || COMPILE_TEST
drivers/watchdog/Makefile +1 -0
@@ -38,6 +38,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o # ARM Architecture obj-$(CONFIG_ARM_SP805_WATCHDOG) += sp805_wdt.o obj-$(CONFIG_ARM_SBSA_WATCHDOG) += sbsa_gwdt.o +obj-$(CONFIG_ARMADA_37XX_WATCHDOG) += armada_37xx_wdt.o obj-$(CONFIG_ASM9260_WATCHDOG) += asm9260_wdt.o obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o
drivers/watchdog/armada_37xx_wdt.c new file +353 -0
353 lines not on this page · raw message
Signature · 1 line
2.16.4
PATCH v2 4/7 watchdog: Add support for Armada 37xx CPU watchdog
Hi Marek,
Marek Beh?n <[email protected]> wrote on Thu, 9 Aug 2018 04:20:34 +0200:
Quoted 9 lines
This adds support for the CPU watchdog found on Marvell Armada 37xx SoCs.
There are 4 counters which can be set as CPU watchdog counters. This driver uses the second counter (ID 1, counting from 0) (Marvell's Linux also uses second counter by default). In the future it could be adapted to use other counters, with definition in the device tree.
Quoted 3 lines
Signed-off-by Marek Behun <[email protected]>Tested-by Gregory CLEMENT <[email protected]>---
(on an EspressoBin)
Thanks,
Miqu?l
PATCH v2 5/7 arm64: dts: marvell: armada-37xx: add nodes to support watchdog
In reply to Marek BehúnThis adds the system controller node for CPU Miscellaneous Registers (which is needed for the watchdog node) and the watchdog node.
--- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+)
arch/arm64/boot/dts/marvell/armada-37xx.dtsi +12 -0
@@ -65,6 +65,18 @@ /* 32M internal register @ 0xd000_0000 */ ranges = <0x0 0x0 0xd0000000 0x2000000>; + wdt: watchdog-timer at 8300 { + compatible = "marvell,armada-3700-wdt"; + reg = <0x8300 0x40>; + marvell,system-controller = <&cpu_misc>; + clocks = <&xtalclk>; + }; + + cpu_misc: system-controller at d000 { + compatible = "syscon", "simple-mfd"; + reg = <0xd000 0x1000>; + }; + spi0: spi at 10600 { compatible = "marvell,armada-3700-spi"; #address-cells = <1>;
Signature · 1 line
2.16.4
PATCH v2 5/7 arm64: dts: marvell: armada-37xx: add nodes to support watchdog
Hi Marek,
Marek Beh?n <[email protected]> wrote on Thu, 9 Aug 2018 04:20:35 +0200:
Quoted 5 lines
This adds the system controller node for CPU Miscellaneous Registers (which is needed for the watchdog node) and the watchdog node.
Signed-off-by Marek Behun <[email protected]>---
Thanks,
Miqu?l
PATCH v2 6/7 net: mvneta: Don't use GRO on Armada 3720
In reply to Marek BehúnFor some reason on Armada 3720 boards (EspressoBin and Turris Mox) the networking driver behaves weirdly when using napi_gro_receive.
For example downloading a big file from a local network (low ping) is fast, but when downloading from a remote server (higher ping), the download speed is at first high but drops rapidly to almost nothing or absolutely nothing.
This is fixed when using netif_receive_skb instead of napi_gro_receive.
--- drivers/net/ethernet/marvell/mvneta.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
drivers/net/ethernet/marvell/mvneta.c +8 -2
@@ -1959,7 +1959,10 @@ static int mvneta_rx_swbm(struct mvneta_port *pp, int rx_todo, skb->protocol =eth_type_trans (skb, dev);mvneta_rx_csum (pp, rx_status, skb); -napi_gro_receive (&port->napi, skb); +if (pp->neta_armada3700) +netif_receive_skb (skb); +else +napi_gro_receive (&port->napi, skb); rcvd_pkts++; rcvd_bytes += rx_bytes;
@@ -2001,7 +2004,10 @@ static int mvneta_rx_swbm(struct mvneta_port *pp, int rx_todo,mvneta_rx_csum (pp, rx_status, skb); -napi_gro_receive (&port->napi, skb); +if (pp->neta_armada3700) +netif_receive_skb (skb); +else +napi_gro_receive (&port->napi, skb); }if (rcvd_pkts) {
Signature · 1 line
2.16.4
PATCH v2 7/7 ARM64: dts: marvell: Add DTS file for Turris Mox
In reply to Marek BehúnThis adds basic support for the Turris Mox board from CZ.NIC.
Turris Mox is as modular router based on the Armada 3720 SOC (same as EspressoBin).
The basic module can be extended by different modules. When those modules are connected, U-Boot shall patch this basic device-tree with nodes corresponding to those modules.
--- .../arm/marvell/armada-3720-turris-mox.txt | 6 + MAINTAINERS | 1 + arch/arm64/boot/dts/marvell/Makefile | 1 + .../boot/dts/marvell/armada-3720-turris-mox.dts | 229 +++++++++++++++++++++ 4 files changed, 237 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/marvell/armada-3720-turris-mox.txt create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
Documentation/devicetree/bindings/arm/marvell/armada-3720-turris-mox.txt new file +6 -0
@@ -0,0 +1,6 @@ +CZ.NIC's Turris Mox SOHO router Device Tree Bindings +---------------------------------------------------- + +Required root node property: + +compatible: must contain "cznic,turris-mox"
MAINTAINERS +1 -0
@@ -1382,6 +1382,7 @@ ARM/CZ.NIC TURRIS MOX SUPPORT M: Marek Behun <[email protected]> W: http://mox.turris.cz S: Maintained +F: arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts F: include/mfd/moxtet.h F: drivers/gpio/gpio-moxtet.c F: drivers/mfd/moxtet.c
arch/arm64/boot/dts/marvell/Makefile +1 -0
@@ -2,6 +2,7 @@ # Mvebu SoC Family dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin.dtb +dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-turris-mox.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-7040-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-mcbin.dtb
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts new file +229 -0
229 lines not on this page · raw message
Signature · 1 line
2.16.4