PCI: dwc: fix scheduling while atomic issues
PATCH v2 1/1 PCI: dwc: fix scheduling while atomic issues
When programming inbound/outbound atu, we call usleep_range() after each checking PCIE_ATU_ENABLE bit. Unfortunately, the atu programming can be called in atomic context:
inbound atu programming could be called throughpci_epc_write_header()
=>dw_pcie_ep_write_header()
=>dw_pcie_prog_inbound_atu()
outbound atu programming could be called throughpci_bus_read_config_dword()
=>dw_pcie_rd_conf()
=>dw_pcie_prog_outbound_atu()
Fix this issue by calling mdelay() instead.
---
Since v1
- use mdelay() instead of udelay() to avoid __bad_udelay()
drivers/pci/controller/dwc/pcie-designware.c | 8 ++++---- drivers/pci/controller/dwc/pcie-designware.h | 3 +-- 2 files changed, 5 insertions(+), 6 deletions(-)
drivers/pci/controller/dwc/pcie-designware.c +4 -4
@@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index,if (val &PCIE_ATU_ENABLE )return ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Outbound iATU is not being enabled\n" ); }
@@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,if (val &PCIE_ATU_ENABLE )return ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Outbound iATU is not being enabled\n" ); }
@@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index,if (val &PCIE_ATU_ENABLE )return 0 ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Inbound iATU is not being enabled\n" );
@@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,if (val &PCIE_ATU_ENABLE )return 0 ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Inbound iATU is not being enabled\n" );
drivers/pci/controller/dwc/pcie-designware.h +1 -2
@@ -26,8 +26,7 @@/* Parameters for the waiting for iATU enabled routine */ #define LINK_WAIT_MAX_IATU_RETRIES 5 -#define LINK_WAIT_IATU_MIN 9000 -#define LINK_WAIT_IATU_MAX 10000 +#define LINK_WAIT_IATU 9/* Synopsys-specific PCIe configuration registers */ #define PCIE_PORT_LINK_CONTROL 0x710
Signature · 1 line
2.18.0
Hi Jisheng
Quoted 7 lines · Jisheng Zhang
When programming inbound/outbound atu, we call
usleep_range()after each checkingPCIE_ATU_ENABLEbit. Unfortunately, the atu programming can be called in atomic context:inbound atu programming could be called through
pci_epc_write_header()
=>dw_pcie_ep_write_header()
Quoted 8 lines
=>dw_pcie_prog_inbound_atu()outbound atu programming could be called through
pci_bus_read_config_dword()
=>dw_pcie_rd_conf()=>dw_pcie_prog_outbound_atu()Fix this issue by calling
mdelay()instead.
Makes sense. Thanks.
Regards,
Gustavo
Quoted 66 lines
Signed-off-by Jisheng Zhang <[email protected]>---
Since v1
- usemdelay()instead ofudelay()to avoid__bad_udelay()drivers/pci/controller/dwc/pcie-designware.c | 8 ++++---- drivers/pci/controller/dwc/pcie-designware.h | 3 +-- 2 files changed, 5 insertions(+), 6 deletions(-)drivers/pci/controller/dwc/pcie-designware.c +4
-4@@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index,if (val &PCIE_ATU_ENABLE )return ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Outbound iATU is not being enabled\n" ); }@@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,if (val &PCIE_ATU_ENABLE )return ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Outbound iATU is not being enabled\n" ); }@@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index,if (val &PCIE_ATU_ENABLE )return 0 ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Inbound iATU is not being enabled\n" );@@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,if (val &PCIE_ATU_ENABLE )return 0 ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Inbound iATU is not being enabled\n" );drivers/pci/controller/dwc/pcie-designware.h +1
-2@@ -26,8 +26,7 @@/* Parameters for the waiting for iATU enabled routine */ #define LINK_WAIT_MAX_IATU_RETRIES 5 -#define LINK_WAIT_IATU_MIN 9000 -#define LINK_WAIT_IATU_MAX 10000 +#define LINK_WAIT_IATU 9/* Synopsys-specific PCIe configuration registers */ #define PCIE_PORT_LINK_CONTROL 0x710
Quoted 9 lines · Jisheng Zhang
When programming inbound/outbound atu, we call
usleep_range()after each checkingPCIE_ATU_ENABLEbit. Unfortunately, the atu programming can be called in atomic context:inbound atu programming could be called through
pci_epc_write_header()
=>dw_pcie_ep_write_header()=>dw_pcie_prog_inbound_atu()
Quoted 8 lines
outbound atu programming could be called through
pci_bus_read_config_dword()
=>dw_pcie_rd_conf()=>dw_pcie_prog_outbound_atu()Fix this issue by calling
mdelay()instead.Signed-off-by Jisheng Zhang <[email protected]>
Mind adding a Fixes: tag please ?
Is:
commit f8aed6ec624f ("PCI: dwc: designware: Add EP mode support")
the commit you are fixing ?
Thanks,
Lorenzo
Quoted 66 lines
---
Since v1
- usemdelay()instead ofudelay()to avoid__bad_udelay()drivers/pci/controller/dwc/pcie-designware.c | 8 ++++---- drivers/pci/controller/dwc/pcie-designware.h | 3 +-- 2 files changed, 5 insertions(+), 6 deletions(-)drivers/pci/controller/dwc/pcie-designware.c +4
-4@@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index,if (val &PCIE_ATU_ENABLE )return ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Outbound iATU is not being enabled\n" ); }@@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,if (val &PCIE_ATU_ENABLE )return ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Outbound iATU is not being enabled\n" ); }@@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index,if (val &PCIE_ATU_ENABLE )return 0 ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Inbound iATU is not being enabled\n" );@@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar,if (val &PCIE_ATU_ENABLE )return 0 ; -usleep_range (LINK_WAIT_IATU_MIN ,LINK_WAIT_IATU_MAX ); +mdelay (LINK_WAIT_IATU ); }dev_err (pci->dev,"Inbound iATU is not being enabled\n" );drivers/pci/controller/dwc/pcie-designware.h +1
-2@@ -26,8 +26,7 @@/* Parameters for the waiting for iATU enabled routine */ #define LINK_WAIT_MAX_IATU_RETRIES 5 -#define LINK_WAIT_IATU_MIN 9000 -#define LINK_WAIT_IATU_MAX 10000 +#define LINK_WAIT_IATU 9/* Synopsys-specific PCIe configuration registers */ #define PCIE_PORT_LINK_CONTROL 0x710Signature · 1 line
2.18.0