ARM: dts: Add big-endian for IFC on LS1021A
Subsystems (2)
PATCH 1/3 ARM: dts: Add big-endian for IFC on LS1021A
Register space of IFC controller is big-endian.
So add big-endian in IFC device tree node.
--- arch/arm/boot/dts/ls1021a.dtsi | 2 ++ 1 file changed, 2 insertions(+)
arch/arm/boot/dts/ls1021a.dtsi +2 -0
@@ -1,5 +1,6 @@ /* * Copyright 2013-2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual
@@ -154,6 +155,7 @@ ifc: ifc at 1530000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x1530000 0x0 0x10000>; + big-endian; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; };
Signature · 1 line
2.14.1
PATCH 2/3 ARM: dts: Add big-endian in nor node for ls1021a
NOR and IFC controller connectivity is big-endian. So add big-endian field in nor device tree node allowing IFC controller to read/write data from/to the flash correctly.
--- arch/arm/boot/dts/ls1021a-qds.dts | 2 ++ arch/arm/boot/dts/ls1021a-twr.dts | 2 ++ 2 files changed, 4 insertions(+)
arch/arm/boot/dts/ls1021a-qds.dts +2 -0
@@ -1,5 +1,6 @@ /* * Copyright 2013-2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual
@@ -235,6 +236,7 @@ #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x8000000>; + big-endian; bank-width = <2>; device-width = <1>; };
arch/arm/boot/dts/ls1021a-twr.dts +2 -0
@@ -1,5 +1,6 @@ /* * Copyright 2013-2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual
@@ -203,6 +204,7 @@ #size-cells = <1>; compatible = "cfi-flash"; reg = <0x0 0x0 0x8000000>; + big-endian; bank-width = <2>; device-width = <1>; };
Signature · 1 line
2.14.1
PATCH 3/3 arm64: dts: Add big-endian in nor node for ls104xa
In reply to Prabhakar KushwahaNOR and IFC controller connectivity is big-endian. So add big-endian field in nor device tree node allowing IFC controller to read/write data from/to the flash correctly.
--- arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 2 ++ arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 2 ++ arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 2 ++ 3 files changed, 6 insertions(+)
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts +2 -0
@@ -3,6 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1043A family SoC. * * Copyright 2014-2015 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * Mingkai Hu <[email protected]> */
@@ -50,6 +51,7 @@ nor at 0,0 { compatible = "cfi-flash"; reg = <0x0 0x0 0x8000000>; + big-endian; bank-width = <2>; device-width = <1>; };
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts +2 -0
@@ -3,6 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1043A family SoC. * * Copyright 2014-2015 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * Mingkai Hu <[email protected]> */
@@ -65,6 +66,7 @@ #address-cells = <1>; #size-cells = <1>; reg = <0x0 0x0 0x8000000>; + big-endian; bank-width = <2>; device-width = <1>; };
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +2 -0
@@ -3,6 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1046A family SoC. * * Copyright 2016 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * Shaohui Xie <[email protected]> */
@@ -141,6 +142,7 @@ nor at 0,0 { compatible = "cfi-flash"; reg = <0x0 0x0 0x8000000>; + big-endian; bank-width = <2>; device-width = <1>; };
Signature · 1 line
2.14.1
PATCH 1/3 ARM: dts: Add big-endian for IFC on LS1021A
In reply to Prabhakar KushwahaOn Fri, Aug 17, 2018 at 03:49:18PM +0530, Prabhakar Kushwaha wrote:
Please resend the series with Li Yang <[email protected]> on copy.
Shawn
Quoted 38 lines
Register space of IFC controller is big-endian.
So add big-endian in IFC device tree node.
Signed-off-by Alison Wang <[email protected]>Signed-off-by Jagdish Gediya <[email protected]>Signed-off-by Prabhakar Kushwaha <[email protected]>--- arch/arm/boot/dts/ls1021a.dtsi | 2 ++ 1 file changed, 2 insertions(+)arch/arm/boot/dts/ls1021a.dtsi +2
-0@@ -1,5 +1,6 @@ /* * Copyright 2013-2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual@@ -154,6 +155,7 @@ ifc: ifc at 1530000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x1530000 0x0 0x10000>; + big-endian; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; };Signature · 7 lines
2.14.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 1/3 ARM: dts: Add big-endian for IFC on LS1021A
In reply to Prabhakar KushwahaQuoted 4 lines · Prabhakar Kushwaha
Register space of IFC controller is big-endian.
So add big-endian in IFC device tree node.
Is this change necessary? The current binding of IFC says:
- little-endian : If this property is absent, the big-endian mode will be in use as default for registers.
Quoted 30 lines
Signed-off-by Alison Wang <[email protected]>Signed-off-by Jagdish Gediya <[email protected]>Signed-off-by Prabhakar Kushwaha <[email protected]>--- arch/arm/boot/dts/ls1021a.dtsi | 2 ++ 1 file changed, 2 insertions(+)arch/arm/boot/dts/ls1021a.dtsi +2
-1@@ -1,5 +1,6 @@ /* * Copyright 2013-2014 Freescale Semiconductor, Inc. + * Copyright 2018 NXP * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual@@ -154,6 +155,7 @@ ifc: ifc at 1530000 { compatible = "fsl,ifc", "simple-bus"; reg = <0x0 0x1530000 0x0 0x10000>; + big-endian; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; }; --2.14.1
PATCH 1/3 ARM: dts: Add big-endian for IFC on LS1021A
Hi leo
Quoted 15 lines
-----Original Message-----
From: Li Yang <[email protected]>
Sent: Tuesday, August 28, 2018 1:00 AM
To: Prabhakar Kushwaha <[email protected]>
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS <[email protected]>; Rob Herring <[email protected]>; Mark Rutland <[email protected]>; Shawn Guo <[email protected]>; moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE <linux-arm- kernel at lists.infradead.org>; Alison Wang <[email protected]>; Jagdish Gediya <[email protected]>
Subject: Re: [PATCH 1/3] ARM: dts: Add big-endian for IFC on LS1021AQuoted 1 line · Prabhakar Kushwaha
Quoted 9 lines
Quoted 3 lines
Register space of IFC controller is big-endian.
So add big-endian in IFC device tree node.
Is this change necessary? The current binding of IFC says:
- little-endian : If this property is absent, the big-endian mode will be in use as default for registers.
I agree.. this patch is not required.
But your comments has remind me to remove big-endian property from ls1043a and ls0146a also under IFC controller.
Thanks
--pk