mips: Add basic MediaTek MT7620/88 support
Subsystems (3)
PATCH v4 1/6 mips: Add basic MediaTek MT7620/88 support
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of the code is copied from the MediaTek GitHub repository:
https://github.com/MediaTek-Labs/linkit-smart-uboot.git
The mt7628a.dtsi file is imported from Linux v4.17.
Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway both based on the MT7688 will be added in further patches.
---
v4:
- Remove dead code from debug version in lowlevel_init
- Use sX registers now for real
- Increase cache line size in ddr_calibrate() to 128 as done in the original code
v3:
- Added dtsi file with this platforms support as suggested by Daniel
- Rebased on top of Daniels I-cache startup patches -> removed magic with KSEG0 call of ddr_calibrate. Its now called directly and the bootup is much faster
- Some improvements to print_cpuinfo(), use ioremap_nocache etc
- Added .set noreorder to lowlevel_init.S
- Multiple improvements to lowlevel_init.S as suggested by Daniel
v2:
- Sort Kconfig symbols alphabetically
- Use MIPS_TUNE_24KC
- Use imply for SPI support
- Dont' add LinkIt module support yet (is added with the board support)
- Move SKIP_LOWLEVEL_INIT from Kconfig to config header
- Use DT to get the base address of the system controller (for display_cpuinfo)
- Remove _machine_restart - a separate driver is provided in a new patch
- Remove cachop_op() and cal_invalidate_dcache_range and use the generic invalidate_dcache_range function instead
arch/mips/Kconfig | 16 ++ arch/mips/Makefile | 1 + arch/mips/dts/mt7628a.dtsi | 135 +++++++++++ arch/mips/mach-mt7620/Kconfig | 113 +++++++++ arch/mips/mach-mt7620/Makefile | 8 + arch/mips/mach-mt7620/cpu.c | 69 ++++++ arch/mips/mach-mt7620/ddr_calibrate.c | 308 ++++++++++++++++++++++++ arch/mips/mach-mt7620/lowlevel_init.S | 322 ++++++++++++++++++++++++++ arch/mips/mach-mt7620/mt76xx.h | 32 +++ 9 files changed, 1004 insertions(+) create mode 100644 arch/mips/dts/mt7628a.dtsi create mode 100644 arch/mips/mach-mt7620/Kconfig create mode 100644 arch/mips/mach-mt7620/Makefile create mode 100644 arch/mips/mach-mt7620/cpu.c create mode 100644 arch/mips/mach-mt7620/ddr_calibrate.c create mode 100644 arch/mips/mach-mt7620/lowlevel_init.S create mode 100644 arch/mips/mach-mt7620/mt76xx.h
arch/mips/Kconfig +16 -0
@@ -68,6 +68,21 @@ config ARCH_BMIPS select SYSRESET imply CMD_DM +config ARCH_MT7620 + bool "Support MT7620/7688 SoCs" + imply CMD_DM + select DISPLAY_CPUINFO + select DM + select DM_SERIAL + imply DM_SPI + imply DM_SPI_FLASH + select MIPS_TUNE_24KC + select OF_CONTROL + select ROM_EXCEPTION_VECTORS + select SUPPORTS_CPU_MIPS32_R1 + select SUPPORTS_CPU_MIPS32_R2 + select SUPPORTS_LITTLE_ENDIAN + config MACH_PIC32 bool "Support Microchip PIC32" select DM
@@ -120,6 +135,7 @@ source "board/qemu-mips/Kconfig" source "arch/mips/mach-ath79/Kconfig" source "arch/mips/mach-bmips/Kconfig" source "arch/mips/mach-pic32/Kconfig" +source "arch/mips/mach-mt7620/Kconfig" if MIPS
arch/mips/Makefile +1 -0
@@ -14,6 +14,7 @@ libs-y += arch/mips/lib/ machine-$(CONFIG_ARCH_ATH79) += ath79 machine-$(CONFIG_ARCH_BMIPS) += bmips machine-$(CONFIG_MACH_PIC32) += pic32 +machine-$(CONFIG_ARCH_MT7620) += mt7620 machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y)) libs-y += $(machdirs)
arch/mips/dts/mt7628a.dtsi new file +135 -0
135 lines not on this page · raw message
arch/mips/mach-mt7620/Kconfig new file +113 -0
113 lines not on this page · raw message
arch/mips/mach-mt7620/Makefile new file +8 -0
@@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += cpu.o + +ifndef CONFIG_SKIP_LOWLEVEL_INIT +obj-y += ddr_calibrate.o +obj-y += lowlevel_init.o +endif
arch/mips/mach-mt7620/cpu.c new file +69 -0
69 lines not on this page · raw message
arch/mips/mach-mt7620/ddr_calibrate.c new file +308 -0
308 lines not on this page · raw message
arch/mips/mach-mt7620/lowlevel_init.S new file +322 -0
322 lines not on this page · raw message
arch/mips/mach-mt7620/mt76xx.h new file +32 -0
@@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* +* Copyright (C) 2018 Stefan Roese <[email protected]> +*/ + +#ifndef __MT76XX_H +#define __MT76XX_H + +#define MT76XX_SYSCTL_BASE 0x10000000 + +#define MT76XX_CHIPID_OFFS 0x00 +#define MT76XX_CHIP_REV_ID_OFFS 0x0c +#define MT76XX_SYSCFG0_OFFS 0x10 + +#define MT76XX_MEMCTRL_BASE (MT76XX_SYSCTL_BASE + 0x0300) +#define MT76XX_RGCTRL_BASE (MT76XX_SYSCTL_BASE + 0x1000) + +#define MT76XX_ROM_STATUS_REG (MT76XX_SYSCTL_BASE + 0x0028) +#define MT76XX_CLKCFG0_REG (MT76XX_SYSCTL_BASE + 0x002c) +#define MT76XX_DYN_CFG0_REG (MT76XX_SYSCTL_BASE + 0x0440) + +#define DDR_CFG1_REG (MT76XX_MEMCTRL_BASE + 0x44) +#define DDR_CFG2_REG (MT76XX_MEMCTRL_BASE + 0x48) +#define DDR_CFG3_REG (MT76XX_MEMCTRL_BASE + 0x4c) +#define DDR_CFG4_REG (MT76XX_MEMCTRL_BASE + 0x50) + +#ifndef __ASSEMBLY__ +/* Prototypes */ +void ddr_calibrate (void ); +#endif + +#endif
Signature · 1 line
2.18.0
PATCH v4 1/6 mips: Add basic MediaTek MT7620/88 support
Quoted 49 lines · Stefan Roese
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of the code is copied from the MediaTek GitHub repository:
https://github.com/MediaTek-Labs/linkit-smart-uboot.git
The
mt7628a.dtsifile is imported from Linux v4.17.Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway both based on the MT7688 will be added in further patches.
Signed-off-by Stefan Roese <[email protected]>Cc Daniel Schwierzeck <[email protected]>---
v4:
- Remove dead code from debug version inlowlevel_init
- Use sX registers now for real
- Increase cache line size inddr_calibrate()to 128 as done in the original codev3:
- Added dtsi file with this platforms support as suggested by Daniel
- Rebased on top of Daniels I-cache startup patches -> removed magic with KSEG0 call ofddr_calibrate. Its now called directly and the bootup is much faster
- Some improvements toprint_cpuinfo(), useioremap_nocacheetc
- Added .set noreorder tolowlevel_init.S
- Multiple improvements tolowlevel_init.Sas suggested by Danielv2:
- SortKconfigsymbols alphabetically
- UseMIPS_TUNE_24KC
- Use imply for SPI support
- Dont' add LinkIt module support yet (is added with the board support)
- MoveSKIP_LOWLEVEL_INITfromKconfigto config header
- Use DT to get the base address of the system controller (fordisplay_cpuinfo)
- Remove_machine_restart- a separate driver is provided in a new patch
- Removecachop_op()andcal_invalidate_dcache_rangeand use the genericinvalidate_dcache_rangefunction insteadarch/mips/Kconfig | 16 ++ arch/mips/Makefile | 1 + arch/mips/dts/mt7628a.dtsi | 135 +++++++++++ arch/mips/mach-mt7620/Kconfig | 113 +++++++++ arch/mips/mach-mt7620/Makefile | 8 + arch/mips/mach-mt7620/cpu.c | 69 ++++++ arch/mips/mach-mt7620/ddr_calibrate.c | 308 ++++++++++++++++++++++++ arch/mips/mach-mt7620/lowlevel_init.S | 322 ++++++++++++++++++++++++++ arch/mips/mach-mt7620/mt76xx.h | 32 +++
Quoted 9 lines
9 files changed, 1004 insertions(+) create mode 100644 arch/mips/dts/mt7628a.dtsi create mode 100644 arch/mips/mach-mt7620/Kconfig create mode 100644 arch/mips/mach-mt7620/Makefile create mode 100644 arch/mips/mach-mt7620/cpu.c create mode 100644 arch/mips/mach-mt7620/ddr_calibrate.c create mode 100644 arch/mips/mach-mt7620/lowlevel_init.S create mode 100644 arch/mips/mach-mt7620/mt76xx.h
applied to u-boot-mips, thanks.
Stefan, because CONFIG_NR_DRAM_BANKS was converted to Kconfig in mainline, I needed to run moveconfig.py on your patch series. I committed all changes on the defconfig files which removes things like your SPI driver and SPI-NAND support. I think a "make savedefconfig" should always produce the same result. You should send follow-up patches to enable those features after they are merged to mainline.
Signature · 9 lines
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PATCH v4 1/6 mips: Add basic MediaTek MT7620/88 support
Quoted 62 lines · Daniel Schwierzeck
Quoted 50 lines · Stefan Roese
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of the code is copied from the MediaTek GitHub repository:
https://github.com/MediaTek-Labs/linkit-smart-uboot.git
The
mt7628a.dtsifile is imported from Linux v4.17.Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway both based on the MT7688 will be added in further patches.
Signed-off-by Stefan Roese <[email protected]>Cc Daniel Schwierzeck <[email protected]>---
v4:
- Remove dead code from debug version inlowlevel_init
- Use sX registers now for real
- Increase cache line size inddr_calibrate()to 128 as done in the original codev3:
- Added dtsi file with this platforms support as suggested by Daniel
- Rebased on top of Daniels I-cache startup patches -> removed magic with KSEG0 call ofddr_calibrate. Its now called directly and the bootup is much faster
- Some improvements toprint_cpuinfo(), useioremap_nocacheetc
- Added .set noreorder tolowlevel_init.S
- Multiple improvements tolowlevel_init.Sas suggested by Danielv2:
- SortKconfigsymbols alphabetically
- UseMIPS_TUNE_24KC
- Use imply for SPI support
- Dont' add LinkIt module support yet (is added with the board support)
- MoveSKIP_LOWLEVEL_INITfromKconfigto config header
- Use DT to get the base address of the system controller (fordisplay_cpuinfo)
- Remove_machine_restart- a separate driver is provided in a new patch
- Removecachop_op()andcal_invalidate_dcache_rangeand use the genericinvalidate_dcache_rangefunction insteadarch/mips/Kconfig | 16 ++ arch/mips/Makefile | 1 + arch/mips/dts/mt7628a.dtsi | 135 +++++++++++ arch/mips/mach-mt7620/Kconfig | 113 +++++++++ arch/mips/mach-mt7620/Makefile | 8 + arch/mips/mach-mt7620/cpu.c | 69 ++++++ arch/mips/mach-mt7620/ddr_calibrate.c | 308 ++++++++++++++++++++++++ arch/mips/mach-mt7620/lowlevel_init.S | 322 ++++++++++++++++++++++++++ arch/mips/mach-mt7620/mt76xx.h | 32 +++ 9 files changed, 1004 insertions(+)Quoted 8 lines
create mode 100644
arch/mips/dts/mt7628a.dtsicreate mode 100644arch/mips/mach-mt7620/Kconfigcreate mode 100644arch/mips/mach-mt7620/Makefilecreate mode 100644arch/mips/mach-mt7620/cpu.ccreate mode 100644arch/mips/mach-mt7620/ddr_calibrate.ccreate mode 100644arch/mips/mach-mt7620/lowlevel_init.Screate mode 100644arch/mips/mach-mt7620/mt76xx.h
Quoted 8 lines
applied to u-boot-mips, thanks.
Stefan, because
CONFIG_NR_DRAM_BANKSwas converted toKconfigin mainline, I needed to runmoveconfig.pyon your patch series. I committed all changes on the defconfig files which removes things like your SPI driver and SPI-NAND support. I think a "make savedefconfig" should always produce the same result. You should send follow-up patches to enable those features after they are merged to mainline.
Yes, will do in a few days. Most likely I will wait until the SPI changes are in mainline as well (MT7621 SPI driver and SPI NAND infrastructure).
Thanks,
Stefan