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socfpga: clean up sfp generation

PATCH Superseded Dalon Westergreen 2 participants 5 messages Sep 10, 2018 – Sep 11, 2018 Kbuild

v1 of 3 Superseded Latest is v3 →

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#0 lore raw

cover socfpga: clean up sfp generation

Move gen5 and arria10 to use CONFIG_SPL_TARGET to
specify the required SPL output.

Dalon Westergreen (3):
spl: socfpga: remove sfp generation
socfpga: Add sfp generation targets
socfpga: common: add CONFIG_SPL_TARGET to gen5 and arria10 socfpga
header

 Makefile                         | 11 +++++++----
 include/configs/socfpga_common.h |  1 +
 scripts/Makefile.spl             | 12 ------------
 3 files changed, 8 insertions(+), 16 deletions(-)
Signature · 1 line
2.17.1
#1 lore raw

PATCH 1/3 spl: socfpga: remove sfp generation

In preparation to move to using CONFIG_SPL_TARGET, remove sfp generation targets.

---
 scripts/Makefile.spl | 12 ------------
 1 file changed, 12 deletions(-)
scripts/Makefile.spl +0 -12
index 252f13826d..9314365aab 100644
@@ -187,10 +187,6 @@ ifdef CONFIG_SAMSUNG
 ALL-y	+= $(obj)/$(BOARD)-spl.bin
 endif
 
-ifdef CONFIG_ARCH_SOCFPGA
-ALL-y	+= $(obj)/$(SPL_BIN).sfp
-endif
-
 ifdef CONFIG_ARCH_SUNXI
 ALL-y	+= $(obj)/sunxi-spl.bin
 
@@ -313,14 +309,6 @@ LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
 endif
 endif
 
-ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
-MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage_v1
-else
-MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage
-endif
-$(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
-	$(call if_changed,mkimage)
-
 quiet_cmd_mksunxiboot = MKSUNXI $@
 cmd_mksunxiboot = $(objtree)/tools/mksunxiboot \
 			--default-dt $(CONFIG_DEFAULT_DEVICE_TREE) $< $@
Signature · 1 line
2.17.1
#2 lore raw

PATCH 1/3 spl: socfpga: remove sfp generation

Quoted 29 lines · Dalon Westergreen

In preparation to move to using CONFIG_SPL_TARGET, remove sfp generation targets.

---
 scripts/Makefile.spl | 12 ------------
 1 file changed, 12 deletions(-)
scripts/Makefile.spl +0 -5
index 252f13826d..9314365aab 100644
@@ -187,10 +187,6 @@ ifdef CONFIG_SAMSUNG
 ALL-y	+= $(obj)/$(BOARD)-spl.bin
 endif
 
-ifdef CONFIG_ARCH_SOCFPGA
-ALL-y	+= $(obj)/$(SPL_BIN).sfp
-endif
-
 ifdef CONFIG_ARCH_SUNXI
 ALL-y	+= $(obj)/sunxi-spl.bin
 
@@ -313,14 +309,6 @@ LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE)
 endif
 endif
 
-ifdef CONFIG_TARGET_SOCFPGA_ARRIA10

scripts/Makefile.spl LDFLAGS_$(SPL_BIN) += -Ttext $(CONFIG_SPL_TEXT_BASE) · line 314

Quoted 10 lines
scripts/Makefile.spl +0 -7
-MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage_v1
-else
-MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage
-endif
-$(obj)/$(SPL_BIN).sfp: $(obj)/$(SPL_BIN).bin FORCE
-	$(call if_changed,mkimage)
-
 quiet_cmd_mksunxiboot = MKSUNXI $@
 cmd_mksunxiboot = $(objtree)/tools/mksunxiboot \
 			--default-dt $(CONFIG_DEFAULT_DEVICE_TREE) $< $@

Doesn't this break git bisect ?

Signature · 2 lines
Best regards,
Marek Vasut
#3 lore raw

PATCH 2/3 socfpga: Add sfp generation targets

In reply to Dalon Westergreen

Some SOCFPGA platforms require a header be added to u-boot-spl and a combined spl / u-boot image. The combined image consists of 4 replicated u-boot-spl images with the afore mentioned header, and a u-boot image cat'ed together.

---
 Makefile | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)
Makefile +7 -4
index 133d7ac773..6c93c6c129 100644
@@ -1198,14 +1198,12 @@ OBJCOPYFLAGS_u-boot.spr = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \
 u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE
 	$(call if_changed,pad_cat)
 
-ifneq ($(CONFIG_ARCH_SOCFPGA),)
 quiet_cmd_socboot = SOCBOOT $@
 cmd_socboot = cat	spl/u-boot-spl.sfp spl/u-boot-spl.sfp	\
 			spl/u-boot-spl.sfp spl/u-boot-spl.sfp	\
 			u-boot.img > $@ || rm -f $@
 u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
 	$(call if_changed,socboot)
-endif
 
 # x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including
 # reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in
@@ -1518,8 +1516,13 @@ spl/sunxi-spl.bin: spl/u-boot-spl
 spl/sunxi-spl-with-ecc.bin: spl/sunxi-spl.bin
 	@:
 
-spl/u-boot-spl.sfp: spl/u-boot-spl
-	@:
+ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
+MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage_v1
+else
+MKIMAGEFLAGS_$(SPL_BIN).sfp = -T socfpgaimage
+endif
+spl/u-boot-spl.sfp: spl/u-boot-spl.bin FORCE
+	$(call if_changed,mkimage)
 
 spl/boot.bin: spl/u-boot-spl
 	@:
Signature · 1 line
2.17.1
#4 lore raw

PATCH 3/3 socfpga: common: add CONFIG_SPL_TARGET to gen5 and arria10 socfpga header

In reply to Dalon Westergreen

Add CONFIG_SPL_TARGET "u-boot-with-spl.sfp" to common header to generate the required u-boot-spl and u-boot combined image.

---
 include/configs/socfpga_common.h | 1 +
 1 file changed, 1 insertion(+)
include/configs/socfpga_common.h +1 -0
index 2330143cf1..4777b4522d 100644
@@ -239,6 +239,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
  * 0xFFEz_zzzz ...... Malloc area (grows up to top)
  * 0xFFE3_FFFF ...... End of SRAM (top)
  */
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.sfp"
 #define CONFIG_SPL_TEXT_BASE		CONFIG_SYS_INIT_RAM_ADDR
 #define CONFIG_SPL_MAX_SIZE		CONFIG_SYS_INIT_RAM_SIZE
 
Signature · 1 line
2.17.1