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Add CPU Idle support on Armada 8K

PATCH New Gregory CLEMENT 1 participant 4 messages Sep 21, 2018 – Oct 2, 2018

Subsystems (2)
Device tree bindings Arm/Marvell Kirkwood and Armada 370, 375, 38x, 39x, XP, 3700, 7K/8K, CN9130 SoC support
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Gregory CLEMENT

author maintainer
#0 lore raw

cover Add CPU Idle support on Armada 8K

Hello,

These two patches allow to enable the Idle support for Armada 8K boards.

Gregory

Gregory CLEMENT (1):
arm64: dts: marvell: Add node labels for the cpus

orenbh (1):
arm64: dts: marvell: add CPU Idle power state support on Armada 7K/8K

 arch/arm64/boot/dts/marvell/armada-372x.dtsi  |  2 +-
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi  |  2 +-
 .../boot/dts/marvell/armada-ap806-dual.dtsi   |  4 +--
 .../boot/dts/marvell/armada-ap806-quad.dtsi   | 12 ++++++---
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 27 +++++++++++++++++++
 .../marvell/armada-ap810-ap0-octa-core.dtsi   | 16 +++++------
 6 files changed, 47 insertions(+), 16 deletions(-)
Signature · 1 line
2.19.0
author maintainer
#1 lore raw

PATCH 1/2 arm64: dts: marvell: Add node labels for the cpus

Aligned with what we have done for the others nodes. It will also allow to easily modify the cpu configuration at board (or sub-SoC) level.

Signed-off-by Gregory CLEMENT <[email protected]>
---
 arch/arm64/boot/dts/marvell/armada-372x.dtsi     |  2 +-
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi     |  2 +-
 .../boot/dts/marvell/armada-ap806-dual.dtsi      |  4 ++--
 .../boot/dts/marvell/armada-ap806-quad.dtsi      |  8 ++++----
 .../dts/marvell/armada-ap810-ap0-octa-core.dtsi  | 16 ++++++++--------
 5 files changed, 16 insertions(+), 16 deletions(-)
arch/arm64/boot/dts/marvell/armada-372x.dtsi +1 -1
index 97558a64e276..6800945a88ad 100644
@@ -16,7 +16,7 @@
 	compatible = "marvell,armada3720", "marvell,armada3710";
 
 	cpus {
-		cpu at 1 {
+		cpu1: cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a53","arm,armv8";
 			reg = <0x1>;
arch/arm64/boot/dts/marvell/armada-37xx.dtsi +1 -1
index d9531e242eb4..179e571ba40e 100644
@@ -40,7 +40,7 @@
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
-		cpu at 0 {
+		cpu0: cpu at 0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0>;
arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi +2 -2
index 64b5e61a698e..d3c0636558ff 100644
@@ -15,13 +15,13 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu at 0 {
+		cpu0: cpu at 0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x000>;
 			enable-method = "psci";
 		};
-		cpu at 1 {
+		cpu1: cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x001>;
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi +4 -4
index 746e792767f5..01ea662afba8 100644
@@ -15,25 +15,25 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu at 0 {
+		cpu0: cpu at 0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x000>;
 			enable-method = "psci";
 		};
-		cpu at 1 {
+		cpu1: cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x001>;
 			enable-method = "psci";
 		};
-		cpu at 100 {
+		cpu2: cpu at 100 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x100>;
 			enable-method = "psci";
 		};
-		cpu at 101 {
+		cpu3: cpu at 101 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x101>;
arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi +8 -8
index 7d00ae78fc79..b788cb63caf2 100644
@@ -13,49 +13,49 @@
 		#size-cells = <0>;
 		compatible = "marvell,armada-ap810-octa";
 
-		cpu at 0 {
+		cpu0: cpu at 0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x000>;
 			enable-method = "psci";
 		};
-		cpu at 1 {
+		cpu1: cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x001>;
 			enable-method = "psci";
 		};
-		cpu at 100 {
+		cpu2: cpu at 100 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x100>;
 			enable-method = "psci";
 		};
-		cpu at 101 {
+		cpu3: cpu at 101 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x101>;
 			enable-method = "psci";
 		};
-		cpu at 200 {
+		cpu4: cpu at 200 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x200>;
 			enable-method = "psci";
 		};
-		cpu at 201 {
+		cpu5: cpu at 201 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x201>;
 			enable-method = "psci";
 		};
-		cpu at 300 {
+		cpu6: cpu at 300 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x300>;
 			enable-method = "psci";
 		};
-		cpu at 301 {
+		cpu7: cpu at 301 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x301>;
Signature · 1 line
2.19.0
author maintainer
#2 lore raw

PATCH 2/2 arm64: dts: marvell: add CPU Idle power state support on Armada 7K/8K

In reply to Gregory CLEMENT

From: orenbh <[email protected]>

This patch adds CPU deep Idle and Cluster deep Idle states BUT it defines the idle state for each cpu (defined under cpu-idle-states parameter) only for the quad version therefore it does NOT activate CPU Idle capability for the other version.

[gregory: extract from a larger patch]
Signed-off-by orenbh <[email protected]>
Signed-off-by Gregory CLEMENT <[email protected]>
---
 .../boot/dts/marvell/armada-ap806-quad.dtsi   |  4 +++
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 27 +++++++++++++++++++
 2 files changed, 31 insertions(+)
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi +4 -0
index 01ea662afba8..64632c873888 100644
@@ -20,24 +20,28 @@
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x000>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 		cpu1: cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x001>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 		cpu2: cpu at 100 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x100>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 		cpu3: cpu at 101 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a72", "arm,armv8";
 			reg = <0x101>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
 		};
 	};
 };
arch/arm64/boot/dts/marvell/armada-ap806.dtsi +27 -0
index 27930394249d..4a65e4e830aa 100644
@@ -27,6 +27,33 @@
 		method = "smc";
 	};
 
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		idle_states {
+			entry_method = "arm,pcsi";
+
+			CPU_SLEEP_0: cpu-sleep-0 {
+				compatible = "arm,idle-state";
+				local-timer-stop;
+				arm,psci-suspend-param = <0x0010000>;
+				entry-latency-us = <80>;
+				exit-latency-us  = <160>;
+				min-residency-us = <320>;
+			};
+
+			CLUSTER_SLEEP_0: cluster-sleep-0 {
+				compatible = "arm,idle-state";
+				local-timer-stop;
+				arm,psci-suspend-param = <0x1010000>;
+				entry-latency-us = <500>;
+				exit-latency-us = <1000>;
+				min-residency-us = <2500>;
+			};
+		};
+	};
+
 	ap806 {
 		#address-cells = <2>;
 		#size-cells = <2>;
Signature · 1 line
2.19.0
author maintainer
#3 lore raw

cover Add CPU Idle support on Armada 8K

In reply to Gregory CLEMENT

Hi,

Quoted 4 lines · Gregory CLEMENT

Hello,

These two patches allow to enable the Idle support for Armada 8K boards.

Both patch applied on mvebu/dt64

Gregory

Quoted 25 lines

Gregory

Gregory CLEMENT (1):
arm64: dts: marvell: Add node labels for the cpus

orenbh (1):
arm64: dts: marvell: add CPU Idle power state support on Armada 7K/8K

 arch/arm64/boot/dts/marvell/armada-372x.dtsi  |  2 +-
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi  |  2 +-
 .../boot/dts/marvell/armada-ap806-dual.dtsi   |  4 +--
 .../boot/dts/marvell/armada-ap806-quad.dtsi   | 12 ++++++---
 arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 27 +++++++++++++++++++
 .../marvell/armada-ap810-ap0-octa-core.dtsi   | 16 +++++------
 6 files changed, 47 insertions(+), 16 deletions(-)
Signature · 7 lines
2.19.0


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Signature · 3 lines
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com