dt-bindings: pinctrl: document Broadcom Northstar pin mux controller
Subsystems (4)
PATCH v2 1/2 dt-bindings: pinctrl: document Broadcom Northstar pin mux controller
From: Rafa? Mi?ecki <[email protected]>
Northstar has mux controller just like Northstar Plus and Northstar2. It's a bit different though (different registers & pins) so it requires its own binding.
It's needed to allow other block bindings specify required mux setup.
---
V2: Use "cru_gpio_control"
Add more functions & groups
Include Florian's Reviewed-by
--- .../devicetree/bindings/pinctrl/brcm,ns-pinmux.txt | 33 ++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.txt
Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.txt new file +33 -0
@@ -0,0 +1,33 @@ +Broadcom Northstar pins mux controller + +Some of Northstar SoCs's pins can be used for various purposes thanks to the mux +controller. This binding allows describing mux controller and listing available +functions. They can be referenced later by other bindings to let system +configure controller correctly. + +Required properties: +- compatible: brcm,ns-pinmux +- reg: iomem address range of CRU (Central Resource Unit) pin registers +- reg-names: "cru_gpio_control" - the only needed & supported reg right now + +List of supported functions and their groups: +- "spi": "spi_grp" +- "i2c": "i2c_grp" +- "mdio": "mdio_grp" +- "pwm": "pwm0_grp", "pwm1_grp", "pwm2_grp", "pwm3_grp" +- "uart1": "uart1_grp" + +For documentation of subnodes see: +Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt + +Example: + pinctrl at 1800c1c0 { + compatible = "brcm,ns-pinmux"; + reg = <0x1800c1c0 0x24>; + reg-names = "cru_gpio_control"; + + spi { + function = "spi"; + groups = "spi_grp"; + }; + };
Signature · 1 line
2.13.7
PATCH v2 2/2 pinctrl: bcm: add Northstar driver
From: Rafa? Mi?ecki <[email protected]>
This driver provides support for Northstar mux controller. It differs from Northstar Plus one so a new binding and driver were needed.
---
V2: Define more pins, groups, functions
Simplify ns_pinctrl_set_mux() as Northstar uses 1:1 mapping
--- drivers/pinctrl/bcm/Kconfig | 13 ++ drivers/pinctrl/bcm/Makefile | 1 + drivers/pinctrl/bcm/pinctrl-ns.c | 262 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 276 insertions(+) create mode 100644 drivers/pinctrl/bcm/pinctrl-ns.c
drivers/pinctrl/bcm/Kconfig +13 -0
@@ -73,6 +73,19 @@ config PINCTRL_CYGNUS_MUX configuration, with the exception that certain individual pins can be overridden to GPIO function +config PINCTRL_NS + bool "Broadcom Northstar pins driver" + depends on OF && (ARCH_BCM_5301X || COMPILE_TEST) + select PINMUX + select GENERIC_PINCONF + default ARCH_BCM_5301X + help + Say yes here to enable the Broadcom NS SoC pins driver. + + The Broadcom Northstar pins driver supports muxing multi-purpose pins + that can be used for various functions (e.g. SPI, I2C, UART) as well + as GPIOs. + config PINCTRL_NSP_GPIO bool "Broadcom NSP GPIO (with PINCONF) driver" depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST)
drivers/pinctrl/bcm/Makefile +1 -0
@@ -5,6 +5,7 @@ obj-$(CONFIG_PINCTRL_BCM281XX) += pinctrl-bcm281xx.o obj-$(CONFIG_PINCTRL_BCM2835) += pinctrl-bcm2835.o obj-$(CONFIG_PINCTRL_IPROC_GPIO) += pinctrl-iproc-gpio.o obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o +obj-$(CONFIG_PINCTRL_NS) += pinctrl-ns.o obj-$(CONFIG_PINCTRL_NSP_GPIO) += pinctrl-nsp-gpio.o obj-$(CONFIG_PINCTRL_NS2_MUX) += pinctrl-ns2-mux.o obj-$(CONFIG_PINCTRL_NSP_MUX) += pinctrl-nsp-mux.o
drivers/pinctrl/bcm/pinctrl-ns.c new file +262 -0
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Signature · 1 line
2.13.7