DW SPI: Allow to overload the management of the external CS
PATCH 1/1 DW SPI: Allow to overload the management of the external CS
On some platforms, as the Ocelot ones, when wanting to control the CS through software, it is not possible to do it through the GPIO controller. Indeed, this signal is managed through a dedicated range of registers inside the SoC..
By declaring the external_cs_manage function as weak, it is possible to manage the CS at platform level and then using the appropriate registers.
--- drivers/spi/designware_spi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
drivers/spi/designware_spi.c +7 -1
@@ -334,7 +334,13 @@ static int poll_transfer(struct dw_spi_priv *priv)return 0 ; } -static void external_cs_manage (struct udevice *dev,bool on) +/* +* We define external_cs_manage function as 'weak' as some targets +* (like OCELOT) don't control the external CS pin using a GPIO +* controller. These SoCs use specific registers to controll by +* software the SPI pins (and especially the CS). +*/ +__weak void external_cs_manage (struct udevice *dev,bool on) {#if defined(CONFIG_DM_GPIO ) && !defined(CONFIG_SPL_BUILD )struct dw_spi_priv *priv =dev_get_priv (dev->parent);
Signature · 1 line
2.19.0
PATCH 1/1 DW SPI: Allow to overload the management of the external CS
Hi,
Quoted 18 lines · Gregory CLEMENT
On some platforms, as the Ocelot ones, when wanting to control the CS through software, it is not possible to do it through the GPIO controller. Indeed, this signal is managed through a dedicated range of registers inside the SoC..
By declaring the
external_cs_managefunction as weak, it is possible to manage the CS at platform level and then using the appropriate registers.Signed-off-by Gregory CLEMENT <[email protected]>--- drivers/spi/designware_spi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)drivers/spi/designware_spi.c +0
-0
drivers/spi/designware_spi.c static int poll_transfer(struct dw_spi_priv *priv) · line 339
Quoted 7 lines
drivers/spi/designware_spi.c +3
-1@@ -334,7 +334,13 @@ static int poll_transfer(struct dw_spi_priv *priv)return 0 ; } -static void external_cs_manage (struct udevice *dev,bool on) +/* +* We define external_cs_manage function as 'weak' as some targets +* (like OCELOT) don't control the external CS pin using a GPIO
MSCC Ocelot maybe?
drivers/spi/designware_spi.c static int poll_transfer(struct dw_spi_priv *priv) · line 340
Quoted 1 line
drivers/spi/designware_spi.c +1
-0+* controller. These SoCs use specific registers to controll by
^ control
Quoted 9 lines
drivers/spi/designware_spi.c +3
-0+* software the SPI pins (and especially the CS). +*/ +__weak void external_cs_manage (struct udevice *dev,bool on) {#if defined(CONFIG_DM_GPIO ) && !defined(CONFIG_SPL_BUILD )struct dw_spi_priv *priv =dev_get_priv (dev->parent);Signature · 1 line
2.19.0
Signature · 3 lines
Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
PATCH 1/1 DW SPI: Allow to overload the management of the external CS
In reply to Gregory CLEMENTQuoted 4 lines · Gregory CLEMENT
On some platforms, as the Ocelot ones, when wanting to control the CS through software, it is not possible to do it through the GPIO controller. Indeed, this signal is managed through a dedicated range of registers inside the SoC..
and why did you add a spi-bitbang-gpio driver?
Quoted 29 lines
By declaring the
external_cs_managefunction as weak, it is possible to manage the CS at platform level and then using the appropriate registers.Signed-off-by Gregory CLEMENT <[email protected]>--- drivers/spi/designware_spi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)drivers/spi/designware_spi.c +7
-1@@ -334,7 +334,13 @@ static int poll_transfer(struct dw_spi_priv *priv)return 0 ; } -static void external_cs_manage (struct udevice *dev,bool on) +/* +* We define external_cs_manage function as 'weak' as some targets +* (like OCELOT) don't control the external CS pin using a GPIO +* controller. These SoCs use specific registers to controll by +* software the SPI pins (and especially the CS). +*/ +__weak void external_cs_manage (struct udevice *dev,bool on) {#if defined(CONFIG_DM_GPIO ) && !defined(CONFIG_SPL_BUILD )struct dw_spi_priv *priv =dev_get_priv (dev->parent);
Signature · 9 lines
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PATCH 1/1 DW SPI: Allow to overload the management of the external CS
Hi Daniel,
Quoted 7 lines · Daniel Schwierzeck
Quoted 4 lines · Gregory CLEMENT
On some platforms, as the Ocelot ones, when wanting to control the CS through software, it is not possible to do it through the GPIO controller. Indeed, this signal is managed through a dedicated range of registers inside the SoC..
and why did you add a spi-bitbang-gpio driver?
Because the DW SPI is not available on Luton, so for Luton we can only use a spi-bitbang-gpio driver which is very slow.
Gregory
Quoted 34 lines
Quoted 30 lines
By declaring the
external_cs_managefunction as weak, it is possible to manage the CS at platform level and then using the appropriate registers.Signed-off-by Gregory CLEMENT <[email protected]>--- drivers/spi/designware_spi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)drivers/spi/designware_spi.c +7
-1@@ -334,7 +334,13 @@ static int poll_transfer(struct dw_spi_priv *priv)return 0 ; } -static void external_cs_manage (struct udevice *dev,bool on) +/* +* We define external_cs_manage function as 'weak' as some targets +* (like OCELOT) don't control the external CS pin using a GPIO +* controller. These SoCs use specific registers to controll by +* software the SPI pins (and especially the CS). +*/ +__weak void external_cs_manage (struct udevice *dev,bool on) {#if defined(CONFIG_DM_GPIO ) && !defined(CONFIG_SPL_BUILD )struct dw_spi_priv *priv =dev_get_priv (dev->parent);Signature · 1 line
- Daniel
Signature · 3 lines
Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com