Skip to contentSkip to conversation

arm64: dts: qcom: sdm845: Add qspi (quad SPI) node

PATCH In review Douglas Anderson 3 participants 4 messages Oct 8, 2018 – Nov 28, 2018

Subsystems (3)
Device tree bindings Arm Qualcomm mailing list Arm Qualcomm support
lore
Share & tools
lore

Douglas Anderson

author
#0 lore raw

PATCH v2 1/1 arm64: dts: qcom: sdm845: Add qspi (quad SPI) node

This adds the Quad SPI controller to the main sdm845 device tree file. Boards will be expected to assign the proper pinctrl depending on how many chip selects they have hooked up and how many data lines.

This depends on commit 48735597f7bd ("clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header") to add the needed defines. It also shouldn't land until the patch ("dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation") [1] lands.

[1] https://lkml.kernel.org/r/[email protected]

Signed-off-by Douglas Anderson <[email protected]>

---

Changes in v2:
- Node is named "spi" not "qspi"

 arch/arm64/boot/dts/qcom/sdm845.dtsi | 47 ++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)
arch/arm64/boot/dts/qcom/sdm845.dtsi +47 -0
index b72bdb0a31a5..97946f46f7f3 100644
@@ -822,6 +822,41 @@
 			interrupt-controller;
 			#interrupt-cells = <2>;
 
+			qspi_clk: qspi-clk {
+				pinmux {
+					pins = "gpio95";
+					function = "qspi_clk";
+				};
+			};
+
+			qspi_cs0: qspi-cs0 {
+				pinmux {
+					pins = "gpio90";
+					function = "qspi_cs";
+				};
+			};
+
+			qspi_cs1: qspi-cs1 {
+				pinmux {
+					pins = "gpio89";
+					function = "qspi_cs";
+				};
+			};
+
+			qspi_data01: qspi-data01 {
+				pinmux-data {
+					pins = "gpio91", "gpio92";
+					function = "qspi_data";
+				};
+			};
+
+			qspi_data12: qspi-data12 {
+				pinmux-data {
+					pins = "gpio93", "gpio94";
+					function = "qspi_data";
+				};
+			};
+
 			qup_i2c0_default: qup-i2c0-default {
 				pinmux {
 					pins = "gpio0", "gpio1";

@@ -1070,6 +1105,18 @@
 			};
 		};
 
+		qspi: spi@88df000 {
+			compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
+			reg = <0x88df000 0x600>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+				 <&gcc GCC_QSPI_CORE_CLK>;
+			clock-names = "iface", "core";
+			status = "disabled";
+		};
+
 		usb_1_hsphy: phy@88e2000 {
 			compatible = "qcom,sdm845-qusb2-phy";
 			reg = <0x88e2000 0x400>;
Signature · 1 line
2.19.0.605.g01d371f741-goog
Reviewed-by on v2 1/1
#1 lore raw

Quoting Douglas Anderson (2018-10-08 13:17:11)

Quoted 9 lines

This adds the Quad SPI controller to the main sdm845 device tree file. Boards will be expected to assign the proper pinctrl depending on how many chip selects they have hooked up and how many data lines.

This depends on commit 48735597f7bd ("clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header") to add the needed defines. It also shouldn't land until the patch ("dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation") [1] lands.

Quoted 4 lines

[1] https://lkml.kernel.org/r/[email protected]

Signed-off-by Douglas Anderson <[email protected]>

---

Reviewed-by Stephen Boyd <[email protected]>
author
#2 lore raw

Andy,

Quoted 11 lines · Stephen Boyd

Quoting Douglas Anderson (2018-10-08 13:17:11)

Quoted 9 lines

This adds the Quad SPI controller to the main sdm845 device tree file. Boards will be expected to assign the proper pinctrl depending on how many chip selects they have hooked up and how many data lines.

This depends on commit 48735597f7bd ("clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header") to add the needed defines. It also shouldn't land until the patch ("dt-bindings: spi: Qualcomm Quad SPI(QSPI) documentation") [1] lands.

Quoted 6 lines
Quoted 4 lines

[1] https://lkml.kernel.org/r/[email protected]

Signed-off-by Douglas Anderson <[email protected]>

---

Reviewed-by Stephen Boyd <[email protected]>

Any reason why this patch can't land?

Thanks!

-Doug

build bot
#3 lore raw
In reply to Douglas Anderson
Thank you for the patch! Yet something to improve:

Hi Douglas,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on agross/for-next]
[cannot apply to v4.19-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Douglas-Anderson/arm64-dts-qcom-sdm845-Add-qspi-quad-SPI-node/20181009-095328
base:   https://git.kernel.org/pub/scm/linux/kernel/git/agross/linux.git for-next
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gnu-gcc (Debian 7.2.0-11) 7.2.0

reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.2.0 make.cross ARCH=arm64

All errors (new ones prefixed by >>):

>> Error: arch/arm64/boot/dts/qcom/sdm845.dtsi:1114.19-20 syntax error

FATAL ERROR: Unable to parse input tree

---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation