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ARM: socfpga: Clean unused functions

PATCH In review Clément Péron 3 participants 7 messages Oct 9, 2018 – Nov 8, 2018 1 message not in the archive

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#0 lore raw

PATCH v2 1/3 ARM: socfpga: Clean unused functions

These functions are unused externally, removed them and declare the one used locally as static.

---
 arch/arm/mach-socfpga/core.h    | 2 --
 arch/arm/mach-socfpga/socfpga.c | 2 +-
 2 files changed, 1 insertion(+), 3 deletions(-)
arch/arm/mach-socfpga/core.h +0 -2
index 65e1817d8afe..92cae0a9213f 100644
@@ -34,8 +34,6 @@
 
 #define RSTMGR_MPUMODRST_CPU1		0x2     /* CPU1 Reset */
 
-extern void socfpga_init_clocks(void);
-extern void socfpga_sysmgr_init(void);
 void socfpga_init_l2_ecc(void);
 void socfpga_init_ocram_ecc(void);
 void socfpga_init_arria10_l2_ecc(void);
arch/arm/mach-socfpga/socfpga.c +1 -1
index dde14f7bf2c3..5fb6f79059a8 100644
@@ -32,7 +32,7 @@ void __iomem *rst_manager_base_addr;
 void __iomem *sdr_ctl_base_addr;
 unsigned long socfpga_cpu1start_addr;
 
-void __init socfpga_sysmgr_init(void)
+static void __init socfpga_sysmgr_init(void)
 {
 	struct device_node *np;
 
Signature · 1 line
2.17.1
#1 lore raw

PATCH v2 2/3 ARM: socfpga: Turn on all peripheral clocks for a system reboot

From: Dinh Nguyen <[email protected]>

When doing a software reboot, all peripheral clocks must get turned on for the L3 interconnect to work.

This code is needed when doing a "reboot" from user-space and a peripheral clock as been gated off. Why would a peripheral clock get gated? An example use case would be a .ko that gets insmod and rmmod during runtime. The insmod would turn on the IP's clock, and the rmmod would turn off the IP's clock. Doing a "reboot" would cause the system to hang.

---

v2:
- Remove fixes tag in commit log

 arch/arm/mach-socfpga/core.h    | 3 +++
 arch/arm/mach-socfpga/socfpga.c | 8 ++++++++
 2 files changed, 11 insertions(+)
arch/arm/mach-socfpga/core.h +3 -0
index 92cae0a9213f..17c8a97c04d9 100644
@@ -52,4 +52,7 @@ extern unsigned long socfpga_cpu1start_addr;
 
 #define SOCFPGA_SCU_VIRT_BASE   0xfee00000
 
+/* Clock manager defines */
+#define SOCFPGA_ENABLE_PLL_REG	0xA0
+
 #endif
arch/arm/mach-socfpga/socfpga.c +8 -0
index 5fb6f79059a8..c9c881f7c67c 100644
@@ -31,6 +31,7 @@ void __iomem *sys_manager_base_addr;
 void __iomem *rst_manager_base_addr;
 void __iomem *sdr_ctl_base_addr;
 unsigned long socfpga_cpu1start_addr;
+void __iomem *clkmgr_base_addr;
 
 static void __init socfpga_sysmgr_init(void)
 {
@@ -51,6 +52,10 @@ static void __init socfpga_sysmgr_init(void)
 	np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
 	rst_manager_base_addr = of_iomap(np, 0);
 
+	np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr");
+	clkmgr_base_addr = of_iomap(np, 0);
+	WARN_ON(!clkmgr_base_addr);
+
 	np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl");
 	sdr_ctl_base_addr = of_iomap(np, 0);
 }
@@ -80,6 +85,9 @@ static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd)
 {
 	u32 temp;
 
+	/* Turn on all periph PLL clocks */
+	writel(0xffff, clkmgr_base_addr + SOCFPGA_ENABLE_PLL_REG);
+
 	temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);
 
 	if (mode == REBOOT_HARD)
Signature · 1 line
2.17.1
#2 lore raw

PATCH v2 3/3 ARM: socfpga: Turn on ARM errata for L2 cache

In reply to Clément Péron

From: Dinh Nguyen <[email protected]>

Turn on these ARM and PL310 errata for SoCFPGA:

ARM_ERRATA_754322
ARM_ERRATA_764369
ARM_ERRATA_775420

PL310_ERRATA_588369
PL310_ERRATA_727915
PL310_ERRATA_753970
PL310_ERRATA_769419

---

v2:
- Remove fixes tag in commit log

 arch/arm/mach-socfpga/Kconfig | 7 +++++++
 1 file changed, 7 insertions(+)
arch/arm/mach-socfpga/Kconfig +7 -0
index 4adb901dd5eb..a04660918d71 100644
@@ -11,6 +11,13 @@ menuconfig ARCH_SOCFPGA
 	select HAVE_ARM_TWD if SMP
 	select MFD_SYSCON
 	select PCI_DOMAINS if PCI
+	select ARM_ERRATA_754322
+	select ARM_ERRATA_764369 if SMP
+	select ARM_ERRATA_775420
+	select PL310_ERRATA_588369
+	select PL310_ERRATA_727915
+	select PL310_ERRATA_753970 if PL310
+	select PL310_ERRATA_769419
 
 if ARCH_SOCFPGA
 config SOCFPGA_SUSPEND
Signature · 1 line
2.17.1
#3 lore raw
In reply to Clément Péron

Hi Dinh / Russell,

Could you have a look at these patchs please ?

Thanks,
Clement

Quoted 39 lines · Cl?ment P?ron

These functions are unused externally, removed them and declare the one used locally as static.

---
 arch/arm/mach-socfpga/core.h    | 2 --
 arch/arm/mach-socfpga/socfpga.c | 2 +-
 2 files changed, 1 insertion(+), 3 deletions(-)
arch/arm/mach-socfpga/core.h +0 -2
index 65e1817d8afe..92cae0a9213f 100644
@@ -34,8 +34,6 @@
 
 #define RSTMGR_MPUMODRST_CPU1          0x2     /* CPU1 Reset */
 
-extern void socfpga_init_clocks(void);
-extern void socfpga_sysmgr_init(void);
 void socfpga_init_l2_ecc(void);
 void socfpga_init_ocram_ecc(void);
 void socfpga_init_arria10_l2_ecc(void);
arch/arm/mach-socfpga/socfpga.c +1 -2
index dde14f7bf2c3..5fb6f79059a8 100644
@@ -32,7 +32,7 @@ void __iomem *rst_manager_base_addr;
 void __iomem *sdr_ctl_base_addr;
 unsigned long socfpga_cpu1start_addr;
 
-void __init socfpga_sysmgr_init(void)
+static void __init socfpga_sysmgr_init(void)
 {
        struct device_node *np;
 
--

2.17.1

#4 lore raw
Quoted 3 lines · Cl?ment P?ron

Hi Dinh / Russell,

Could you have a look at these patchs please ?

Nothing to do with me - it's up to the socfpga maintainer and arm-soc maintainers.

Quoted 43 lines

Thanks,
Clement

Quoted 39 lines · Cl?ment P?ron

These functions are unused externally, removed them and declare the one used locally as static.

---
 arch/arm/mach-socfpga/core.h    | 2 --
 arch/arm/mach-socfpga/socfpga.c | 2 +-
 2 files changed, 1 insertion(+), 3 deletions(-)
arch/arm/mach-socfpga/core.h +0 -2
index 65e1817d8afe..92cae0a9213f 100644
@@ -34,8 +34,6 @@
 
 #define RSTMGR_MPUMODRST_CPU1          0x2     /* CPU1 Reset */
 
-extern void socfpga_init_clocks(void);
-extern void socfpga_sysmgr_init(void);
 void socfpga_init_l2_ecc(void);
 void socfpga_init_ocram_ecc(void);
 void socfpga_init_arria10_l2_ecc(void);
arch/arm/mach-socfpga/socfpga.c +1 -2
index dde14f7bf2c3..5fb6f79059a8 100644
@@ -32,7 +32,7 @@ void __iomem *rst_manager_base_addr;
 void __iomem *sdr_ctl_base_addr;
 unsigned long socfpga_cpu1start_addr;
 
-void __init socfpga_sysmgr_init(void)
+static void __init socfpga_sysmgr_init(void)
 {
        struct device_node *np;
 
--

2.17.1

Signature · 3 lines
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maintainer
#6 lore raw

Hi Cl?ment,

Quoted 4 lines · Cl?ment P?ron

Hi Dinh,

Could you have a look at this serie ?

I've applied 1/3 and 3/3. I need to look over 2/3 to determine if that patch is still valid. I think a better solution would be to set a clock as critical so that it doesn't get gated.

Thanks,
Dinh

#7 lore raw

Hi Dinh

Quoted 4 lines · Dinh Nguyen

Hi Cl?ment,

On 11/2/18 10:58 AM, Cl?ment P?ron wrote:

Quoted 8 lines
Quoted 4 lines

Hi Dinh,

Could you have a look at this serie ?

I've applied 1/3 and 3/3. I need to look over 2/3 to determine if that patch is still valid. I think a better solution would be to set a clock as critical so that it doesn't get gated.

Ok,
Thanks,
Cl?ment

Quoted 3 lines

Thanks,
Dinh