DW SPI: Allow to overload the management of the external CS
PATCH v2 1/1 DW SPI: Allow to overload the management of the external CS
On some platforms, as the Ocelot ones, when wanting to control the CS through software, it is not possible to do it through the GPIO controller. Indeed, this signal is managed through a dedicated range of registers inside the SoC..
By declaring the external_cs_manage function as weak, it is possible to manage the CS at platform level and then using the appropriate registers.
---
Changelog:
v1 -> v2
- Fix ocelot name
drivers/spi/designware_spi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
drivers/spi/designware_spi.c +7 -1
@@ -334,7 +334,13 @@ static int poll_transfer(struct dw_spi_priv *priv)return 0 ; } -static void external_cs_manage (struct udevice *dev,bool on) +/* +* We define external_cs_manage function as 'weak' as some targets +* (like MSCC Ocelot) don't control the external CS pin using a GPIO +* controller. These SoCs use specific registers to control by +* software the SPI pins (and especially the CS). +*/ +__weak void external_cs_manage (struct udevice *dev,bool on) {#if defined(CONFIG_DM_GPIO ) && !defined(CONFIG_SPL_BUILD )struct dw_spi_priv *priv =dev_get_priv (dev->parent);
Signature · 1 line
2.19.1
PATCH v2 1/1 DW SPI: Allow to overload the management of the external CS
Hi Jagan,
Quoted 8 lines · Gregory CLEMENT
On some platforms, as the Ocelot ones, when wanting to control the CS through software, it is not possible to do it through the GPIO controller. Indeed, this signal is managed through a dedicated range of registers inside the SoC..
By declaring the
external_cs_managefunction as weak, it is possible to manage the CS at platform level and then using the appropriate registers.
I sent this v2 nearly 2 months ago and didn't have any objection about it. So, Could you merge this patch please?
Thanks!
Quoted 31 lines
Signed-off-by Gregory CLEMENT <[email protected]>---
Changelog:
v1 -> v2
- Fix ocelot namedrivers/spi/designware_spi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)drivers/spi/designware_spi.c +7
-1@@ -334,7 +334,13 @@ static int poll_transfer(struct dw_spi_priv *priv)return 0 ; } -static void external_cs_manage (struct udevice *dev,bool on) +/* +* We define external_cs_manage function as 'weak' as some targets +* (like MSCC Ocelot) don't control the external CS pin using a GPIO +* controller. These SoCs use specific registers to control by +* software the SPI pins (and especially the CS). +*/ +__weak void external_cs_manage (struct udevice *dev,bool on) {#if defined(CONFIG_DM_GPIO ) && !defined(CONFIG_SPL_BUILD )struct dw_spi_priv *priv =dev_get_priv (dev->parent);Signature · 1 line
2.19.1
Signature · 3 lines
Gregory Clement, Bootlin Embedded Linux and Kernel engineering http://bootlin.com