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mips: Add in_le32(), out_le32() etc IO accessor functions

PATCH New Stefan Roese 3 participants 19 messages Oct 9, 2018 – Oct 28, 2018

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MIPS Arm MediaTek Arm/actions semi architecture
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Stefan Roese

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#0 lore raw

PATCH 1/14 mips: Add in_le32(), out_le32() etc IO accessor functions

in_le32() and out_le32() are needed for the bootcounter support. So lets implement these accessor functions for MIPS as well.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/include/asm/io.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/mips/include/asm/io.h +21 -0
index 957442effd..a750f6c0e4 100644
@@ -391,6 +391,27 @@ __BUILDIO(q, u64)
 #define readq				readq
 #define writeq				writeq
 
+/* in_le32(), out_le32() and friends */
+#define out_arch(type,endian,a,v)	__raw_write##type(cpu_to_##endian(v),a)
+#define in_arch(type,endian,a)		endian##_to_cpu(__raw_read##type(a))
+
+#define out_le64(a,v)	out_arch(q,le64,a,v)
+#define out_le32(a,v)	out_arch(l,le32,a,v)
+#define out_le16(a,v)	out_arch(w,le16,a,v)
+
+#define in_le64(a)	in_arch(q,le64,a)
+#define in_le32(a)	in_arch(l,le32,a)
+#define in_le16(a)	in_arch(w,le16,a)
+
+#define out_be32(a,v)	out_arch(l,be32,a,v)
+#define out_be16(a,v)	out_arch(w,be16,a,v)
+
+#define in_be32(a)	in_arch(l,be32,a)
+#define in_be16(a)	in_arch(w,be16,a)
+
+#define out_8(a,v)	__raw_writeb(v,a)
+#define in_8(a)		__raw_readb(a)
+
 #define __BUILD_MEMORY_STRING(bwlq, type)				\
 									\
 static inline void writes##bwlq(volatile void __iomem *mem,		\
Signature · 1 line
2.19.1
author
#1 lore raw

PATCH 2/14 mips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR init

This fixes an issue which has been noticed on the Gardena board, with the watchdog enabled, where the watdchdog reset (after a system hang) did result in reporting of 2.9 GiB and a hang after this. With this patch applied the memory controller is correctly reset and initialized again even after a watchdog reset.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/mach-mt7620/lowlevel_init.S | 6 ++++++
 1 file changed, 6 insertions(+)
arch/mips/mach-mt7620/lowlevel_init.S +6 -0
index 1a50f160fe..aa707e0de6 100644
@@ -108,6 +108,12 @@ CPLL_READY:
 	sw	t3, 0(t0)
 
 CPLL_DONE:
+	/* Reset MC */
+	lw	t2, 0x34(s0)
+	ori	t2, BIT(10)
+	sw	t2, 0x34(s0)
+	nop
+
 	/*
 	 * SDR and DDR initialization: delay 200us
 	 */
Signature · 1 line
2.19.1
#2 lore raw

PATCH 2/14 mips: mt76xx: lowlevel_init.S: Add missing memory controller reset in DDR init

Am 09.10.18 um 08:59 schrieb Stefan Roese:

Quoted 6 lines

This fixes an issue which has been noticed on the Gardena board, with the watchdog enabled, where the watdchdog reset (after a system hang) did result in reporting of 2.9 GiB and a hang after this. With this patch applied the memory controller is correctly reset and initialized again even after a watchdog reset.

Quoted 6 lines
Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/mach-mt7620/lowlevel_init.S | 6 ++++++
 1 file changed, 6 insertions(+)

applied to u-boot-mips/next, thanks.

Signature · 9 lines
- Daniel

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author
#3 lore raw

PATCH 3/14 mips: mt76xx: Enable SYS_MIPS_CACHE_INIT_RAM_LOAD for cache init

In reply to Stefan Roese

Using CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD should ensure that the cache is initialized correctly (parity etc). Even though some issues are still seen on the linkit and gardena MT7688 platforms, which could be a result of a non-optimal cache configuration / setup.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/mach-mt7620/Kconfig | 1 +
 1 file changed, 1 insertion(+)
arch/mips/mach-mt7620/Kconfig +1 -0
index 13a7bd2cc0..e42d918ba0 100644
@@ -13,6 +13,7 @@ choice
 config SOC_MT7620
 	bool "MT7620/8"
 	select MIPS_L1_CACHE_SHIFT_5
+	select SYS_MIPS_CACHE_INIT_RAM_LOAD
 	help
 	  This supports MediaTek MIPS MT7620 family.
Signature · 1 line
2.19.1
#4 lore raw

PATCH 3/14 mips: mt76xx: Enable SYS_MIPS_CACHE_INIT_RAM_LOAD for cache init

Am 09.10.18 um 08:59 schrieb Stefan Roese:

Quoted 4 lines

Using CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD should ensure that the cache is initialized correctly (parity etc). Even though some issues are still seen on the linkit and gardena MT7688 platforms, which could be a result of a non-optimal cache configuration / setup.

I thought this doesn't really help? Also if you can't move CONFIG_MIPS_CACHE_INDEX_BASE to some SRAM space, you need to run your memory init code before the cache initialisation to have working DRAM available. But this slows down the boot time.

Quoted 20 lines
Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/mach-mt7620/Kconfig | 1 +
 1 file changed, 1 insertion(+)
arch/mips/mach-mt7620/Kconfig +1 -0
index 13a7bd2cc0..e42d918ba0 100644
@@ -13,6 +13,7 @@ choice
 config SOC_MT7620
 	bool "MT7620/8"
 	select MIPS_L1_CACHE_SHIFT_5
+	select SYS_MIPS_CACHE_INIT_RAM_LOAD
 	help
 	  This supports MediaTek MIPS MT7620 family.
Signature · 9 lines
- Daniel

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author
#5 lore raw

PATCH 4/14 mips: mt76xx: Add ethernet DT node to mt7628a.dtsi

In reply to Stefan Roese

Add the ethernet DT node to the DTS file.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/dts/mt7628a.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/mips/dts/mt7628a.dtsi +8 -0
index c14259b170..effb36681f 100644
@@ -120,6 +120,14 @@
 		};
 	};
 
+	eth at 10110000 {
+		compatible = "mediatek,mt7622-eth";
+		reg = <0x10100000 0x10000
+		       0x10110000 0x8000>;
+
+		syscon = <&sysc>;
+	};
+
 	usb_phy: usb-phy at 10120000 {
 		compatible = "mediatek,mt7628-usbphy";
 		reg = <0x10120000 0x1000>;
Signature · 1 line
2.19.1
#6 lore raw

PATCH 4/14 mips: mt76xx: Add ethernet DT node to mt7628a.dtsi

Am 09.10.18 um 08:59 schrieb Stefan Roese:

Quoted 8 lines

Add the ethernet DT node to the DTS file.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/dts/mt7628a.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

series from 4/14 to 14/14 applied to u-boot-mips/next, thanks.

Signature · 9 lines
- Daniel

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author
#7 lore raw

PATCH 5/14 mips: mt76xx: Add GPIO DT nodes to mt7628a.dtsi

In reply to Stefan Roese

Add the GPIO DT nodes to the DTS file.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/dts/mt7628a.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
arch/mips/dts/mt7628a.dtsi +32 -0
index effb36681f..8da2ca3e4d 100644
@@ -71,6 +71,38 @@
 			reg = <0x300 0x100>;
 		};
 
+		gpio at 600 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
+			reg = <0x600 0x100>;
+
+			interrupt-parent = <&intc>;
+			interrupts = <6>;
+
+			gpio0: bank at 0 {
+				reg = <0>;
+				compatible = "mtk,mt7621-gpio-bank";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			gpio1: bank at 1 {
+				reg = <1>;
+				compatible = "mtk,mt7621-gpio-bank";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+
+			gpio2: bank at 2 {
+				reg = <2>;
+				compatible = "mtk,mt7621-gpio-bank";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+		};
+
 		spi0: spi at b00 {
 			compatible = "ralink,mt7621-spi";
 			reg = <0xb00 0x40>;
Signature · 1 line
2.19.1
author
#8 lore raw

PATCH 6/14 mips: mt76xx: Add watchdog DT node to mt7628a.dtsi

In reply to Stefan Roese

Add the watchdog DT node to the DTS file.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/dts/mt7628a.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/mips/dts/mt7628a.dtsi +11 -0
index 8da2ca3e4d..70e34cfdbc 100644
@@ -48,6 +48,17 @@
 			mask = <0x1>;
 		};
 
+		watchdog: watchdog at 100 {
+			compatible = "ralink,mt7628a-wdt", "mediatek,mt7621-wdt";
+			reg = <0x100 0x30>;
+
+			resets = <&resetc 8>;
+			reset-names = "wdt";
+
+			interrupt-parent = <&intc>;
+			interrupts = <24>;
+		};
+
 		intc: interrupt-controller at 200 {
 			compatible = "ralink,rt2880-intc";
 			reg = <0x200 0x100>;
Signature · 1 line
2.19.1
author
#9 lore raw

PATCH 7/14 mips: mt76xx: Kconfig: Add ethernet and GPIO support

In reply to Stefan Roese

Imply DM_ETH and DM_GPIO for ARCH_MT7620, as this platform now supports ethernet and GPIO as well.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/Kconfig | 2 ++
 1 file changed, 2 insertions(+)
arch/mips/Kconfig +2 -0
index 071dea04ec..0aa23981d4 100644
@@ -74,6 +74,8 @@ config ARCH_MT7620
 	imply CMD_DM
 	select DISPLAY_CPUINFO
 	select DM
+	imply DM_ETH
+	imply DM_GPIO
 	select DM_SERIAL
 	imply DM_SPI
 	imply DM_SPI_FLASH
Signature · 1 line
2.19.1
author
#10 lore raw

PATCH 8/14 mips: mt76xx: Enable watchdog support

In reply to Stefan Roese

This patch enables and starts the watchdog on the MT7620 platform. Currently the WD timeout is configured to 60 seconds.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/Kconfig           |  1 +
 arch/mips/mach-mt7620/cpu.c | 40 +++++++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+)
arch/mips/Kconfig +1 -0
index 0aa23981d4..54a483075f 100644
@@ -79,6 +79,7 @@ config ARCH_MT7620
 	select DM_SERIAL
 	imply DM_SPI
 	imply DM_SPI_FLASH
+	select ARCH_MISC_INIT if WATCHDOG
 	select MIPS_TUNE_24KC
 	select OF_CONTROL
 	select ROM_EXCEPTION_VECTORS
arch/mips/mach-mt7620/cpu.c +40 -0
index 457f09f32c..87cc973b75 100644
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ram.h>
+#include <wdt.h>
 #include <asm/io.h>
 #include <linux/io.h>
 #include <linux/sizes.h>

@@ -67,3 +68,42 @@ int print_cpuinfo(void)
 
 	return 0;
 }
+
+#ifdef CONFIG_WATCHDOG
+static struct udevice *watchdog_dev;
+
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+	static ulong next_reset;
+	ulong now;
+
+	if (!watchdog_dev)
+		return;
+
+	now = get_timer(0);
+
+	/* Do not reset the watchdog too often */
+	if (now > next_reset) {
+		next_reset = now + 1000;	/* reset every 1000ms */
+		wdt_reset(watchdog_dev);
+	}
+}
+
+int arch_misc_init(void)
+{
+	/* Init watchdog */
+	if (uclass_get_device_by_seq(UCLASS_WDT, 0, &watchdog_dev)) {
+		debug("Watchdog: Not found by seq!\n");
+		if (uclass_get_device(UCLASS_WDT, 0, &watchdog_dev)) {
+			puts("Watchdog: Not found!\n");
+			return 0;
+		}
+	}
+
+	wdt_start(watchdog_dev, 60000, 0);	/* 60 seconds */
+	printf("Watchdog: Started\n");
+
+	return 0;
+}
+#endif
Signature · 1 line
2.19.1
author
#11 lore raw

PATCH 9/14 mips: mt76xx: gardena-smart-gateway: Configure GPIOs (digital vs analog)

In reply to Stefan Roese

Configure digital vs analog GPIOs as needed on this board.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 board/gardena/smart-gateway-mt7688/board.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)
board/gardena/smart-gateway-mt7688/board.c +9 -6
index 5ff546f505..838dfc205b 100644
@@ -4,14 +4,17 @@
  */
 
 #include <common.h>
-#include <asm/io.h>
+#include <linux/io.h>
+
+#define MT76XX_AGPIO_CFG	0x1000003c
 
 int board_early_init_f(void)
 {
-	/*
-	 * Nothing to be done here for this board (no UART setup etc)
-	 * right now. We might need some pin muxing, so lets keep this
-	 * function for now.
-	 */
+	void __iomem *gpio_mode;
+
+	/* Configure digital vs analog GPIOs */
+	gpio_mode = ioremap_nocache(MT76XX_AGPIO_CFG, 0x100);
+	iowrite32(0x00fe01ff, gpio_mode);
+
 	return 0;
 }
Signature · 1 line
2.19.1
author
#12 lore raw

PATCH 10/14 mips: mt76xx: gardena-smart-gateway: Add LEDs to dts

In reply to Stefan Roese

Add the available LEDs to the DTS file so that they can be used.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 .../mips/dts/gardena-smart-gateway-mt7688.dts | 59 +++++++++++++++++++
 1 file changed, 59 insertions(+)
arch/mips/dts/gardena-smart-gateway-mt7688.dts +59 -0
index ee99c3d17c..ef8a9612fd 100644
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "mt7628a.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
 	compatible = "gardena,smart-gateway-mt7688", "ralink,mt7628a-soc";

@@ -21,6 +22,64 @@
 		reg = <0x0 0x08000000>;
 	};
 
+	leds {
+		compatible = "gpio-leds";
+
+		power_blue {
+			label = "smartgw:power:blue";
+			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		power_green {
+			label = "smartgw:power:green";
+			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		power_red {
+			label = "smartgw:power:red";
+			gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_blue {
+			label = "smartgw:radio:blue";
+			gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_green {
+			label = "smartgw:radio:green";
+			gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		radio_red {
+			label = "smartgw:radio:red";
+			gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_blue {
+			label = "smartgw:internet:blue";
+			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_green {
+			label = "smartgw:internet:green";
+			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+
+		internet_red {
+			label = "smartgw:internet:red";
+			gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+			default-state = "off";
+		};
+	};
+
 	chosen {
 		bootargs = "console=ttyS0,57600";
 		stdout-path = &uart0;
Signature · 1 line
2.19.1
author
#13 lore raw

PATCH 11/14 mips: mt76xx: gardena-smart-gateway: Add board_late_init() to set LED def state

In reply to Stefan Roese

This is needed to set the LEDs automatically to a default state, as configured in the dts.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/mach-mt7620/Kconfig              | 1 +
 board/gardena/smart-gateway-mt7688/board.c | 9 +++++++++
 2 files changed, 10 insertions(+)
arch/mips/mach-mt7620/Kconfig +1 -0
index e42d918ba0..6f6952afd0 100644
@@ -25,6 +25,7 @@ choice
 config BOARD_GARDENA_SMART_GATEWAY_MT7688
 	bool "Gardena Smart Gateway"
 	depends on SOC_MT7620
+	select BOARD_LATE_INIT
 	select SUPPORTS_BOOT_RAM
 	help
 	  Gardena Smart Gateway boards have a MT7688 SoC with 128 MiB of RAM
board/gardena/smart-gateway-mt7688/board.c +9 -0
index 838dfc205b..3a1838e44a 100644
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <led.h>
 #include <linux/io.h>
 
 #define MT76XX_AGPIO_CFG	0x1000003c

@@ -18,3 +19,11 @@ int board_early_init_f(void)
 
 	return 0;
 }
+
+int board_late_init(void)
+{
+	if (IS_ENABLED(CONFIG_LED))
+		led_default_state();
+
+	return 0;
+}
Signature · 1 line
2.19.1
author
#14 lore raw

PATCH 12/14 mips: mt76xx: gardena-smart-gateway: Misc updates to dts/config/defconfig

In reply to Stefan Roese

These misc updates include the following changes:
- Change baudrate from 57600 to 115200
- Enable MIPS_BOOT_CMDLINE_LEGACY
- Enable FIT support
- Enable ethernet support
- Enable SPI NOR and NAND support
- Change MTD_UBI_BEB_LIMIT to 22
- Enable MTD Support
- Enable GPIO support
- Enable watchdog support
- Enable bootcounter support
- Enable version variable
- Change max image size from 0x80000 to 0xa0000
- Change SYS_MALLOC_LEN to 16MiB (because of UBI/UBIFS)

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 .../mips/dts/gardena-smart-gateway-mt7688.dts |  1 -
 ...gardena-smart-gateway-mt7688-ram_defconfig | 36 ++++++++++++++-----
 .../gardena-smart-gateway-mt7688_defconfig    | 36 ++++++++++++++-----
 .../configs/gardena-smart-gateway-mt7688.h    |  4 +--
 4 files changed, 58 insertions(+), 19 deletions(-)
arch/mips/dts/gardena-smart-gateway-mt7688.dts +0 -1
index ef8a9612fd..d8d88686bb 100644
@@ -81,7 +81,6 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,57600";
 		stdout-path = &uart0;
 	};
 };
configs/gardena-smart-gateway-mt7688-ram_defconfig +28 -8
index 0e2f158518..5d1a84fb3f 100644
@@ -1,55 +1,75 @@
 CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x80010000
 CONFIG_ARCH_MT7620=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MTD=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_BOOTCOUNT=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_UUID=y
 CONFIG_MTDIDS_DEFAULT="spi-nand0=spi-nand0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:-(ubi)"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:-(nand)"
 CONFIG_CMD_UBI=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
 CONFIG_CLK=y
-CONFIG_CPU=y
-CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
 CONFIG_MTD=y
+CONFIG_MTD_SPI_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_MTD_UBI_BEB_LIMIT=22
+CONFIG_PHYLIB=y
+CONFIG_PHY_FIXED=y
+CONFIG_MT76XX_ETH=y
 CONFIG_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=57600
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
 CONFIG_SYSRESET_SYSCON=y
+CONFIG_WATCHDOG=y
+CONFIG_WDT=y
+CONFIG_WDT_MT7621=y
+CONFIG_LZMA=y
configs/gardena-smart-gateway-mt7688_defconfig +28 -8
index 1213227758..7c930f0cd9 100644
@@ -4,55 +4,75 @@ CONFIG_ARCH_MT7620=y
 CONFIG_BOOT_ROM=y
 CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y
 CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MTD=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_BOOTCOUNT=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_UUID=y
 CONFIG_MTDIDS_DEFAULT="spi-nand0=spi-nand0"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:-(ubi)"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:-(nand)"
 CONFIG_CMD_UBI=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="gardena-smart-gateway-mt7688"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_HAVE_BLOCK_DEVICE=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xb000006c
 CONFIG_CLK=y
-CONFIG_CPU=y
-CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y
 CONFIG_MTD=y
+CONFIG_MTD_SPI_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_XMC=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_MTD_UBI_BEB_LIMIT=22
+CONFIG_PHYLIB=y
+CONFIG_PHY_FIXED=y
+CONFIG_MT76XX_ETH=y
 CONFIG_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=57600
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
 CONFIG_SYSRESET_SYSCON=y
+CONFIG_WATCHDOG=y
+CONFIG_WDT=y
+CONFIG_WDT_MT7621=y
+CONFIG_LZMA=y
include/configs/gardena-smart-gateway-mt7688.h +2 -2
index 0184147068..b10857a757 100644
@@ -30,7 +30,7 @@
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		64
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(16 * 1024 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
 #define CONFIG_SYS_CBSIZE		512
 

@@ -38,7 +38,7 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
 
 /* Environment settings */
-#define CONFIG_ENV_OFFSET		0x80000
+#define CONFIG_ENV_OFFSET		0xa0000
 #define CONFIG_ENV_SIZE			(64 << 10)
 #define CONFIG_ENV_SECT_SIZE		(64 << 10)
 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
Signature · 1 line
2.19.1
author
#15 lore raw

PATCH 13/14 mips: mt76xx: linkit-smart-7688: Use ioremap_nocache to get address

In reply to Stefan Roese

Use the correct function to get the uncached address to access the SoC registers.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 board/seeed/linkit-smart-7688/board.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)
board/seeed/linkit-smart-7688/board.c +5 -2
index a28abc00b8..d3d3d50c2c 100644
@@ -6,12 +6,15 @@
 #include <common.h>
 #include <asm/io.h>
 
-#define MT76XX_GPIO1_MODE	0xb0000060
+#define MT76XX_GPIO1_MODE	0x10000060
 
 void board_debug_uart_init(void)
 {
+	void __iomem *gpio_mode;
+
 	/* Select UART2 mode instead of GPIO mode (default) */
-	clrbits_le32((void __iomem *)MT76XX_GPIO1_MODE, GENMASK(27, 26));
+	gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
+	clrbits_le32(gpio_mode, GENMASK(27, 26));
 }
 
 int board_early_init_f(void)
Signature · 1 line
2.19.1
author
#16 lore raw

PATCH 14/14 mips: mt76xx: linkit-smart-7688: Misc updates to dts/config/defconfig

In reply to Stefan Roese

These misc updates include the following changes:
- Change baudrate from 57600 to 115200
- Enable MIPS_BOOT_CMDLINE_LEGACY
- Enable FIT support
- Enable ethernet support
- Enable SPI support
- Enable GPIO support
- Change max image size from 0x40000 to 0x80000

A note about the baudrate change:

The original Mediatek U-Boot version used 57600 baud. Lets move to a more common and faster speed of 115200 baud. And remove the "console=" property from the DT as its not needed.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/dts/linkit-smart-7688.dts     |  1 -
 configs/linkit-smart-7688-ram_defconfig | 22 +++++++++++++++-------
 configs/linkit-smart-7688_defconfig     | 22 +++++++++++++++-------
 include/configs/linkit-smart-7688.h     |  2 +-
 4 files changed, 31 insertions(+), 16 deletions(-)
arch/mips/dts/linkit-smart-7688.dts +0 -1
index df4bf907c6..c9db136f30 100644
@@ -22,7 +22,6 @@
 	};
 
 	chosen {
-		bootargs = "console=ttyS0,57600";
 		stdout-path = &uart2;
 	};
 };
configs/linkit-smart-7688-ram_defconfig +15 -7
index 77cd1c1575..bca7449971 100644
@@ -1,35 +1,38 @@
 CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x80010000
 CONFIG_ARCH_MT7620=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
+CONFIG_BOARD_LINKIT_SMART_7688=y
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TIME=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_HAVE_BLOCK_DEVICE=y
 CONFIG_CLK=y
-CONFIG_CPU=y
-CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y

@@ -40,12 +43,17 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_FIXED=y
+CONFIG_MT76XX_ETH=y
 CONFIG_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=57600
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
 CONFIG_SYSRESET_SYSCON=y
+CONFIG_LZMA=y
+CONFIG_LZO=y
configs/linkit-smart-7688_defconfig +15 -7
index 62cdda1e0a..4435b06fba 100644
@@ -1,39 +1,42 @@
 CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x9c000000
 CONFIG_ARCH_MT7620=y
+CONFIG_BOARD_LINKIT_SMART_7688=y
 CONFIG_BOOT_ROM=y
 CONFIG_ONBOARD_DDR2_SIZE_1024MBIT=y
 CONFIG_ONBOARD_DDR2_CHIP_WIDTH_16BIT=y
-# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set
 # CONFIG_MIPS_BOOT_ENV_LEGACY is not set
 CONFIG_MIPS_BOOT_FDT=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_IMAGE_FORMAT_LEGACY=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_LICENSE=y
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_CRC32 is not set
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_NET is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
 CONFIG_CMD_TIME=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="linkit-smart-7688"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_NET_RANDOM_ETHADDR=y
 # CONFIG_DM_DEVICE_REMOVE is not set
 CONFIG_HAVE_BLOCK_DEVICE=y
 CONFIG_CLK=y
-CONFIG_CPU=y
-CONFIG_DM_GPIO=y
 CONFIG_LED=y
 CONFIG_LED_BLINK=y
 CONFIG_LED_GPIO=y

@@ -44,12 +47,17 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_FIXED=y
+CONFIG_MT76XX_ETH=y
 CONFIG_PHY=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_RAM=y
 CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=57600
 # CONFIG_SPL_SERIAL_PRESENT is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
+CONFIG_MT7621_SPI=y
 CONFIG_SYSRESET_SYSCON=y
+CONFIG_LZMA=y
+CONFIG_LZO=y
include/configs/linkit-smart-7688.h +1 -1
index 78efa23279..3bae92d0ee 100644
@@ -38,7 +38,7 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
 
 /* Environment settings */
-#define CONFIG_ENV_OFFSET		0x40000
+#define CONFIG_ENV_OFFSET		0x80000
 #define CONFIG_ENV_SIZE			(16 << 10)
 #define CONFIG_ENV_SECT_SIZE		(64 << 10)
Signature · 1 line
2.19.1
#17 lore raw

PATCH 1/14 mips: Add in_le32(), out_le32() etc IO accessor functions

In reply to Stefan Roese

Hi Stefan,

Quoted 8 lines · On Tue, 9 Oct 2018 08:59:03 +0200 Stefan Roese sr at denx.de wrote:

in_le32() and out_le32() are needed for the bootcounter support. So lets implement these accessor functions for MIPS as well.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
 arch/mips/include/asm/io.h | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

There is a similar patch pending:

http://patchwork.ozlabs.org/patch/978674/

Thanks,
Anatolij

author
#18 lore raw

PATCH 1/14 mips: Add in_le32(), out_le32() etc IO accessor functions

Hi Anatolij,

Quoted 14 lines · Anatolij Gustschin

Hi Stefan,

Quoted 8 lines · On Tue, 9 Oct 2018 08:59:03 +0200 Stefan Roese sr at denx.de wrote:

in_le32() and out_le32() are needed for the bootcounter support. So lets implement these accessor functions for MIPS as well.

Signed-off-by Stefan Roese <[email protected]>
Cc Daniel Schwierzeck <[email protected]>
---
  arch/mips/include/asm/io.h | 21 +++++++++++++++++++++
  1 file changed, 21 insertions(+)
Quoted 3 lines

There is a similar patch pending:

   http://patchwork.ozlabs.org/patch/978674/

Yes, thanks. Looks pretty identical. Please go ahead with this one from Mario and my patch can be dropped from this series then.

Thanks,
Stefan