clk: at91: Rework DT bindings
Subsystems (3)
Alexandre Belloni
maintainerv2 cover clk: at91: Rework DT bindings
This is the promised rework of the at91 PMC clocks driver. It is mainly necessary to remove the DTC warnings but it also complies with the CCF rule that there should be one node per controller instead of one node per clock.
This only handles the PMC, I'm planning to also rework the SCKC bindings later (without breaking the DT ABI).
The series is based on top of v4.19-rc1.
The first two patches are actually fixes and may be considered for this cycle.
I'll take the device tree changes through the at91 tree as DT backward compatibility is working.
Changes in v2:
- Add at91sam926x and at91sam9rl drivers
- use CLK_OF_DECLARE_DRIVER
- Add helpers to allocate for the proper number of clocks
- Collected Rob's acks
Alexandre Belloni (22):
clk: at91: audio-pll: fix audio pmc type
clk: at91: generated: SSCs don't have a gclk
clk: at91: h32mx: separate registration from DT parsing
clk: at91: audio-pll: separate registration from DT parsing
clk: at91: generated: set audio_pll_allowed in
at91_clk_register_generated()
clk: at91: allow clock registration from C code
clk: at91: add pmc_data struct and helpers
dt-bindings: clk: at91: Document new PMC binding
clk: at91: add new DT lookup function
clk: at91: add sama5d4 pmc driver
clk: at91: add sama5d2 PMC driver
clk: at91: add at91sam9260 PMC driver
clk: at91: add at91sam9x5 PMCs driver
clk: at91: add at91sam9rl PMC driver
clk: at91: move DT compatibility code to its own file
ARM: dts: at91: sama5d4: switch to new clock bindings
ARM: dts: at91: sama5d2: switch to new binding
ARM: dts: at91: at91sam9260: switch to new clock bindings
ARM: dts: at91: at91sam9261: switch to new clock bindings
ARM: dts: at91: at91sam9263: switch to new clock bindings
ARM: dts: at91: at91sam9x5: switch to new clock bindings
ARM: dts: at91: at91sam9rl: switch to new clock bindings
.../devicetree/bindings/clock/at91-clock.txt | 516 +--------- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 12 +- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 +- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 4 +- arch/arm/boot/dts/at91-sama5d4ek.dts | 2 +- arch/arm/boot/dts/at91sam9260.dtsi | 308 +----- arch/arm/boot/dts/at91sam9261.dtsi | 287 +----- arch/arm/boot/dts/at91sam9263.dtsi | 315 +----- arch/arm/boot/dts/at91sam9g15.dtsi | 4 + arch/arm/boot/dts/at91sam9g20.dtsi | 23 +- arch/arm/boot/dts/at91sam9g25.dtsi | 4 + arch/arm/boot/dts/at91sam9g25ek.dts | 4 +- arch/arm/boot/dts/at91sam9g35.dtsi | 4 + arch/arm/boot/dts/at91sam9rl.dtsi | 239 +---- arch/arm/boot/dts/at91sam9x25.dtsi | 4 + arch/arm/boot/dts/at91sam9x35.dtsi | 4 + arch/arm/boot/dts/at91sam9x5.dtsi | 326 +----- arch/arm/boot/dts/at91sam9x5_can.dtsi | 18 +- arch/arm/boot/dts/at91sam9x5_isi.dtsi | 11 +- arch/arm/boot/dts/at91sam9x5_lcd.dtsi | 19 +- arch/arm/boot/dts/at91sam9x5_macb0.dtsi | 11 +- arch/arm/boot/dts/at91sam9x5_macb1.dtsi | 11 +- arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 11 +- arch/arm/boot/dts/sama5d2.dtsi | 642 +----------- arch/arm/boot/dts/sama5d4.dtsi | 535 +--------- drivers/clk/at91/Makefile | 5 +- drivers/clk/at91/at91sam9260.c | 494 +++++++++ drivers/clk/at91/at91sam9rl.c | 171 ++++ drivers/clk/at91/at91sam9x5.c | 309 ++++++ drivers/clk/at91/clk-audio-pll.c | 107 +- drivers/clk/at91/clk-generated.c | 81 +- drivers/clk/at91/clk-h32mx.c | 22 +- drivers/clk/at91/clk-i2s-mux.c | 40 +- drivers/clk/at91/clk-main.c | 112 +- drivers/clk/at91/clk-master.c | 99 +- drivers/clk/at91/clk-peripheral.c | 81 +- drivers/clk/at91/clk-pll.c | 187 +--- drivers/clk/at91/clk-plldiv.c | 27 +- drivers/clk/at91/clk-programmable.c | 81 +- drivers/clk/at91/clk-slow.c | 32 +- drivers/clk/at91/clk-smd.c | 34 +- drivers/clk/at91/clk-system.c | 39 +- drivers/clk/at91/clk-usb.c | 94 +- drivers/clk/at91/clk-utmi.c | 45 +- drivers/clk/at91/dt-compat.c | 961 ++++++++++++++++++ drivers/clk/at91/pmc.c | 78 ++ drivers/clk/at91/pmc.h | 159 +++ drivers/clk/at91/sama5d2.c | 336 ++++++ drivers/clk/at91/sama5d4.c | 264 +++++ include/dt-bindings/clock/at91.h | 15 + 50 files changed, 3185 insertions(+), 4004 deletions(-) create mode 100644 drivers/clk/at91/at91sam9260.c create mode 100644 drivers/clk/at91/at91sam9rl.c create mode 100644 drivers/clk/at91/at91sam9x5.c create mode 100644 drivers/clk/at91/dt-compat.c create mode 100644 drivers/clk/at91/sama5d2.c create mode 100644 drivers/clk/at91/sama5d4.c
Signature · 1 line
2.19.1
Alexandre Belloni
maintainerPATCH v2 1/22 clk: at91: audio-pll: fix audio pmc type
The allocation for the audio pmc is using the size of struct clk_audio_pad instead of struct clk_audio_pmc. This works fine because the former is larger than the latter but it is safer to be correct.
Fixes ("0865805d82d4 clk: at91: add audio pll clock drivers")
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/clk-audio-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clk/at91/clk-audio-pll.c +1 -1
@@ -509,7 +509,7 @@ static void __init of_sama5d2_clk_audio_pll_pad_setup(struct device_node *np)static void __init of_sama5d2_clk_audio_pll_pmc_setup (struct device_node *np) { -struct clk_audio_pad *apmc_ck; +struct clk_audio_pmc *apmc_ck;struct clk_init_data init = {}; apmc_ck =kzalloc (sizeof (*apmc_ck),GFP_KERNEL );
Signature · 1 line
2.19.1
Re: [PATCH v2 01/22] clk: at91: audio-pll: fix audio pmc type
Quoting Alexandre Belloni (2018-10-16 07:21:39)
Quoted 7 lines
The allocation for the audio pmc is using the size of struct
clk_audio_padinstead of structclk_audio_pmc. This works fine because the former is larger than the latter but it is safer to be correct.Fixes ("0865805d82d4 clk: at91: add audio pll clock drivers")Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 2/22 clk: at91: generated: SSCs don't have a gclk
In reply to Alexandre BelloniAs the SSCs don't have gclk, don't check for their ID to allow them to set the audio pll rate.
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/clk-generated.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
drivers/clk/at91/clk-generated.c +1 -4
@@ -26,8 +26,6 @@#define GENERATED_SOURCE_MAX 6#define GENERATED_MAX_DIV 255 -#define GCK_ID_SSC0 43 -#define GCK_ID_SSC1 44#define GCK_ID_I2S0 54#define GCK_ID_I2S1 55#define GCK_ID_CLASSD 59
@@ -368,8 +366,7 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)if (of_device_is_compatible (np,"atmel,sama5d2-clk-generated" )) { -if (gck->id ==GCK_ID_SSC0 || gck->id ==GCK_ID_SSC1 || - gck->id ==GCK_ID_I2S0 || gck->id ==GCK_ID_I2S1 || +if (gck->id ==GCK_ID_I2S0 || gck->id ==GCK_ID_I2S1 || gck->id ==GCK_ID_CLASSD ) gck->audio_pll_allowed = true;else
Signature · 1 line
2.19.1
Re: [PATCH v2 02/22] clk: at91: generated: SSCs don't have a gclk
Quoting Alexandre Belloni (2018-10-16 07:21:40)
Quoted 5 lines
As the SSCs don't have gclk, don't check for their ID to allow them to set the audio pll rate.
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 3/22 clk: at91: h32mx: separate registration from DT parsing
In reply to Alexandre BelloniSeparate registration out of of_sama5d4_clk_h32mx_setup to allow other code to use it.
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/clk-h32mx.c | 40 ++++++++++++++++++++++++------------ 1 file changed, 27 insertions(+), 13 deletions(-)
drivers/clk/at91/clk-h32mx.c +27 -13
@@ -86,25 +86,19 @@ static const struct clk_ops h32mx_ops = { .set_rate = clk_sama5d4_h32mx_set_rate, }; -static void __init of_sama5d4_clk_h32mx_setup (struct device_node *np) +struct clk_hw *__init +at91_clk_register_h32mx (struct regmap *regmap,const char *name, +const char *parent_name) {struct clk_sama5d4_h32mx *h32mxclk;struct clk_init_data init; -const char *parent_name; -struct regmap *regmap;int ret; - regmap =syscon_node_to_regmap (of_get_parent (np)); -if (IS_ERR (regmap)) -return ; - h32mxclk =kzalloc (sizeof (*h32mxclk),GFP_KERNEL );if (!h32mxclk) -return ; - - parent_name =of_clk_get_parent_name (np,0 ); +return ERR_PTR (-ENOMEM ); - init.name = np->name; + init.name = name; init.ops = &h32mx_ops; init.parent_names = parent_name ? &parent_name :NULL ; init.num_parents = parent_name ?1 :0 ;
@@ -116,10 +110,30 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np) ret =clk_hw_register (NULL , &h32mxclk->hw);if (ret) {kfree (h32mxclk); -return ; +return ERR_PTR (ret); } -of_clk_add_hw_provider (np, of_clk_hw_simple_get, &h32mxclk->hw); +return &h32mxclk->hw; +} + +static void __init of_sama5d4_clk_h32mx_setup (struct device_node *np) +{ +struct clk_hw *hw; +const char *name = np->name; +const char *parent_name; +struct regmap *regmap; + + regmap =syscon_node_to_regmap (of_get_parent (np)); +if (IS_ERR (regmap)) +return ; + + parent_name =of_clk_get_parent_name (np,0 ); + + hw =at91_clk_register_h32mx (regmap, name, parent_name); +if (IS_ERR (hw)) +return ; + +of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); }CLK_OF_DECLARE (of_sama5d4_clk_h32mx_setup,"atmel,sama5d4-clk-h32mx" , of_sama5d4_clk_h32mx_setup);
Signature · 1 line
2.19.1
Re: [PATCH v2 03/22] clk: at91: h32mx: separate registration from DT parsing
Quoting Alexandre Belloni (2018-10-16 07:21:41)
Quoted 5 lines
Separate registration out of
of_sama5d4_clk_h32mx_setupto allow other code to use it.Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 4/22 clk: at91: audio-pll: separate registration from DT parsing
In reply to Alexandre BelloniSeparate registration out of of_sama5d2_clk_audio_pll*_setup to allow other code to use it.
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/clk-audio-pll.c | 147 +++++++++++++++++++++++-------- 1 file changed, 109 insertions(+), 38 deletions(-)
drivers/clk/at91/clk-audio-pll.c +109 -38
@@ -444,85 +444,156 @@ static const struct clk_ops audio_pll_pmc_ops = { .set_rate = clk_audio_pll_pmc_set_rate, }; -static int of_sama5d2_clk_audio_pll_setup (struct device_node *np, -struct clk_init_data *init, -struct clk_hw *hw, -struct regmap **clk_audio_regmap) +struct clk_hw *__init +at91_clk_register_audio_pll_frac (struct regmap *regmap,const char *name, +const char *parent_name) { -struct regmap *regmap; -const char *parent_names[1 ]; +struct clk_audio_frac *frac_ck; +struct clk_init_data init = {};int ret; - regmap =syscon_node_to_regmap (of_get_parent (np)); -if (IS_ERR (regmap)) -return PTR_ERR (regmap); + frac_ck =kzalloc (sizeof (*frac_ck),GFP_KERNEL ); +if (!frac_ck) +return ERR_PTR (-ENOMEM ); - init->name = np->name; -of_clk_parent_fill (np, parent_names,1 ); - init->parent_names = parent_names; - init->num_parents =1 ; + init.name = name; + init.ops = &audio_pll_frac_ops; + init.parent_names = &parent_name; + init.num_parents =1 ; + init.flags =CLK_SET_RATE_GATE ; - hw->init = init; - *clk_audio_regmap = regmap; + frac_ck->hw.init = &init; + frac_ck->regmap = regmap; - ret =clk_hw_register (NULL , hw); -if (ret) -return ret; + ret =clk_hw_register (NULL , &frac_ck->hw); +if (ret) { +kfree (frac_ck); +return ERR_PTR (ret); + } -return of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); +return &frac_ck->hw; }static void __init of_sama5d2_clk_audio_pll_frac_setup (struct device_node *np) { -struct clk_audio_frac *frac_ck; -struct clk_init_data init = {}; +struct clk_hw *hw; +const char *name = np->name; +const char *parent_name; +struct regmap *regmap; - frac_ck =kzalloc (sizeof (*frac_ck),GFP_KERNEL ); -if (!frac_ck) + regmap =syscon_node_to_regmap (of_get_parent (np)); +if (IS_ERR (regmap))return ; - init.ops = &audio_pll_frac_ops; - init.flags =CLK_SET_RATE_GATE ; + parent_name =of_clk_get_parent_name (np,0 ); -if (of_sama5d2_clk_audio_pll_setup (np, &init, &frac_ck->hw, - &frac_ck->regmap)) -kfree (frac_ck); + hw =at91_clk_register_audio_pll_frac (regmap, name, parent_name); +if (IS_ERR (hw)) +return ; + +of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); } -static void __init of_sama5d2_clk_audio_pll_pad_setup (struct device_node *np) +struct clk_hw *__init +at91_clk_register_audio_pll_pad (struct regmap *regmap,const char *name, +const char *parent_name) {struct clk_audio_pad *apad_ck; -struct clk_init_data init = {}; +struct clk_init_data init; +int ret; apad_ck =kzalloc (sizeof (*apad_ck),GFP_KERNEL );if (!apad_ck) -return ; +return ERR_PTR (-ENOMEM ); + init.name = name; init.ops = &audio_pll_pad_ops; + init.parent_names = &parent_name; + init.num_parents =1 ; init.flags =CLK_SET_RATE_GATE |CLK_SET_PARENT_GATE |CLK_SET_RATE_PARENT ; -if (of_sama5d2_clk_audio_pll_setup (np, &init, &apad_ck->hw, - &apad_ck->regmap)) + apad_ck->hw.init = &init; + apad_ck->regmap = regmap; + + ret =clk_hw_register (NULL , &apad_ck->hw); +if (ret) {kfree (apad_ck); +return ERR_PTR (ret); + } + +return &apad_ck->hw; } -static void __init of_sama5d2_clk_audio_pll_pmc_setup (struct device_node *np) +static void __init of_sama5d2_clk_audio_pll_pad_setup (struct device_node *np) +{ +struct clk_hw *hw; +const char *name = np->name; +const char *parent_name; +struct regmap *regmap; + + regmap =syscon_node_to_regmap (of_get_parent (np)); +if (IS_ERR (regmap)) +return ; + + parent_name =of_clk_get_parent_name (np,0 ); + + hw =at91_clk_register_audio_pll_pad (regmap, name, parent_name); +if (IS_ERR (hw)) +return ; + +of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); +} + +struct clk_hw *__init +at91_clk_register_audio_pll_pmc (struct regmap *regmap,const char *name, +const char *parent_name) {struct clk_audio_pmc *apmc_ck; -struct clk_init_data init = {}; +struct clk_init_data init; +int ret; apmc_ck =kzalloc (sizeof (*apmc_ck),GFP_KERNEL );if (!apmc_ck) -return ; +return ERR_PTR (-ENOMEM ); + init.name = name; init.ops = &audio_pll_pmc_ops; + init.parent_names = &parent_name; + init.num_parents =1 ; init.flags =CLK_SET_RATE_GATE |CLK_SET_PARENT_GATE |CLK_SET_RATE_PARENT ; -if (of_sama5d2_clk_audio_pll_setup (np, &init, &apmc_ck->hw, - &apmc_ck->regmap)) + apmc_ck->hw.init = &init; + apmc_ck->regmap = regmap; + + ret =clk_hw_register (NULL , &apmc_ck->hw); +if (ret) {kfree (apmc_ck); +return ERR_PTR (ret); + } + +return &apmc_ck->hw; +} + +static void __init of_sama5d2_clk_audio_pll_pmc_setup (struct device_node *np) +{ +struct clk_hw *hw; +const char *name = np->name; +const char *parent_name; +struct regmap *regmap; + + regmap =syscon_node_to_regmap (of_get_parent (np)); +if (IS_ERR (regmap)) +return ; + + parent_name =of_clk_get_parent_name (np,0 ); + + hw =at91_clk_register_audio_pll_pmc (regmap, name, parent_name); +if (IS_ERR (hw)) +return ; + +of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); } CLK_OF_DECLARE(of_sama5d2_clk_audio_pll_frac_setup,
Signature · 1 line
2.19.1
Re: [PATCH v2 04/22] clk: at91: audio-pll: separate registration from DT parsing
Quoting Alexandre Belloni (2018-10-16 07:21:42)
Quoted 5 lines
Separate registration out of of_sama5d2_clk_audio_pll*_setup to allow other code to use it.
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 5/22 clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated()
In reply to Alexandre BelloniSet gck->audio_pll_allowed in at91_clk_register_generated. This makes it easier to do it from code that is not parsing device tree.
Also, this fixes an issue where the resulting clk_hw can be dereferenced before being tested for error.
Fixes 1a1a36d72e3d ("clk: at91: clk-generated: make gclk determine audio_pll rate")
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/clk-generated.c | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-)
drivers/clk/at91/clk-generated.c +10 -17
@@ -280,7 +280,7 @@ static void clk_generated_startup(struct clk_generated *gck)static struct clk_hw *__init at91_clk_register_generated (struct regmap *regmap,spinlock_t *lock,const char *name,const char **parent_names, -u8 num_parents,u8 id, +u8 num_parents,u8 id,bool pll_audio,const struct clk_range *range) {struct clk_generated *gck;
@@ -304,6 +304,7 @@ at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, gck->regmap = regmap; gck->lock = lock; gck->range = *range; + gck->audio_pll_allowed = pll_audio;clk_generated_startup (gck); hw = &gck->hw;
@@ -329,7 +330,6 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)struct device_node *gcknp;struct clk_range range =CLK_RANGE (0 ,0 );struct regmap *regmap; -struct clk_generated *gck; num_parents =of_clk_get_parent_count (np);if (num_parents ==0 || num_parents >GENERATED_SOURCE_MAX )
@@ -346,6 +346,8 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)return ;for_each_child_of_node (np, gcknp) { +bool pll_audio = false; +if (of_property_read_u32 (gcknp,"reg" , &id))continue ;
@@ -358,23 +360,14 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)of_at91_get_clk_range (gcknp,"atmel,clk-output-range" , &range); +if (of_device_is_compatible (np,"atmel,sama5d2-clk-generated" ) && + (id ==GCK_ID_I2S0 || id ==GCK_ID_I2S1 || + id ==GCK_ID_CLASSD )) + pll_audio = true; + hw =at91_clk_register_generated (regmap, &pmc_pcr_lock, name, parent_names, num_parents, - id, &range); - - gck =to_clk_generated (hw); - -if (of_device_is_compatible (np, -"atmel,sama5d2-clk-generated" )) { -if (gck->id ==GCK_ID_I2S0 || gck->id ==GCK_ID_I2S1 || - gck->id ==GCK_ID_CLASSD ) - gck->audio_pll_allowed = true; -else - gck->audio_pll_allowed = false; - }else { - gck->audio_pll_allowed = false; - } - + id, pll_audio, &range);if (IS_ERR (hw))continue ;
Signature · 1 line
2.19.1
Re: [PATCH v2 05/22] clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated()
Quoting Alexandre Belloni (2018-10-16 07:21:43)
Quoted 9 lines
Set
gck->audio_pll_allowedinat91_clk_register_generated. This makes it easier to do it from code that is not parsing device tree.Also, this fixes an issue where the resulting
clk_hwcan be dereferenced before being tested for error.Fixes 1a1a36d72e3d ("clk: at91: clk-generated: make gclk determine audio_pll rate")Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 6/22 clk: at91: allow clock registration from C code
In reply to Alexandre BelloniRemove static keyword to allow functions to be used from other units. Also move some struct and function declarations to pmc.h
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/clk-generated.c | 2 +- drivers/clk/at91/clk-i2s-mux.c | 2 +- drivers/clk/at91/clk-main.c | 8 +- drivers/clk/at91/clk-master.c | 17 +--- drivers/clk/at91/clk-peripheral.c | 4 +- drivers/clk/at91/clk-pll.c | 24 +---- drivers/clk/at91/clk-plldiv.c | 2 +- drivers/clk/at91/clk-programmable.c | 14 +-- drivers/clk/at91/clk-slow.c | 2 +- drivers/clk/at91/clk-smd.c | 2 +- drivers/clk/at91/clk-system.c | 2 +- drivers/clk/at91/clk-usb.c | 6 +- drivers/clk/at91/clk-utmi.c | 2 +- drivers/clk/at91/pmc.h | 142 ++++++++++++++++++++++++++++ 14 files changed, 170 insertions(+), 59 deletions(-)
drivers/clk/at91/clk-generated.c +1 -1
@@ -277,7 +277,7 @@ static void clk_generated_startup(struct clk_generated *gck) >> AT91_PMC_PCR_GCKDIV_OFFSET; } -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, const char *name, const char **parent_names, u8 num_parents, u8 id, bool pll_audio,
drivers/clk/at91/clk-i2s-mux.c +1 -1
@@ -48,7 +48,7 @@ static const struct clk_ops clk_i2s_mux_ops = { .determine_rate = __clk_mux_determine_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_i2s_mux_register (struct regmap *regmap,const char *name,const char *const *parent_names,unsigned int num_parents,u8 bus_id)
drivers/clk/at91/clk-main.c +4 -4
@@ -128,7 +128,7 @@ static const struct clk_ops main_osc_ops = { .is_prepared = clk_main_osc_is_prepared, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_main_osc(struct regmap *regmap, const char *name, const char *parent_name,
@@ -275,7 +275,7 @@ static const struct clk_ops main_rc_osc_ops = { .recalc_accuracy = clk_main_rc_osc_recalc_accuracy, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_main_rc_osc (struct regmap *regmap,const char *name,u32 frequency,u32 accuracy)
@@ -403,7 +403,7 @@ static const struct clk_ops rm9200_main_ops = { .recalc_rate = clk_rm9200_main_recalc_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_rm9200_main (struct regmap *regmap,const char *name,const char *parent_name)
@@ -541,7 +541,7 @@ static const struct clk_ops sam9x5_main_ops = { .get_parent = clk_sam9x5_main_get_parent, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name, const char **parent_names,
drivers/clk/at91/clk-master.c +3 -14
@@ -24,17 +24,6 @@#define MASTER_DIV_SHIFT 8#define MASTER_DIV_MASK 0x3 -struct clk_master_characteristics { -struct clk_range output; -u32 divisors[4 ]; -u8 have_div3_pres; -}; - -struct clk_master_layout { -u32 mask; -u8 pres_shift; -}; -#define to_clk_master (hw) container_of(hw, struct clk_master, hw)struct clk_master {
@@ -120,7 +109,7 @@ static const struct clk_ops master_ops = { .get_parent = clk_master_get_parent, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_master(struct regmap *regmap, const char *name, int num_parents, const char **parent_names,
@@ -161,12 +150,12 @@ at91_clk_register_master(struct regmap *regmap, } -static const struct clk_master_layout at91rm9200_master_layout = { +const struct clk_master_layout at91rm9200_master_layout = { .mask =0x31F , .pres_shift =2 , }; -static const struct clk_master_layout at91sam9x5_master_layout = { +const struct clk_master_layout at91sam9x5_master_layout = { .mask =0x373 , .pres_shift =4 , };
drivers/clk/at91/clk-peripheral.c +2 -2
@@ -104,7 +104,7 @@ static const struct clk_ops peripheral_ops = { .is_enabled = clk_peripheral_is_enabled, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_peripheral (struct regmap *regmap,const char *name,const char *parent_name,u32 id) {
@@ -331,7 +331,7 @@ static const struct clk_ops sam9x5_peripheral_ops = { .set_rate = clk_sam9x5_peripheral_set_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_sam9x5_peripheral (struct regmap *regmap,spinlock_t *lock,const char *name,const char *parent_name,u32 id,const struct clk_range *range)
drivers/clk/at91/clk-pll.c +5 -19
@@ -34,20 +34,6 @@#define PLL_OUT_SHIFT 14#define PLL_MAX_ID 1 -struct clk_pll_characteristics { -struct clk_range input; -int num_output; -struct clk_range *output; -u16 *icpll; -u8 *out; -}; - -struct clk_pll_layout { -u32 pllr_mask; -u16 mul_mask; -u8 mul_shift; -}; -#define to_clk_pll (hw) container_of(hw, struct clk_pll, hw)struct clk_pll {
@@ -285,7 +271,7 @@ static const struct clk_ops pll_ops = { .set_rate = clk_pll_set_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_pll(struct regmap *regmap, const char *name, const char *parent_name, u8 id, const struct clk_pll_layout *layout,
@@ -331,25 +317,25 @@ at91_clk_register_pll(struct regmap *regmap, const char *name, } -static const struct clk_pll_layout at91rm9200_pll_layout = { +const struct clk_pll_layout at91rm9200_pll_layout = { .pllr_mask =0x7FFFFFF , .mul_shift =16 , .mul_mask =0x7FF , }; -static const struct clk_pll_layout at91sam9g45_pll_layout = { +const struct clk_pll_layout at91sam9g45_pll_layout = { .pllr_mask =0xFFFFFF , .mul_shift =16 , .mul_mask =0xFF , }; -static const struct clk_pll_layout at91sam9g20_pllb_layout = { +const struct clk_pll_layout at91sam9g20_pllb_layout = { .pllr_mask =0x3FFFFF , .mul_shift =16 , .mul_mask =0x3F , }; -static const struct clk_pll_layout sama5d3_pll_layout = { +const struct clk_pll_layout sama5d3_pll_layout = { .pllr_mask =0x1FFFFFF , .mul_shift =18 , .mul_mask =0x7F ,
drivers/clk/at91/clk-plldiv.c +1 -1
@@ -75,7 +75,7 @@ static const struct clk_ops plldiv_ops = { .set_rate = clk_plldiv_set_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_plldiv (struct regmap *regmap,const char *name,const char *parent_name) {
drivers/clk/at91/clk-programmable.c +4 -10
@@ -25,12 +25,6 @@#define PROG_PRES (layout, pckr) ((pckr >> layout->pres_shift) & PROG_PRES_MASK)#define PROG_MAX_RM9200_CSS 3 -struct clk_programmable_layout { -u8 pres_shift; -u8 css_mask; -u8 have_slck_mck; -}; -struct clk_programmable {struct clk_hw hw;struct regmap *regmap;
@@ -170,7 +164,7 @@ static const struct clk_ops programmable_ops = { .set_rate = clk_programmable_set_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_programmable(struct regmap *regmap, const char *name, const char **parent_names, u8 num_parents, u8 id,
@@ -211,19 +205,19 @@ at91_clk_register_programmable(struct regmap *regmap,return hw; } -static const struct clk_programmable_layout at91rm9200_programmable_layout = { +const struct clk_programmable_layout at91rm9200_programmable_layout = { .pres_shift =2 , .css_mask =0x3 , .have_slck_mck =0 , }; -static const struct clk_programmable_layout at91sam9g45_programmable_layout = { +const struct clk_programmable_layout at91sam9g45_programmable_layout = { .pres_shift =2 , .css_mask =0x3 , .have_slck_mck =1 , }; -static const struct clk_programmable_layout at91sam9x5_programmable_layout = { +const struct clk_programmable_layout at91sam9x5_programmable_layout = { .pres_shift =4 , .css_mask =0x7 , .have_slck_mck =0 ,
drivers/clk/at91/clk-slow.c +1 -1
@@ -40,7 +40,7 @@ static const struct clk_ops sam9260_slow_ops = { .get_parent = clk_sam9260_slow_get_parent, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_sam9260_slow(struct regmap *regmap, const char *name, const char **parent_names,
drivers/clk/at91/clk-smd.c +1 -1
@@ -111,7 +111,7 @@ static const struct clk_ops at91sam9x5_smd_ops = { .set_rate = at91sam9x5_clk_smd_set_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91sam9x5_clk_register_smd (struct regmap *regmap,const char *name,const char **parent_names,u8 num_parents) {
drivers/clk/at91/clk-system.c +1 -1
@@ -88,7 +88,7 @@ static const struct clk_ops system_ops = { .is_prepared = clk_system_is_prepared, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_system (struct regmap *regmap,const char *name,const char *parent_name,u8 id) {
drivers/clk/at91/clk-usb.c +3 -3
@@ -192,7 +192,7 @@ static const struct clk_ops at91sam9n12_usb_ops = { .set_rate = at91sam9x5_clk_usb_set_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91sam9x5_clk_register_usb (struct regmap *regmap,const char *name,const char **parent_names,u8 num_parents) {
@@ -225,7 +225,7 @@ at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,return hw; } -static struct clk_hw *__init +struct clk_hw *__init at91sam9n12_clk_register_usb (struct regmap *regmap,const char *name,const char *parent_name) {
@@ -342,7 +342,7 @@ static const struct clk_ops at91rm9200_usb_ops = { .set_rate = at91rm9200_clk_usb_set_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91rm9200_clk_register_usb (struct regmap *regmap,const char *name,const char *parent_name,const u32 *divisors) {
drivers/clk/at91/clk-utmi.c +1 -1
@@ -125,7 +125,7 @@ static const struct clk_ops utmi_ops = { .recalc_rate = clk_utmi_recalc_rate, }; -static struct clk_hw *__init +struct clk_hw *__init at91_clk_register_utmi (struct regmap *regmap_pmc,struct regmap *regmap_sfr,const char *name,const char *parent_name) {
drivers/clk/at91/pmc.h +142 -0
151 lines not on this page · raw message
Signature · 1 line
2.19.1
Re: [PATCH v2 06/22] clk: at91: allow clock registration from C code
Quoting Alexandre Belloni (2018-10-16 07:21:44)
Quoted 5 lines
Remove static keyword to allow functions to be used from other units. Also move some struct and function declarations to
pmc.hSigned-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 7/22 clk: at91: add pmc_data struct and helpers
In reply to Alexandre BelloniAdd a new strut to handle references to all the PMC clocks and implement allocation/free helpers.
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/pmc.c | 44 ++++++++++++++++++++++++++++++++++++++++++ drivers/clk/at91/pmc.h | 17 ++++++++++++++++ 2 files changed, 61 insertions(+)
drivers/clk/at91/pmc.c +44 -0
@@ -47,6 +47,50 @@ int of_at91_get_clk_range(struct device_node *np, const char *propname, }EXPORT_SYMBOL_GPL (of_at91_get_clk_range); +void pmc_data_free (struct pmc_data *pmc_data) +{ +kfree (pmc_data->chws); +kfree (pmc_data->shws); +kfree (pmc_data->phws); +kfree (pmc_data->ghws); +} + +struct pmc_data *pmc_data_allocate (unsigned int ncore,unsigned int nsystem, +unsigned int nperiph,unsigned int ngck) +{ +struct pmc_data *pmc_data =kzalloc (sizeof (*pmc_data),GFP_KERNEL ); + +if (!pmc_data) +return NULL ; + + pmc_data->ncore = ncore; + pmc_data->chws =kcalloc (ncore,sizeof (struct clk_hw *),GFP_KERNEL ); +if (!pmc_data->chws) + goto err; + + pmc_data->nsystem = nsystem; + pmc_data->shws =kcalloc (nsystem,sizeof (struct clk_hw *),GFP_KERNEL ); +if (!pmc_data->shws) + goto err; + + pmc_data->nperiph = nperiph; + pmc_data->phws =kcalloc (nperiph,sizeof (struct clk_hw *),GFP_KERNEL ); +if (!pmc_data->phws) + goto err; + + pmc_data->ngck = ngck; + pmc_data->ghws =kcalloc (ngck,sizeof (struct clk_hw *),GFP_KERNEL ); +if (!pmc_data->ghws) + goto err; + +return pmc_data; + +err: +pmc_data_free (pmc_data); + +return NULL ; +} +#ifdef CONFIG_PM static struct regmap *pmcreg;
drivers/clk/at91/pmc.h +17 -0
@@ -19,6 +19,17 @@extern spinlock_t pmc_pcr_lock; +struct pmc_data { +unsigned int ncore; +struct clk_hw **chws; +unsigned int nsystem; +struct clk_hw **shws; +unsigned int nperiph; +struct clk_hw **phws; +unsigned int ngck; +struct clk_hw **ghws; +}; +struct clk_range {unsigned long min;unsigned long max;
@@ -69,6 +80,12 @@ extern const struct clk_programmable_layout at91rm9200_programmable_layout;extern const struct clk_programmable_layout at91sam9g45_programmable_layout;extern const struct clk_programmable_layout at91sam9x5_programmable_layout; +#define ndck (a, s) (a[s - 1].id + 1) +#define nck (a) (a[ARRAY_SIZE(a) - 1].id + 1) +struct pmc_data *pmc_data_allocate (unsigned int ncore,unsigned int nsystem, +unsigned int nperiph,unsigned int ngck); +void pmc_data_free (struct pmc_data *pmc_data); +int of_at91_get_clk_range (struct device_node *np,const char *propname,struct clk_range *range);
Signature · 1 line
2.19.1
Re: [PATCH v2 07/22] clk: at91: add pmc_data struct and helpers
Quoting Alexandre Belloni (2018-10-16 07:21:45)
Quoted 5 lines
Add a new strut to handle references to all the PMC clocks and implement allocation/free helpers.
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 8/22 dt-bindings: clk: at91: Document new PMC binding
In reply to Alexandre BelloniDocument the new PMC binding with only one PMC node for all the PMC clocks instead of one node per clock as this proved to be problematic.
Reviewed-by Rob Herring <[email protected]>
Signed-off-by Alexandre Belloni <[email protected]>
--- .../devicetree/bindings/clock/at91-clock.txt | 516 +----------------- 1 file changed, 21 insertions(+), 495 deletions(-)
Documentation/devicetree/bindings/clock/at91-clock.txt +21 -495
@@ -4,6 +4,8 @@ This binding uses the common clock binding[1]. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt +Slow Clock controller: + Required properties: - compatible : shall be one of the following: "atmel,at91sam9x5-sckc" or
@@ -16,84 +18,6 @@ Required properties: "atmel,at91sam9x5-clk-slow-rc-osc": at91 internal slow RC oscillator - - "atmel,<chip>-pmc": - at91 PMC (Power Management Controller) - All at91 specific clocks (clocks defined below) must be child - node of the PMC node. - <chip> can be: at91rm9200, at91sam9260, at91sam9261, - at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9x5, - sama5d2, sama5d3 or sama5d4. - - "atmel,at91sam9x5-clk-slow" (under sckc node) - or - "atmel,at91sam9260-clk-slow" (under pmc node): - at91 slow clk - - "atmel,at91rm9200-clk-main-osc" - "atmel,at91sam9x5-clk-main-rc-osc" - at91 main clk sources - - "atmel,at91sam9x5-clk-main" - "atmel,at91rm9200-clk-main": - at91 main clock - - "atmel,at91rm9200-clk-master" or - "atmel,at91sam9x5-clk-master": - at91 master clock - - "atmel,at91sam9x5-clk-peripheral" or - "atmel,at91rm9200-clk-peripheral": - at91 peripheral clocks - - "atmel,at91rm9200-clk-pll" or - "atmel,at91sam9g45-clk-pll" or - "atmel,at91sam9g20-clk-pllb" or - "atmel,sama5d3-clk-pll": - at91 pll clocks - - "atmel,at91sam9x5-clk-plldiv": - at91 plla divisor - - "atmel,at91rm9200-clk-programmable" or - "atmel,at91sam9g45-clk-programmable" or - "atmel,at91sam9x5-clk-programmable": - at91 programmable clocks - - "atmel,at91sam9x5-clk-smd": - at91 SMD (Soft Modem) clock - - "atmel,at91rm9200-clk-system": - at91 system clocks - - "atmel,at91rm9200-clk-usb" or - "atmel,at91sam9x5-clk-usb" or - "atmel,at91sam9n12-clk-usb": - at91 usb clock - - "atmel,at91sam9x5-clk-utmi": - at91 utmi clock - - "atmel,sama5d4-clk-h32mx": - at91 h32mx clock - - "atmel,sama5d2-clk-generated": - at91 generated clock - - "atmel,sama5d2-clk-audio-pll-frac": - at91 audio fractional pll - - "atmel,sama5d2-clk-audio-pll-pad": - at91 audio pll CLK_AUDIO output pin - - "atmel,sama5d2-clk-audio-pll-pmc" - at91 audio pll output on AUDIOPLLCLK that feeds the PMC - and can be used by peripheral clock or generic clock - - "atmel,sama5d2-clk-i2s-mux" (under pmc node): - at91 I2S clock source selection - -Required properties for SCKC node: - reg : defines the IO memory reserved for the SCKC. - #size-cells : shall be 0 (reg is used to encode clk id). - #address-cells : shall be 1 (reg is used to encode clk id).
@@ -109,428 +33,30 @@ For example: /* put at91 slow clocks here */ }; +Power Management Controller (PMC): -Required properties for internal slow RC oscillator: -- #clock-cells : from common clock binding; shall be set to 0. -- clock-frequency : define the internal RC oscillator frequency. - -Optional properties: -- clock-accuracy : define the internal RC oscillator accuracy. - -For example: - slow_rc_osc: slow_rc_osc { - compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; - clock-frequency = <32768>; - clock-accuracy = <50000000>; - }; - -Required properties for slow oscillator: -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall encode the main osc source clk sources (see atmel datasheet). +Required properties: +- compatible : shall be "atmel,<chip>-pmc", "syscon": + <chip> can be: at91rm9200, at91sam9260, at91sam9261, + at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15, + at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5, + sama5d2, sama5d3 or sama5d4. +- #clock-cells : from common clock binding; shall be set to 2. The first entry + is the type of the clock (core, system, peripheral or generated) and the + second entry its index as provided by the datasheet +- clocks : Must contain an entry for each entry in clock-names. +- clock-names: Must include the following entries: "slow_clk", "main_xtal" Optional properties: - atmel,osc-bypass : boolean property. Set this when a clock signal is directly provided on XIN. For example: - slow_osc: slow_osc { - compatible = "atmel,at91rm9200-clk-slow-osc"; - #clock-cells = <0>; - clocks = <&slow_xtal>; - }; - -Required properties for slow clock: -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall encode the slow clk sources (see atmel datasheet). - -For example: - clk32k: slck { - compatible = "atmel,at91sam9x5-clk-slow"; - #clock-cells = <0>; - clocks = <&slow_rc_osc &slow_osc>; - }; - -Required properties for PMC node: -- reg : defines the IO memory reserved for the PMC. -- #size-cells : shall be 0 (reg is used to encode clk id). -- #address-cells : shall be 1 (reg is used to encode clk id). -- interrupts : shall be set to PMC interrupt line. -- interrupt-controller : tell that the PMC is an interrupt controller. -- #interrupt-cells : must be set to 1. The first cell encodes the interrupt id, - and reflect the bit position in the PMC_ER/DR/SR registers. - You can use the dt macros defined in dt-bindings/clock/at91.h. - 0 (AT91_PMC_MOSCS) -> main oscillator ready - 1 (AT91_PMC_LOCKA) -> PLL A ready - 2 (AT91_PMC_LOCKB) -> PLL B ready - 3 (AT91_PMC_MCKRDY) -> master clock ready - 6 (AT91_PMC_LOCKU) -> UTMI PLL clock ready - 8 .. 15 (AT91_PMC_PCKRDY(id)) -> programmable clock ready - 16 (AT91_PMC_MOSCSELS) -> main oscillator selected - 17 (AT91_PMC_MOSCRCS) -> RC main oscillator stabilized - 18 (AT91_PMC_CFDEV) -> clock failure detected - -For example: - pmc: pmc at fffffc00 { - compatible = "atmel,sama5d3-pmc"; - interrupts = <1 4 7>; - interrupt-controller; - #interrupt-cells = <2>; - #size-cells = <0>; - #address-cells = <1>; - - /* put at91 clocks here */ - }; - -Required properties for main clock internal RC oscillator: -- interrupts : shall be set to "<0>". -- clock-frequency : define the internal RC oscillator frequency. - -Optional properties: -- clock-accuracy : define the internal RC oscillator accuracy. - -For example: - main_rc_osc: main_rc_osc { - compatible = "atmel,at91sam9x5-clk-main-rc-osc"; - interrupt-parent = <&pmc>; - interrupts = <0>; - clock-frequency = <12000000>; - clock-accuracy = <50000000>; - }; - -Required properties for main clock oscillator: -- interrupts : shall be set to "<0>". -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall encode the main osc source clk sources (see atmel datasheet). - -Optional properties: -- atmel,osc-bypass : boolean property. Specified if a clock signal is provided - on XIN. - - clock signal is directly provided on XIN pin. - -For example: - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; - interrupt-parent = <&pmc>; - interrupts = <0>; - #clock-cells = <0>; - clocks = <&main_xtal>; - }; - -Required properties for main clock: -- interrupts : shall be set to "<0>". -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall encode the main clk sources (see atmel datasheet). - -For example: - main: mainck { - compatible = "atmel,at91sam9x5-clk-main"; - interrupt-parent = <&pmc>; - interrupts = <0>; - #clock-cells = <0>; - clocks = <&main_rc_osc &main_osc>; - }; - -Required properties for master clock: -- interrupts : shall be set to "<3>". -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall be the master clock sources (see atmel datasheet) phandles. - e.g. "<&ck32k>, <&main>, <&plla>, <&pllb>". -- atmel,clk-output-range : minimum and maximum clock frequency (two u32 - fields). - e.g. output = <0 133000000>; <=> 0 to 133MHz. -- atmel,clk-divisors : master clock divisors table (four u32 fields). - 0 <=> reserved value. - e.g. divisors = <1 2 4 6>; -- atmel,master-clk-have-div3-pres : some SoC use the reserved value 7 in the - PRES field as CLOCK_DIV3 (e.g sam9x5). - -For example: - mck: mck { - compatible = "atmel,at91rm9200-clk-master"; - interrupt-parent = <&pmc>; - interrupts = <3>; - #clock-cells = <0>; - atmel,clk-output-range = <0 133000000>; - atmel,clk-divisors = <1 2 4 0>; - }; - -Required properties for peripheral clocks: -- #size-cells : shall be 0 (reg is used to encode clk id). -- #address-cells : shall be 1 (reg is used to encode clk id). -- clocks : shall be the master clock phandle. - e.g. clocks = <&mck>; -- name: device tree node describing a specific peripheral clock. - * #clock-cells : from common clock binding; shall be set to 0. - * reg: peripheral id. See Atmel's datasheets to get a full - list of peripheral ids. - * atmel,clk-output-range : minimum and maximum clock frequency - (two u32 fields). Only valid on at91sam9x5-clk-peripheral - compatible IPs. - -For example: - periph: periphck { - compatible = "atmel,at91sam9x5-clk-peripheral"; - #size-cells = <0>; - #address-cells = <1>; - clocks = <&mck>; - - ssc0_clk { - #clock-cells = <0>; - reg = <2>; - atmel,clk-output-range = <0 133000000>; - }; - - usart0_clk { - #clock-cells = <0>; - reg = <3>; - atmel,clk-output-range = <0 66000000>; - }; - }; - - -Required properties for pll clocks: -- interrupts : shall be set to "<1>". -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall be the main clock phandle. -- reg : pll id. - 0 -> PLL A - 1 -> PLL B -- atmel,clk-input-range : minimum and maximum source clock frequency (two u32 - fields). - e.g. input = <1 32000000>; <=> 1 to 32MHz. -- #atmel,pll-clk-output-range-cells : number of cells reserved for pll output - range description. Sould be set to 2, 3 - or 4. - * 1st and 2nd cells represent the frequency range (min-max). - * 3rd cell is optional and represents the OUT field value for the given - range. - * 4th cell is optional and represents the ICPLL field (PLLICPR - register) -- atmel,pll-clk-output-ranges : pll output frequency ranges + optional parameter - depending on #atmel,pll-output-range-cells - property value. - -For example: - plla: pllack { - compatible = "atmel,at91sam9g45-clk-pll"; - interrupt-parent = <&pmc>; - interrupts = <1>; - #clock-cells = <0>; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <2000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <74500000 800000000 0 0 - 69500000 750000000 1 0 - 64500000 700000000 2 0 - 59500000 650000000 3 0 - 54500000 600000000 0 1 - 49500000 550000000 1 1 - 44500000 500000000 2 1 - 40000000 450000000 3 1>; - }; - -Required properties for plldiv clocks (plldiv = pll / 2): -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall be the plla clock phandle. - -The pll divisor is equal to 2 and cannot be changed. - -For example: - plladiv: plladivck { - compatible = "atmel,at91sam9x5-clk-plldiv"; - #clock-cells = <0>; - clocks = <&plla>; - }; - -Required properties for programmable clocks: -- #size-cells : shall be 0 (reg is used to encode clk id). -- #address-cells : shall be 1 (reg is used to encode clk id). -- clocks : shall be the programmable clock source phandles. - e.g. clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; -- name: device tree node describing a specific prog clock. - * #clock-cells : from common clock binding; shall be set to 0. - * reg : programmable clock id (register offset from PCKx - register). - * interrupts : shall be set to "<(8 + id)>". - -For example: - prog: progck { - compatible = "atmel,at91sam9g45-clk-programmable"; - #size-cells = <0>; - #address-cells = <1>; - interrupt-parent = <&pmc>; - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>; - - prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = <8>; - }; - - prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = <9>; - }; - }; - - -Required properties for smd clock: -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall be the smd clock source phandles. - e.g. clocks = <&plladiv>, <&utmi>; - -For example: - smd: smdck { - compatible = "atmel,at91sam9x5-clk-smd"; - #clock-cells = <0>; - clocks = <&plladiv>, <&utmi>; - }; - -Required properties for system clocks: -- #size-cells : shall be 0 (reg is used to encode clk id). -- #address-cells : shall be 1 (reg is used to encode clk id). -- name: device tree node describing a specific system clock. - * #clock-cells : from common clock binding; shall be set to 0. - * reg: system clock id (bit position in SCER/SCDR/SCSR registers). - See Atmel's datasheet to get a full list of system clock ids. - -For example: - system: systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - ddrck { - #clock-cells = <0>; - reg = <2>; - clocks = <&mck>; - }; - - uhpck { - #clock-cells = <0>; - reg = <6>; - clocks = <&usb>; - }; - - udpck { - #clock-cells = <0>; - reg = <7>; - clocks = <&usb>; - }; - }; - - -Required properties for usb clock: -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall be the smd clock source phandles. - e.g. clocks = <&pllb>; -- atmel,clk-divisors (only available for "atmel,at91rm9200-clk-usb"): - usb clock divisor table. - e.g. divisors = <1 2 4 0>; - -For example: - usb: usbck { - compatible = "atmel,at91sam9x5-clk-usb"; - #clock-cells = <0>; - clocks = <&plladiv>, <&utmi>; - }; - - usb: usbck { - compatible = "atmel,at91rm9200-clk-usb"; - #clock-cells = <0>; - clocks = <&pllb>; - atmel,clk-divisors = <1 2 4 0>; - }; - - -Required properties for utmi clock: -- interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>". -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall be the main clock source phandle. - -For example: - utmi: utmick { - compatible = "atmel,at91sam9x5-clk-utmi"; - interrupt-parent = <&pmc>; - interrupts = <AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>; - #clock-cells = <0>; - clocks = <&main>; - }; - -Required properties for 32 bits bus Matrix clock (h32mx clock): -- #clock-cells : from common clock binding; shall be set to 0. -- clocks : shall be the master clock source phandle. - -For example: - h32ck: h32mxck { - #clock-cells = <0>; - compatible = "atmel,sama5d4-clk-h32mx"; - clocks = <&mck>; - }; - -Required properties for generated clocks: -- #size-cells : shall be 0 (reg is used to encode clk id). -- #address-cells : shall be 1 (reg is used to encode clk id). -- clocks : shall be the generated clock source phandles. - e.g. clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>; -- name: device tree node describing a specific generated clock. - * #clock-cells : from common clock binding; shall be set to 0. - * reg: peripheral id. See Atmel's datasheets to get a full - list of peripheral ids. - * atmel,clk-output-range : minimum and maximum clock frequency - (two u32 fields). - -For example: - gck { - compatible = "atmel,sama5d2-clk-generated"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>; - - tcb0_gclk: tcb0_gclk { - #clock-cells = <0>; - reg = <35>; - atmel,clk-output-range = <0 83000000>; - }; - - pwm_gclk: pwm_gclk { - #clock-cells = <0>; - reg = <38>; - atmel,clk-output-range = <0 83000000>; - }; - }; - -Required properties for I2S mux clocks: -- #size-cells : shall be 0 (reg is used to encode I2S bus id). -- #address-cells : shall be 1 (reg is used to encode I2S bus id). -- name: device tree node describing a specific mux clock. - * #clock-cells : from common clock binding; shall be set to 0. - * clocks : shall be the mux clock parent phandles; shall be 2 phandles: - peripheral and generated clock; the first phandle shall belong to the - peripheral clock and the second one shall belong to the generated - clock; "clock-indices" property can be user to specify - the correct order. - * reg: I2S bus id of the corresponding mux clock. - e.g. reg = <0>; for i2s0, reg = <1>; for i2s1 - -For example: - i2s_clkmux { - compatible = "atmel,sama5d2-clk-i2s-mux"; - #address-cells = <1>; - #size-cells = <0>; - - i2s0muxck: i2s0_muxclk { - clocks = <&i2s0_clk>, <&i2s0_gclk>; - #clock-cells = <0>; - reg = <0>; - }; - - i2s1muxck: i2s1_muxclk { - clocks = <&i2s1_clk>, <&i2s1_gclk>; - #clock-cells = <0>; - reg = <1>; - }; + pmc: pmc at f0018000 { + compatible = "atmel,sama5d4-pmc", "syscon"; + reg = <0xf0018000 0x120>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + #clock-cells = <2>; + clocks = <&clk32k>, <&main_xtal>; + clock-names = "slow_clk", "main_xtal"; };
Signature · 1 line
2.19.1
Re: [PATCH v2 08/22] dt-bindings: clk: at91: Document new PMC binding
Quoting Alexandre Belloni (2018-10-16 07:21:46)
Quoted 6 lines
Document the new PMC binding with only one PMC node for all the PMC clocks instead of one node per clock as this proved to be problematic.
Reviewed-by Rob Herring <[email protected]>Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 9/22 clk: at91: add new DT lookup function
In reply to Alexandre BelloniAdd a new DT lookup function to lookup for PMC clocks.
Note that the #ifndef AT91_PMC_MOSCS section will be removed once all the platforms are converted.
Signed-off-by Alexandre Belloni <[email protected]>
Acked-by Rob Herring <[email protected]>
--- drivers/clk/at91/pmc.c | 34 ++++++++++++++++++++++++++++++++ include/dt-bindings/clock/at91.h | 15 ++++++++++++++ 2 files changed, 49 insertions(+)
drivers/clk/at91/pmc.c +34 -0
@@ -19,6 +19,8 @@#include <asm/proc-fns.h> +#include <dt-bindings/clock/at91.h> +#include "pmc.h" #define PMC_MAX_IDS 128
@@ -47,6 +49,38 @@ int of_at91_get_clk_range(struct device_node *np, const char *propname, }EXPORT_SYMBOL_GPL (of_at91_get_clk_range); +struct clk_hw *of_clk_hw_pmc_get (struct of_phandle_args *clkspec,void *data) +{ +unsigned int type = clkspec->args[0 ]; +unsigned int idx = clkspec->args[1 ]; +struct pmc_data *pmc_data = data; + +switch (type) { +case PMC_TYPE_CORE : +if (idx < pmc_data->ncore) +return pmc_data->chws[idx]; +break ; +case PMC_TYPE_SYSTEM : +if (idx < pmc_data->nsystem) +return pmc_data->shws[idx]; +break ; +case PMC_TYPE_PERIPHERAL : +if (idx < pmc_data->nperiph) +return pmc_data->phws[idx]; +break ; +case PMC_TYPE_GCK : +if (idx < pmc_data->ngck) +return pmc_data->ghws[idx]; +break ; +default : +break ; + } + +pr_err ("%s: invalid type (%u) or index (%u)\n" , __func__, type, idx); + +return ERR_PTR (-EINVAL ); +} +void pmc_data_free (struct pmc_data *pmc_data) {kfree (pmc_data->chws);
include/dt-bindings/clock/at91.h +15 -0
@@ -9,6 +9,20 @@#ifndef _DT_BINDINGS_CLK_AT91_H#define _DT_BINDINGS_CLK_AT91_H +#define PMC_TYPE_CORE 0 +#define PMC_TYPE_SYSTEM 1 +#define PMC_TYPE_PERIPHERAL 2 +#define PMC_TYPE_GCK 3 + +#define PMC_SLOW 0 +#define PMC_MCK 1 +#define PMC_UTMI 2 +#define PMC_MAIN 3 +#define PMC_MCK2 4 +#define PMC_I2S0_MUX 5 +#define PMC_I2S1_MUX 6 + +#ifndef AT91_PMC_MOSCS #define AT91_PMC_MOSCS 0/* MOSCS Flag */ #define AT91_PMC_LOCKA 1/* PLLA Lock */ #define AT91_PMC_LOCKB 2/* PLLB Lock */
@@ -19,5 +33,6 @@#define AT91_PMC_MOSCRCS 17/* Main On-Chip RC */ #define AT91_PMC_CFDEV 18/* Clock Failure Detector Event */ #define AT91_PMC_GCKRDY 24/* Generated Clocks */ +#endif #endif
Signature · 1 line
2.19.1
Re: [PATCH v2 09/22] clk: at91: add new DT lookup function
Quoting Alexandre Belloni (2018-10-16 07:21:47)
Quoted 8 lines
Add a new DT lookup function to lookup for PMC clocks.
Note that the #ifndef
AT91_PMC_MOSCSsection will be removed once all the platforms are converted.Signed-off-by Alexandre Belloni <[email protected]>Acked-by Rob Herring <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 10/22 clk: at91: add sama5d4 pmc driver
In reply to Alexandre BelloniAdd a driver for the PMC clocks of the sama5d4
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/Makefile | 1 + drivers/clk/at91/sama5d4.c | 264 +++++++++++++++++++++++++++++++++++++ 2 files changed, 265 insertions(+) create mode 100644 drivers/clk/at91/sama5d4.c
drivers/clk/at91/Makefile +1 -0
@@ -14,3 +14,4 @@ obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o +obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o
drivers/clk/at91/sama5d4.c new file +264 -0
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Signature · 1 line
2.19.1
Re: [PATCH v2 10/22] clk: at91: add sama5d4 pmc driver
Quoting Alexandre Belloni (2018-10-16 07:21:48)
Quoted 4 lines
Add a driver for the PMC clocks of the sama5d4
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 11/22 clk: at91: add sama5d2 PMC driver
In reply to Alexandre BelloniAdd a driver for the PMC clocks of the sama5d2
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/Makefile | 1 + drivers/clk/at91/sama5d2.c | 336 +++++++++++++++++++++++++++++++++++++ 2 files changed, 337 insertions(+) create mode 100644 drivers/clk/at91/sama5d2.c
drivers/clk/at91/Makefile +1 -0
@@ -15,3 +15,4 @@ obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o +obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o
drivers/clk/at91/sama5d2.c new file +336 -0
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Signature · 1 line
2.19.1
Re: [PATCH v2 11/22] clk: at91: add sama5d2 PMC driver
Quoting Alexandre Belloni (2018-10-16 07:21:49)
Quoted 4 lines
Add a driver for the PMC clocks of the sama5d2
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 12/22 clk: at91: add at91sam9260 PMC driver
In reply to Alexandre BelloniAdd a driver for the PMC clocks of the at91sam9260, at91sam9261, at91am9263 and at91sam9g20 SoCs.
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/Makefile | 1 + drivers/clk/at91/at91sam9260.c | 494 +++++++++++++++++++++++++++++++++ 2 files changed, 495 insertions(+) create mode 100644 drivers/clk/at91/at91sam9260.c
drivers/clk/at91/Makefile +1 -0
@@ -14,5 +14,6 @@ obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o
drivers/clk/at91/at91sam9260.c new file +494 -0
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Signature · 1 line
2.19.1
Re: [PATCH v2 12/22] clk: at91: add at91sam9260 PMC driver
Quoting Alexandre Belloni (2018-10-16 07:21:50)
Quoted 5 lines
Add a driver for the PMC clocks of the at91sam9260, at91sam9261, at91am9263 and at91sam9g20 SoCs.
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 13/22 clk: at91: add at91sam9x5 PMCs driver
In reply to Alexandre BelloniAdd a driver for the PMC clocks of the at91sam9x5 SoCs
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/Makefile | 2 +- drivers/clk/at91/at91sam9x5.c | 309 ++++++++++++++++++++++++++++++++++ 2 files changed, 310 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/at91/at91sam9x5.c
drivers/clk/at91/Makefile +1 -1
@@ -14,6 +14,6 @@ obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o -obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9x5.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o
drivers/clk/at91/at91sam9x5.c new file +309 -0
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Signature · 1 line
2.19.1
Re: [PATCH v2 13/22] clk: at91: add at91sam9x5 PMCs driver
Quoting Alexandre Belloni (2018-10-16 07:21:51)
Quoted 4 lines
Add a driver for the PMC clocks of the at91sam9x5 SoCs
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 14/22 clk: at91: add at91sam9rl PMC driver
In reply to Alexandre BelloniAdd a driver for the PMC clocks of the at91sam9rl SoC.
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/Makefile | 2 +- drivers/clk/at91/at91sam9rl.c | 171 ++++++++++++++++++++++++++++++++++ 2 files changed, 172 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/at91/at91sam9rl.c
drivers/clk/at91/Makefile +1 -1
@@ -14,6 +14,6 @@ obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o -obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9x5.o +obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9rl.o at91sam9x5.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o
drivers/clk/at91/at91sam9rl.c new file +171 -0
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Signature · 1 line
2.19.1
Re: [PATCH v2 14/22] clk: at91: add at91sam9rl PMC driver
Quoting Alexandre Belloni (2018-10-16 07:21:52)
Quoted 4 lines
Add a driver for the PMC clocks of the at91sam9rl SoC.
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 15/22 clk: at91: move DT compatibility code to its own file
In reply to Alexandre BelloniMove all the DT backward compatibility code to its own file so it can be deleted later.
Signed-off-by Alexandre Belloni <[email protected]>
--- drivers/clk/at91/Makefile | 2 +- drivers/clk/at91/clk-audio-pll.c | 70 -- drivers/clk/at91/clk-generated.c | 65 -- drivers/clk/at91/clk-h32mx.c | 22 - drivers/clk/at91/clk-i2s-mux.c | 38 -- drivers/clk/at91/clk-main.c | 104 --- drivers/clk/at91/clk-master.c | 82 --- drivers/clk/at91/clk-peripheral.c | 77 --- drivers/clk/at91/clk-pll.c | 163 ----- drivers/clk/at91/clk-plldiv.c | 25 - drivers/clk/at91/clk-programmable.c | 67 -- drivers/clk/at91/clk-slow.c | 30 - drivers/clk/at91/clk-smd.c | 32 - drivers/clk/at91/clk-system.c | 37 -- drivers/clk/at91/clk-usb.c | 88 --- drivers/clk/at91/clk-utmi.c | 43 -- drivers/clk/at91/dt-compat.c | 961 ++++++++++++++++++++++++++++ 17 files changed, 962 insertions(+), 944 deletions(-) create mode 100644 drivers/clk/at91/dt-compat.c
drivers/clk/at91/Makefile +1 -1
@@ -3,7 +3,7 @@ # Makefile for at91 specific clk # -obj-y += pmc.o sckc.o +obj-y += pmc.o sckc.o dt-compat.o obj-y += clk-slow.o clk-main.o clk-pll.o clk-plldiv.o clk-master.o obj-y += clk-system.o clk-peripheral.o clk-programmable.o
drivers/clk/at91/clk-audio-pll.c +0 -70
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drivers/clk/at91/clk-generated.c +0 -65
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drivers/clk/at91/clk-h32mx.c +0 -22
@@ -115,25 +115,3 @@ at91_clk_register_h32mx(struct regmap *regmap, const char *name,return &h32mxclk->hw; } - -static void __init of_sama5d4_clk_h32mx_setup (struct device_node *np) -{ -struct clk_hw *hw; -const char *name = np->name; -const char *parent_name; -struct regmap *regmap; - - regmap =syscon_node_to_regmap (of_get_parent (np)); -if (IS_ERR (regmap)) -return ; - - parent_name =of_clk_get_parent_name (np,0 ); - - hw =at91_clk_register_h32mx (regmap, name, parent_name); -if (IS_ERR (hw)) -return ; - -of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); -} -CLK_OF_DECLARE (of_sama5d4_clk_h32mx_setup,"atmel,sama5d4-clk-h32mx" , - of_sama5d4_clk_h32mx_setup);
drivers/clk/at91/clk-i2s-mux.c +0 -38
@@ -14,8 +14,6 @@#include <soc/at91/atmel-sfr.h> -#define I2S_BUS_NR 2 -struct clk_i2s_mux {struct clk_hw hw;struct regmap *regmap;
@@ -78,39 +76,3 @@ at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,return &i2s_ck->hw; } - -static void __init of_sama5d2_clk_i2s_mux_setup (struct device_node *np) -{ -struct regmap *regmap_sfr; -u8 bus_id; -const char *parent_names[2 ]; -struct device_node *i2s_mux_np; -struct clk_hw *hw; -int ret; - - regmap_sfr =syscon_regmap_lookup_by_compatible ("atmel,sama5d2-sfr" ); -if (IS_ERR (regmap_sfr)) -return ; - -for_each_child_of_node (np, i2s_mux_np) { -if (of_property_read_u8 (i2s_mux_np,"reg" , &bus_id)) -continue ; - -if (bus_id >I2S_BUS_NR ) -continue ; - - ret =of_clk_parent_fill (i2s_mux_np, parent_names,2 ); -if (ret !=2 ) -continue ; - - hw =at91_clk_i2s_mux_register (regmap_sfr, i2s_mux_np->name, - parent_names,2 , bus_id); -if (IS_ERR (hw)) -continue ; - -of_clk_add_hw_provider (i2s_mux_np, of_clk_hw_simple_get, hw); - } -} - -CLK_OF_DECLARE (sama5d2_clk_i2s_mux,"atmel,sama5d2-clk-i2s-mux" , - of_sama5d2_clk_i2s_mux_setup);
drivers/clk/at91/clk-main.c +0 -104
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drivers/clk/at91/clk-master.c +0 -82
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drivers/clk/at91/clk-peripheral.c +0 -77
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drivers/clk/at91/clk-pll.c +0 -163
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drivers/clk/at91/clk-plldiv.c +0 -25
@@ -106,28 +106,3 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name,return hw; } - -static void __init -of_at91sam9x5_clk_plldiv_setup (struct device_node *np) -{ -struct clk_hw *hw; -const char *parent_name; -const char *name = np->name; -struct regmap *regmap; - - parent_name =of_clk_get_parent_name (np,0 ); - -of_property_read_string (np,"clock-output-names" , &name); - - regmap =syscon_node_to_regmap (of_get_parent (np)); -if (IS_ERR (regmap)) -return ; - - hw =at91_clk_register_plldiv (regmap, name, parent_name); -if (IS_ERR (hw)) -return ; - -of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); -} -CLK_OF_DECLARE (at91sam9x5_clk_plldiv,"atmel,at91sam9x5-clk-plldiv" , - of_at91sam9x5_clk_plldiv_setup);
drivers/clk/at91/clk-programmable.c +0 -67
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drivers/clk/at91/clk-slow.c +0 -30
@@ -79,33 +79,3 @@ at91_clk_register_sam9260_slow(struct regmap *regmap,return hw; } - -static void __init of_at91sam9260_clk_slow_setup (struct device_node *np) -{ -struct clk_hw *hw; -const char *parent_names[2 ]; -unsigned int num_parents; -const char *name = np->name; -struct regmap *regmap; - - num_parents =of_clk_get_parent_count (np); -if (num_parents !=2 ) -return ; - -of_clk_parent_fill (np, parent_names, num_parents); - regmap =syscon_node_to_regmap (of_get_parent (np)); -if (IS_ERR (regmap)) -return ; - -of_property_read_string (np,"clock-output-names" , &name); - - hw =at91_clk_register_sam9260_slow (regmap, name, parent_names, - num_parents); -if (IS_ERR (hw)) -return ; - -of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); -} - -CLK_OF_DECLARE (at91sam9260_clk_slow,"atmel,at91sam9260-clk-slow" , - of_at91sam9260_clk_slow_setup);
drivers/clk/at91/clk-smd.c +0 -32
@@ -17,8 +17,6 @@#include "pmc.h" -#define SMD_SOURCE_MAX 2 -#define SMD_DIV_SHIFT 8#define SMD_MAX_DIV 0xf
@@ -142,33 +140,3 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,return hw; } - -static void __init of_at91sam9x5_clk_smd_setup (struct device_node *np) -{ -struct clk_hw *hw; -unsigned int num_parents; -const char *parent_names[SMD_SOURCE_MAX ]; -const char *name = np->name; -struct regmap *regmap; - - num_parents =of_clk_get_parent_count (np); -if (num_parents ==0 || num_parents >SMD_SOURCE_MAX ) -return ; - -of_clk_parent_fill (np, parent_names, num_parents); - -of_property_read_string (np,"clock-output-names" , &name); - - regmap =syscon_node_to_regmap (of_get_parent (np)); -if (IS_ERR (regmap)) -return ; - - hw =at91sam9x5_clk_register_smd (regmap, name, parent_names, - num_parents); -if (IS_ERR (hw)) -return ; - -of_clk_add_hw_provider (np, of_clk_hw_simple_get, hw); -} -CLK_OF_DECLARE (at91sam9x5_clk_smd,"atmel,at91sam9x5-clk-smd" , - of_at91sam9x5_clk_smd_setup);
drivers/clk/at91/clk-system.c +0 -37
@@ -123,40 +123,3 @@ at91_clk_register_system(struct regmap *regmap, const char *name,return hw; } - -static void __init of_at91rm9200_clk_sys_setup (struct device_node *np) -{ -int num; -u32 id; -struct clk_hw *hw; -const char *name; -struct device_node *sysclknp; -const char *parent_name; -struct regmap *regmap; - - num =of_get_child_count (np); -if (num > (SYSTEM_MAX_ID +1 )) -return ; - - regmap =syscon_node_to_regmap (of_get_parent (np)); -if (IS_ERR (regmap)) -return ; - -for_each_child_of_node (np, sysclknp) { -if (of_property_read_u32 (sysclknp,"reg" , &id)) -continue ; - -if (of_property_read_string (np,"clock-output-names" , &name)) - name = sysclknp->name; - - parent_name =of_clk_get_parent_name (sysclknp,0 ); - - hw =at91_clk_register_system (regmap, name, parent_name, id); -if (IS_ERR (hw)) -continue ; - -of_clk_add_hw_provider (sysclknp, of_clk_hw_simple_get, hw); - } -} -CLK_OF_DECLARE (at91rm9200_clk_sys,"atmel,at91rm9200-clk-system" , - of_at91rm9200_clk_sys_setup);
drivers/clk/at91/clk-usb.c +0 -88
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drivers/clk/at91/clk-utmi.c +0 -43
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drivers/clk/at91/dt-compat.c new file +961 -0
961 lines not on this page · raw message
Signature · 1 line
2.19.1
Re: [PATCH v2 15/22] clk: at91: move DT compatibility code to its own file
Quoting Alexandre Belloni (2018-10-16 07:21:53)
Quoted 5 lines
Move all the DT backward compatibility code to its own file so it can be deleted later.
Signed-off-by Alexandre Belloni <[email protected]>---
Applied to clk-next
Alexandre Belloni
maintainerPATCH v2 16/22 ARM: dts: at91: sama5d4: switch to new clock bindings
In reply to Alexandre BelloniSwitch sama5d4 boards to the new PMC clock bindings.
Signed-off-by Alexandre Belloni <[email protected]>
--- arch/arm/boot/dts/at91-sama5d4ek.dts | 2 +- arch/arm/boot/dts/sama5d4.dtsi | 535 +++------------------------ 2 files changed, 49 insertions(+), 488 deletions(-)
arch/arm/boot/dts/at91-sama5d4ek.dts +1 -1
@@ -115,7 +115,7 @@ wm8904: codec at 1a { compatible = "wlf,wm8904"; reg = <0x1a>; - clocks = <&pck2>; + clocks = <&pmc PMC_TYPE_SYSTEM 10>; clock-names = "mclk"; };
arch/arm/boot/dts/sama5d4.dtsi +48 -487
811 lines not on this page · raw message
Signature · 1 line
2.19.1
Alexandre Belloni
maintainerPATCH v2 17/22 ARM: dts: at91: sama5d2: switch to new binding
In reply to Alexandre BelloniSwitch sama5d2 boards to the new PMC clock bindings.
Signed-off-by Alexandre Belloni <[email protected]>
--- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 12 +- arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts | 2 +- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 4 +- arch/arm/boot/dts/sama5d2.dtsi | 642 ++------------------ 4 files changed, 64 insertions(+), 596 deletions(-)
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +6 -6
@@ -165,7 +165,7 @@ dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; - clocks = <&flx1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_i2c>; atmel,fifo-size = <16>;
@@ -211,7 +211,7 @@ compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&flx3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>;
@@ -223,7 +223,7 @@ compatible = "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&flx3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; clock-names = "spi_clk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx3_default>;
@@ -240,7 +240,7 @@ compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&flx4_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>;
@@ -252,7 +252,7 @@ compatible = "atmel,at91rm9200-spi"; reg = <0x400 0x200>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&flx4_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "spi_clk"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
@@ -268,7 +268,7 @@ dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; - clocks = <&flx4_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; atmel,fifo-size = <16>;
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dts +1 -1
@@ -196,7 +196,7 @@ dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; - clocks = <&flx0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx0_default>; atmel,fifo-size = <16>;
arch/arm/boot/dts/at91-sama5d2_xplained.dts +2 -2
@@ -258,7 +258,7 @@ compatible = "atmel,at91sam9260-usart"; reg = <0x200 0x200>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&flx0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; clock-names = "usart"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx0_default>;
@@ -307,7 +307,7 @@ dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; - clocks = <&flx4_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flx4_default>; atmel,fifo-size = <16>;
arch/arm/boot/dts/sama5d2.dtsi +55 -587
938 lines not on this page · raw message
Signature · 1 line
2.19.1
Alexandre Belloni
maintainerPATCH v2 18/22 ARM: dts: at91: at91sam9260: switch to new clock bindings
In reply to Alexandre BelloniSwitch at91sam9260 and at91sam9g20 boards to the new PMC clock bindings.
Signed-off-by Alexandre Belloni <[email protected]>
--- arch/arm/boot/dts/at91sam9260.dtsi | 308 +++-------------------------- arch/arm/boot/dts/at91sam9g20.dtsi | 23 +-- 2 files changed, 31 insertions(+), 300 deletions(-)
arch/arm/boot/dts/at91sam9260.dtsi +30 -278
@@ -113,276 +113,28 @@ compatible = "atmel,at91sam9260-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&main_xtal>; - }; - - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; - #clock-cells = <0>; - clocks = <&main_osc>; - }; - - slow_rc_osc: slow_rc_osc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-accuracy = <50000000>; - }; - - clk32k: slck { - compatible = "atmel,at91sam9260-clk-slow"; - #clock-cells = <0>; - clocks = <&slow_rc_osc>, <&slow_xtal>; - }; - - plla: pllack { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKA>; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 160000000 0 1>, - <150000000 240000000 2 1>; - }; - - pllb: pllbck { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKB>; - clocks = <&main>; - reg = <1>; - atmel,clk-input-range = <1000000 5000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; - }; - - mck: masterck { - compatible = "atmel,at91rm9200-clk-master"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; - clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; - atmel,clk-output-range = <0 105000000>; - atmel,clk-divisors = <1 2 4 0>; - }; - - usb: usbck { - compatible = "atmel,at91rm9200-clk-usb"; - #clock-cells = <0>; - atmel,clk-divisors = <1 2 4 0>; - clocks = <&pllb>; - }; - - prog: progck { - compatible = "atmel,at91rm9200-clk-programmable"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; - - prog0: prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = <AT91_PMC_PCKRDY(0)>; - }; - - prog1: prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = <AT91_PMC_PCKRDY(1)>; - }; - }; - - systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - uhpck: uhpck { - #clock-cells = <0>; - reg = <6>; - clocks = <&usb>; - }; - - udpck: udpck { - #clock-cells = <0>; - reg = <7>; - clocks = <&usb>; - }; - - pck0: pck0 { - #clock-cells = <0>; - reg = <8>; - clocks = <&prog0>; - }; - - pck1: pck1 { - #clock-cells = <0>; - reg = <9>; - clocks = <&prog1>; - }; - }; - - periphck { - compatible = "atmel,at91rm9200-clk-peripheral"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; - - pioA_clk: pioA_clk { - #clock-cells = <0>; - reg = <2>; - }; - - pioB_clk: pioB_clk { - #clock-cells = <0>; - reg = <3>; - }; - - pioC_clk: pioC_clk { - #clock-cells = <0>; - reg = <4>; - }; - - adc_clk: adc_clk { - #clock-cells = <0>; - reg = <5>; - }; - - usart0_clk: usart0_clk { - #clock-cells = <0>; - reg = <6>; - }; - - usart1_clk: usart1_clk { - #clock-cells = <0>; - reg = <7>; - }; - - usart2_clk: usart2_clk { - #clock-cells = <0>; - reg = <8>; - }; - - mci0_clk: mci0_clk { - #clock-cells = <0>; - reg = <9>; - }; - - udc_clk: udc_clk { - #clock-cells = <0>; - reg = <10>; - }; - - twi0_clk: twi0_clk { - reg = <11>; - #clock-cells = <0>; - }; - - spi0_clk: spi0_clk { - #clock-cells = <0>; - reg = <12>; - }; - - spi1_clk: spi1_clk { - #clock-cells = <0>; - reg = <13>; - }; - - ssc0_clk: ssc0_clk { - #clock-cells = <0>; - reg = <14>; - }; - - tc0_clk: tc0_clk { - #clock-cells = <0>; - reg = <17>; - }; - - tc1_clk: tc1_clk { - #clock-cells = <0>; - reg = <18>; - }; - - tc2_clk: tc2_clk { - #clock-cells = <0>; - reg = <19>; - }; - - ohci_clk: ohci_clk { - #clock-cells = <0>; - reg = <20>; - }; - - macb0_clk: macb0_clk { - #clock-cells = <0>; - reg = <21>; - }; - - isi_clk: isi_clk { - #clock-cells = <0>; - reg = <22>; - }; - - usart3_clk: usart3_clk { - #clock-cells = <0>; - reg = <23>; - }; - - uart0_clk: uart0_clk { - #clock-cells = <0>; - reg = <24>; - }; - - uart1_clk: uart1_clk { - #clock-cells = <0>; - reg = <25>; - }; - - tc3_clk: tc3_clk { - #clock-cells = <0>; - reg = <26>; - }; - - tc4_clk: tc4_clk { - #clock-cells = <0>; - reg = <27>; - }; - - tc5_clk: tc5_clk { - #clock-cells = <0>; - reg = <28>; - }; - }; + #clock-cells = <2>; + clocks = <&slow_xtal>, <&main_xtal>; + clock-names = "slow_xtal", "main_xtal"; }; rstc at fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; - clocks = <&clk32k>; + clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>; }; shdwc at fffffd10 { compatible = "atmel,at91sam9260-shdwc"; reg = <0xfffffd10 0x10>; - clocks = <&clk32k>; + clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>; }; pit: timer at fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; tcb0: timer at fffa0000 {
@@ -393,7 +145,7 @@ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0 18 IRQ_TYPE_LEVEL_HIGH 0 19 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; };
@@ -405,7 +157,7 @@ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0 27 IRQ_TYPE_LEVEL_HIGH 0 28 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; };
@@ -746,7 +498,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioA_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio at fffff600 {
@@ -757,7 +509,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioC: gpio at fffff800 {
@@ -768,7 +520,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioC_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; };
@@ -778,7 +530,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; };
@@ -791,7 +543,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; - clocks = <&usart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; status = "disabled"; };
@@ -804,7 +556,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; - clocks = <&usart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; };
@@ -817,7 +569,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; - clocks = <&usart2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; };
@@ -830,7 +582,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; - clocks = <&usart3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "usart"; status = "disabled"; };
@@ -843,7 +595,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; - clocks = <&uart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; clock-names = "usart"; status = "disabled"; };
@@ -856,7 +608,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; - clocks = <&uart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; clock-names = "usart"; status = "disabled"; };
@@ -867,7 +619,7 @@ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb_rmii>; - clocks = <&macb0_clk>, <&macb0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>; clock-names = "hclk", "pclk"; status = "disabled"; };
@@ -876,7 +628,7 @@ compatible = "atmel,at91sam9260-udc"; reg = <0xfffa4000 0x4000>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&udc_clk>, <&udpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>; clock-names = "pclk", "hclk"; status = "disabled"; };
@@ -887,7 +639,7 @@ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; status = "disabled"; };
@@ -898,7 +650,7 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; - clocks = <&mci0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "mci_clk"; status = "disabled"; };
@@ -909,7 +661,7 @@ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; - clocks = <&ssc0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "pclk"; status = "disabled"; };
@@ -922,7 +674,7 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "spi_clk"; status = "disabled"; };
@@ -935,7 +687,7 @@ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; - clocks = <&spi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "spi_clk"; status = "disabled"; };
@@ -946,7 +698,7 @@ compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&adc_clk>, <&adc_op_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>; clock-names = "adc_clk", "adc_op_clk"; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xf>;
@@ -981,7 +733,7 @@ compatible = "atmel,at91sam9260-rtt"; reg = <0xfffffd20 0x10>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&clk32k>; + clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>; status = "disabled"; };
@@ -989,7 +741,7 @@ compatible = "atmel,at91sam9260-wdt"; reg = <0xfffffd40 0x10>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&clk32k>; + clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>; atmel,watchdog-type = "hardware"; atmel,reset-type = "all"; atmel,dbg-halt;
@@ -1007,7 +759,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; };
@@ -1027,7 +779,7 @@ 0x5 0x0 0x60000000 0x10000000 0x6 0x0 0x70000000 0x10000000 0x7 0x0 0x80000000 0x10000000>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller {
arch/arm/boot/dts/at91sam9g20.dtsi +1 -22
@@ -40,28 +40,7 @@ }; pmc: pmc at fffffc00 { - plla: pllack { - atmel,clk-input-range = <2000000 32000000>; - atmel,pll-clk-output-ranges = <745000000 800000000 0 0>, - <695000000 750000000 1 0>, - <645000000 700000000 2 0>, - <595000000 650000000 3 0>, - <545000000 600000000 0 1>, - <495000000 550000000 1 1>, - <445000000 500000000 2 1>, - <400000000 450000000 3 1>; - }; - - pllb: pllbck { - compatible = "atmel,at91sam9g20-clk-pllb"; - atmel,clk-input-range = <2000000 32000000>; - atmel,pll-clk-output-ranges = <30000000 100000000 0 0>; - }; - - mck: masterck { - atmel,clk-output-range = <0 133000000>; - atmel,clk-divisors = <1 2 4 6>; - }; + compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon"; }; }; };
Signature · 1 line
2.19.1
Alexandre Belloni
maintainerPATCH v2 19/22 ARM: dts: at91: at91sam9261: switch to new clock bindings
In reply to Alexandre BelloniSwitch at91sam9261 boards to the new PMC clock bindings.
Signed-off-by Alexandre Belloni <[email protected]>
--- arch/arm/boot/dts/at91sam9261.dtsi | 287 +++-------------------------- 1 file changed, 23 insertions(+), 264 deletions(-)
arch/arm/boot/dts/at91sam9261.dtsi +23 -264
@@ -75,7 +75,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&ohci_clk>, <&hclk0>, <&uhpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 16>, <&pmc PMC_TYPE_SYSTEM 6>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; };
@@ -86,7 +86,7 @@ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fb>; - clocks = <&lcd_clk>, <&hclk1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_SYSTEM 17>; clock-names = "lcdc_clk", "hclk"; status = "disabled"; };
@@ -106,7 +106,7 @@ 0x5 0x0 0x60000000 0x10000000 0x6 0x0 0x70000000 0x10000000 0x7 0x0 0x80000000 0x10000000>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller {
@@ -132,7 +132,7 @@ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, <18 IRQ_TYPE_LEVEL_HIGH 0>, <19 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; };
@@ -140,7 +140,7 @@ compatible = "atmel,at91sam9261-udc"; reg = <0xfffa4000 0x4000>; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&udc_clk>, <&udpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>; clock-names = "pclk", "hclk"; atmel,matrix = <&matrix>; status = "disabled";
@@ -154,7 +154,7 @@ pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>; #address-cells = <1>; #size-cells = <0>; - clocks = <&mci0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "mci_clk"; status = "disabled"; };
@@ -167,7 +167,7 @@ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; status = "disabled"; };
@@ -179,7 +179,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; - clocks = <&usart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; status = "disabled"; };
@@ -192,7 +192,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; - clocks = <&usart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; };
@@ -205,7 +205,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; - clocks = <&usart2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; };
@@ -216,7 +216,7 @@ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; - clocks = <&ssc0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "pclk"; status = "disabled"; };
@@ -227,7 +227,7 @@ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; - clocks = <&ssc1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; clock-names = "pclk"; status = "disabled"; };
@@ -238,7 +238,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; - clocks = <&ssc2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; clock-names = "pclk"; status = "disabled"; };
@@ -252,7 +252,7 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "spi_clk"; status = "disabled"; };
@@ -265,7 +265,7 @@ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; - clocks = <&spi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "spi_clk"; status = "disabled"; };
@@ -299,7 +299,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; };
@@ -563,7 +563,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioA_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio at fffff600 {
@@ -574,7 +574,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioC: gpio at fffff800 {
@@ -585,7 +585,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioC_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; };
@@ -593,250 +593,9 @@ compatible = "atmel,at91sam9261-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&main_xtal>; - }; - - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; - #clock-cells = <0>; - clocks = <&main_osc>; - }; - - plla: pllack { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKA>; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, - <190000000 240000000 2 1>; - }; - - pllb: pllbck { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKB>; - clocks = <&main>; - reg = <1>; - atmel,clk-input-range = <1000000 5000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; - }; - - mck: masterck { - compatible = "atmel,at91rm9200-clk-master"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; - clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 0>; - }; - - usb: usbck { - compatible = "atmel,at91rm9200-clk-usb"; - #clock-cells = <0>; - atmel,clk-divisors = <1 2 4 0>; - clocks = <&pllb>; - }; - - prog: progck { - compatible = "atmel,at91rm9200-clk-programmable"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - - prog0: prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = <AT91_PMC_PCKRDY(0)>; - }; - - prog1: prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = <AT91_PMC_PCKRDY(1)>; - }; - - prog2: prog2 { - #clock-cells = <0>; - reg = <2>; - interrupts = <AT91_PMC_PCKRDY(2)>; - }; - - prog3: prog3 { - #clock-cells = <0>; - reg = <3>; - interrupts = <AT91_PMC_PCKRDY(3)>; - }; - }; - - systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - uhpck: uhpck { - #clock-cells = <0>; - reg = <6>; - clocks = <&usb>; - }; - - udpck: udpck { - #clock-cells = <0>; - reg = <7>; - clocks = <&usb>; - }; - - pck0: pck0 { - #clock-cells = <0>; - reg = <8>; - clocks = <&prog0>; - }; - - pck1: pck1 { - #clock-cells = <0>; - reg = <9>; - clocks = <&prog1>; - }; - - pck2: pck2 { - #clock-cells = <0>; - reg = <10>; - clocks = <&prog2>; - }; - - pck3: pck3 { - #clock-cells = <0>; - reg = <11>; - clocks = <&prog3>; - }; - - hclk0: hclk0 { - #clock-cells = <0>; - reg = <16>; - clocks = <&mck>; - }; - - hclk1: hclk1 { - #clock-cells = <0>; - reg = <17>; - clocks = <&mck>; - }; - }; - - periphck { - compatible = "atmel,at91rm9200-clk-peripheral"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; - - pioA_clk: pioA_clk { - #clock-cells = <0>; - reg = <2>; - }; - - pioB_clk: pioB_clk { - #clock-cells = <0>; - reg = <3>; - }; - - pioC_clk: pioC_clk { - #clock-cells = <0>; - reg = <4>; - }; - - usart0_clk: usart0_clk { - #clock-cells = <0>; - reg = <6>; - }; - - usart1_clk: usart1_clk { - #clock-cells = <0>; - reg = <7>; - }; - - usart2_clk: usart2_clk { - #clock-cells = <0>; - reg = <8>; - }; - - mci0_clk: mci0_clk { - #clock-cells = <0>; - reg = <9>; - }; - - udc_clk: udc_clk { - #clock-cells = <0>; - reg = <10>; - }; - - twi0_clk: twi0_clk { - reg = <11>; - #clock-cells = <0>; - }; - - spi0_clk: spi0_clk { - #clock-cells = <0>; - reg = <12>; - }; - - spi1_clk: spi1_clk { - #clock-cells = <0>; - reg = <13>; - }; - - ssc0_clk: ssc0_clk { - #clock-cells = <0>; - reg = <14>; - }; - - ssc1_clk: ssc1_clk { - #clock-cells = <0>; - reg = <15>; - }; - - ssc2_clk: ssc2_clk { - #clock-cells = <0>; - reg = <16>; - }; - - tc0_clk: tc0_clk { - #clock-cells = <0>; - reg = <17>; - }; - - tc1_clk: tc1_clk { - #clock-cells = <0>; - reg = <18>; - }; - - tc2_clk: tc2_clk { - #clock-cells = <0>; - reg = <19>; - }; - - ohci_clk: ohci_clk { - #clock-cells = <0>; - reg = <20>; - }; - - lcd_clk: lcd_clk { - #clock-cells = <0>; - reg = <21>; - }; - }; + #clock-cells = <2>; + clocks = <&slow_xtal>, <&main_xtal>; + clock-names = "slow_xtal", "main_xtal"; }; rstc at fffffd00 {
@@ -855,7 +614,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; rtc at fffffd20 {
Signature · 1 line
2.19.1
Alexandre Belloni
maintainerPATCH v2 20/22 ARM: dts: at91: at91sam9263: switch to new clock bindings
In reply to Alexandre BelloniSwitch at91sam9263 boards to the new PMC clock bindings.
Signed-off-by Alexandre Belloni <[email protected]>
--- arch/arm/boot/dts/at91sam9263.dtsi | 315 +++-------------------------- 1 file changed, 30 insertions(+), 285 deletions(-)
arch/arm/boot/dts/at91sam9263.dtsi +30 -285
@@ -96,264 +96,9 @@ compatible = "atmel,at91sam9263-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - - main_osc: main_osc { - compatible = "atmel,at91rm9200-clk-main-osc"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&main_xtal>; - }; - - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; - #clock-cells = <0>; - clocks = <&main_osc>; - }; - - plla: pllack { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKA>; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, - <190000000 240000000 2 1>; - }; - - pllb: pllbck { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKB>; - clocks = <&main>; - reg = <1>; - atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, - <190000000 240000000 2 1>; - }; - - mck: masterck { - compatible = "atmel,at91rm9200-clk-master"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; - clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - atmel,clk-output-range = <0 120000000>; - atmel,clk-divisors = <1 2 4 0>; - }; - - usb: usbck { - compatible = "atmel,at91rm9200-clk-usb"; - #clock-cells = <0>; - atmel,clk-divisors = <1 2 4 0>; - clocks = <&pllb>; - }; - - prog: progck { - compatible = "atmel,at91rm9200-clk-programmable"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; - - prog0: prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = <AT91_PMC_PCKRDY(0)>; - }; - - prog1: prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = <AT91_PMC_PCKRDY(1)>; - }; - - prog2: prog2 { - #clock-cells = <0>; - reg = <2>; - interrupts = <AT91_PMC_PCKRDY(2)>; - }; - - prog3: prog3 { - #clock-cells = <0>; - reg = <3>; - interrupts = <AT91_PMC_PCKRDY(3)>; - }; - }; - - systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - uhpck: uhpck { - #clock-cells = <0>; - reg = <6>; - clocks = <&usb>; - }; - - udpck: udpck { - #clock-cells = <0>; - reg = <7>; - clocks = <&usb>; - }; - - pck0: pck0 { - #clock-cells = <0>; - reg = <8>; - clocks = <&prog0>; - }; - - pck1: pck1 { - #clock-cells = <0>; - reg = <9>; - clocks = <&prog1>; - }; - - pck2: pck2 { - #clock-cells = <0>; - reg = <10>; - clocks = <&prog2>; - }; - - pck3: pck3 { - #clock-cells = <0>; - reg = <11>; - clocks = <&prog3>; - }; - }; - - periphck { - compatible = "atmel,at91rm9200-clk-peripheral"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; - - pioA_clk: pioA_clk { - #clock-cells = <0>; - reg = <2>; - }; - - pioB_clk: pioB_clk { - #clock-cells = <0>; - reg = <3>; - }; - - pioCDE_clk: pioCDE_clk { - #clock-cells = <0>; - reg = <4>; - }; - - usart0_clk: usart0_clk { - #clock-cells = <0>; - reg = <7>; - }; - - usart1_clk: usart1_clk { - #clock-cells = <0>; - reg = <8>; - }; - - usart2_clk: usart2_clk { - #clock-cells = <0>; - reg = <9>; - }; - - mci0_clk: mci0_clk { - #clock-cells = <0>; - reg = <10>; - }; - - mci1_clk: mci1_clk { - #clock-cells = <0>; - reg = <11>; - }; - - can_clk: can_clk { - #clock-cells = <0>; - reg = <12>; - }; - - twi0_clk: twi0_clk { - #clock-cells = <0>; - reg = <13>; - }; - - spi0_clk: spi0_clk { - #clock-cells = <0>; - reg = <14>; - }; - - spi1_clk: spi1_clk { - #clock-cells = <0>; - reg = <15>; - }; - - ssc0_clk: ssc0_clk { - #clock-cells = <0>; - reg = <16>; - }; - - ssc1_clk: ssc1_clk { - #clock-cells = <0>; - reg = <17>; - }; - - ac97_clk: ac97_clk { - #clock-cells = <0>; - reg = <18>; - }; - - tcb_clk: tcb_clk { - #clock-cells = <0>; - reg = <19>; - }; - - pwm_clk: pwm_clk { - #clock-cells = <0>; - reg = <20>; - }; - - macb0_clk: macb0_clk { - #clock-cells = <0>; - reg = <21>; - }; - - g2de_clk: g2de_clk { - #clock-cells = <0>; - reg = <23>; - }; - - udc_clk: udc_clk { - #clock-cells = <0>; - reg = <24>; - }; - - isi_clk: isi_clk { - #clock-cells = <0>; - reg = <25>; - }; - - lcd_clk: lcd_clk { - #clock-cells = <0>; - reg = <26>; - }; - - dma_clk: dma_clk { - #clock-cells = <0>; - reg = <27>; - }; - - ohci_clk: ohci_clk { - #clock-cells = <0>; - reg = <29>; - }; - }; + #clock-cells = <2>; + clocks = <&slow_xtal>, <&main_xtal>; + clock-names = "slow_xtal", "main_xtal"; }; ramc0: ramc at ffffe200 {
@@ -385,7 +130,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; tcb0: timer at fff7c000 {
@@ -394,7 +139,7 @@ #size-cells = <0>; reg = <0xfff7c000 0x100>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tcb_clk>, <&slow_xtal>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>; clock-names = "t0_clk", "slow_clk"; };
@@ -736,7 +481,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioA_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio at fffff400 {
@@ -747,7 +492,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioC: gpio at fffff600 {
@@ -758,7 +503,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioCDE_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; pioD: gpio at fffff800 {
@@ -769,7 +514,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioCDE_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; pioE: gpio at fffffa00 {
@@ -780,7 +525,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioCDE_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; };
@@ -790,7 +535,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; };
@@ -803,7 +548,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; - clocks = <&usart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; };
@@ -816,7 +561,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; - clocks = <&usart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; };
@@ -829,7 +574,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; - clocks = <&usart2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "usart"; status = "disabled"; };
@@ -840,7 +585,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; - clocks = <&ssc0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>; clock-names = "pclk"; status = "disabled"; };
@@ -851,7 +596,7 @@ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; - clocks = <&ssc1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 17>; clock-names = "pclk"; status = "disabled"; };
@@ -862,7 +607,7 @@ interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ac97>; - clocks = <&ac97_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; clock-names = "ac97_clk"; status = "disabled"; };
@@ -873,7 +618,7 @@ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb_rmii>; - clocks = <&macb0_clk>, <&macb0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>; clock-names = "hclk", "pclk"; status = "disabled"; };
@@ -882,7 +627,7 @@ compatible = "atmel,at91sam9263-udc"; reg = <0xfff78000 0x4000>; interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&udc_clk>, <&udpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>; clock-names = "pclk", "hclk"; status = "disabled"; };
@@ -893,7 +638,7 @@ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; status = "disabled"; };
@@ -904,7 +649,7 @@ pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; - clocks = <&mci0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; clock-names = "mci_clk"; status = "disabled"; };
@@ -916,7 +661,7 @@ pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; - clocks = <&mci1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; clock-names = "mci_clk"; status = "disabled"; };
@@ -940,7 +685,7 @@ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 14>; clock-names = "spi_clk"; status = "disabled"; };
@@ -953,7 +698,7 @@ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi1>; - clocks = <&spi1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 15>; clock-names = "spi_clk"; status = "disabled"; };
@@ -963,7 +708,7 @@ reg = <0xfffb8000 0x300>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; - clocks = <&pwm_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; clock-names = "pwm_clk"; status = "disabled"; };
@@ -974,7 +719,7 @@ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can_rx_tx>; - clocks = <&can_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 12>; clock-names = "can_clk"; };
@@ -1007,7 +752,7 @@ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fb>; - clocks = <&lcd_clk>, <&lcd_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>; clock-names = "lcdc_clk", "hclk"; status = "disabled"; };
@@ -1016,7 +761,7 @@ compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>; clock-names = "ohci_clk", "hclk", "uhpck"; status = "disabled"; };
@@ -1034,7 +779,7 @@ 0x3 0x0 0x40000000 0x10000000 0x4 0x0 0x50000000 0x10000000 0x5 0x0 0x60000000 0x10000000>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller0: nand-controller {
@@ -1055,7 +800,7 @@ reg = <0x80000000 0x20000000>; ranges = <0x0 0x0 0x80000000 0x10000000 0x1 0x0 0x90000000 0x10000000>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller1: nand-controller {
Signature · 1 line
2.19.1
Alexandre Belloni
maintainerPATCH v2 21/22 ARM: dts: at91: at91sam9x5: switch to new clock bindings
In reply to Alexandre BelloniSwitch at91sam9x5 boards to the new PMC clock bindings.
Signed-off-by Alexandre Belloni <[email protected]>
--- arch/arm/boot/dts/at91sam9g15.dtsi | 4 + arch/arm/boot/dts/at91sam9g25.dtsi | 4 + arch/arm/boot/dts/at91sam9g25ek.dts | 4 +- arch/arm/boot/dts/at91sam9g35.dtsi | 4 + arch/arm/boot/dts/at91sam9x25.dtsi | 4 + arch/arm/boot/dts/at91sam9x35.dtsi | 4 + arch/arm/boot/dts/at91sam9x5.dtsi | 326 +++-------------------- arch/arm/boot/dts/at91sam9x5_can.dtsi | 18 +- arch/arm/boot/dts/at91sam9x5_isi.dtsi | 11 +- arch/arm/boot/dts/at91sam9x5_lcd.dtsi | 19 +- arch/arm/boot/dts/at91sam9x5_macb0.dtsi | 11 +- arch/arm/boot/dts/at91sam9x5_macb1.dtsi | 11 +- arch/arm/boot/dts/at91sam9x5_usart3.dtsi | 11 +- 13 files changed, 62 insertions(+), 369 deletions(-)
arch/arm/boot/dts/at91sam9g15.dtsi +4 -0
@@ -24,6 +24,10 @@ 0x003fffff 0x003f8000 0x00000000 /* pioD */ >; }; + + pmc: pmc at fffffc00 { + compatible = "atmel,at91sam9g15-pmc", "atmel,at91sam9x5-pmc", "syscon"; + }; }; }; };
arch/arm/boot/dts/at91sam9g25.dtsi +4 -0
@@ -26,6 +26,10 @@ 0x003fffff 0x003f8000 0x00000000 /* pioD */ >; }; + + pmc: pmc at fffffc00 { + compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon"; + }; }; }; };
arch/arm/boot/dts/at91sam9g25ek.dts +2 -2
@@ -32,9 +32,9 @@ pinctrl-0 = <&pinctrl_pck0_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>; resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>; pwdn-gpios = <&pioA 13 GPIO_ACTIVE_HIGH>; - clocks = <&pck0>; + clocks = <&pmc PMC_TYPE_SYSTEM 8>; clock-names = "xvclk"; - assigned-clocks = <&pck0>; + assigned-clocks = <&pmc PMC_TYPE_SYSTEM 8>; assigned-clock-rates = <25000000>; status = "okay";
arch/arm/boot/dts/at91sam9g35.dtsi +4 -0
@@ -25,6 +25,10 @@ 0x003fffff 0x003f8000 0x00000000 /* pioD */ >; }; + + pmc: pmc at fffffc00 { + compatible = "atmel,at91sam9g35-pmc", "atmel,at91sam9x5-pmc", "syscon"; + }; }; }; };
arch/arm/boot/dts/at91sam9x25.dtsi +4 -0
@@ -27,6 +27,10 @@ 0x003fffff 0x003f8000 0x00000000 /* pioD */ >; }; + + pmc: pmc at fffffc00 { + compatible = "atmel,at91sam9x25-pmc", "atmel,at91sam9x5-pmc", "syscon"; + }; }; }; };
arch/arm/boot/dts/at91sam9x35.dtsi +4 -0
@@ -26,6 +26,10 @@ 0x003fffff 0x003f8000 0x00000000 /* pioD */ >; }; + + pmc: pmc at fffffc00 { + compatible = "atmel,at91sam9x35-pmc", "atmel,at91sam9x5-pmc", "syscon"; + }; }; }; };
arch/arm/boot/dts/at91sam9x5.dtsi +33 -293
512 lines not on this page · raw message
arch/arm/boot/dts/at91sam9x5_can.dtsi +2 -16
@@ -13,27 +13,13 @@ / { ahb { apb { - pmc: pmc at fffffc00 { - periphck { - can0_clk: can0_clk { - #clock-cells = <0>; - reg = <29>; - }; - - can1_clk: can1_clk { - #clock-cells = <0>; - reg = <30>; - }; - }; - }; - can0: can at f8000000 { compatible = "atmel,at91sam9x5-can"; reg = <0xf8000000 0x300>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can0_rx_tx>; - clocks = <&can0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 29>; clock-names = "can_clk"; status = "disabled"; };
@@ -44,7 +30,7 @@ interrupts = <30 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can1_rx_tx>; - clocks = <&can1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>; clock-names = "can_clk"; status = "disabled"; };
arch/arm/boot/dts/at91sam9x5_isi.dtsi +1 -10
@@ -44,22 +44,13 @@ }; }; - pmc: pmc at fffffc00 { - periphck { - isi_clk: isi_clk { - #clock-cells = <0>; - reg = <25>; - }; - }; - }; - isi: isi at f8048000 { compatible = "atmel,at91sam9g45-isi"; reg = <0xf8048000 0x4000>; interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_isi_data_0_7>; - clocks = <&isi_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 25>; clock-names = "isi_clk"; status = "disabled"; port {
arch/arm/boot/dts/at91sam9x5_lcd.dtsi +1 -18
@@ -17,7 +17,7 @@ compatible = "atmel,at91sam9x5-hlcdc"; reg = <0xf8038000 0x4000>; interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>; clock-names = "periph_clk","sys_clk", "slow_clk"; status = "disabled";
@@ -143,23 +143,6 @@ }; }; }; - - pmc: pmc at fffffc00 { - periphck { - lcdc_clk: lcdc_clk { - #clock-cells = <0>; - reg = <25>; - }; - }; - - systemck { - lcdck: lcdck { - #clock-cells = <0>; - reg = <3>; - clocks = <&mck>; - }; - }; - }; }; }; };
arch/arm/boot/dts/at91sam9x5_macb0.dtsi +1 -10
@@ -43,22 +43,13 @@ }; }; - pmc: pmc at fffffc00 { - periphck { - macb0_clk: macb0_clk { - #clock-cells = <0>; - reg = <24>; - }; - }; - }; - macb0: ethernet at f802c000 { compatible = "cdns,at91sam9260-macb", "cdns,macb"; reg = <0xf802c000 0x100>; interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb0_rmii>; - clocks = <&macb0_clk>, <&macb0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_PERIPHERAL 24>; clock-names = "hclk", "pclk"; status = "disabled"; };
arch/arm/boot/dts/at91sam9x5_macb1.dtsi +1 -10
@@ -31,22 +31,13 @@ }; }; - pmc: pmc at fffffc00 { - periphck { - macb1_clk: macb1_clk { - #clock-cells = <0>; - reg = <27>; - }; - }; - }; - macb1: ethernet at f8030000 { compatible = "cdns,at91sam9260-macb", "cdns,macb"; reg = <0xf8030000 0x100>; interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_macb1_rmii>; - clocks = <&macb1_clk>, <&macb1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 27>; clock-names = "hclk", "pclk"; status = "disabled"; };
arch/arm/boot/dts/at91sam9x5_usart3.dtsi +1 -10
@@ -42,15 +42,6 @@ }; }; - pmc: pmc at fffffc00 { - periphck { - usart3_clk: usart3_clk { - #clock-cells = <0>; - reg = <8>; - }; - }; - }; - usart3: serial at f8028000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x200>;
@@ -60,7 +51,7 @@ dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(14)>, <&dma1 1 (AT91_DMA_CFG_PER_ID(15) | AT91_DMA_CFG_FIFOCFG_ASAP)>; dma-names = "tx", "rx"; - clocks = <&usart3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; };
Signature · 1 line
2.19.1
Alexandre Belloni
maintainerPATCH v2 22/22 ARM: dts: at91: at91sam9rl: switch to new clock bindings
In reply to Alexandre BelloniSwitch at91sam9rl boards to the new PMC clock bindings.
Signed-off-by Alexandre Belloni <[email protected]>
--- arch/arm/boot/dts/at91sam9rl.dtsi | 239 +++--------------------------- 1 file changed, 23 insertions(+), 216 deletions(-)
arch/arm/boot/dts/at91sam9rl.dtsi +23 -216
@@ -88,7 +88,7 @@ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fb>; - clocks = <&lcd_clk>, <&lcd_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>; clock-names = "hclk", "lcdc_clk"; status = "disabled"; };
@@ -106,7 +106,7 @@ 0x3 0x0 0x40000000 0x10000000 0x4 0x0 0x50000000 0x10000000 0x5 0x0 0x60000000 0x10000000>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; status = "disabled"; nand_controller: nand-controller {
@@ -132,7 +132,7 @@ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, <17 IRQ_TYPE_LEVEL_HIGH 0>, <18 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>; clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; };
@@ -143,7 +143,7 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; - clocks = <&mci0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 10>; clock-names = "mci_clk"; status = "disabled"; };
@@ -154,7 +154,7 @@ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; #address-cells = <1>; #size-cells = <0>; - clocks = <&twi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; status = "disabled"; };
@@ -175,7 +175,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart0>; - clocks = <&usart0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 6>; clock-names = "usart"; status = "disabled"; };
@@ -188,7 +188,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart1>; - clocks = <&usart1_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 7>; clock-names = "usart"; status = "disabled"; };
@@ -201,7 +201,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart2>; - clocks = <&usart2_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 8>; clock-names = "usart"; status = "disabled"; };
@@ -214,7 +214,7 @@ atmel,use-dma-tx; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usart3>; - clocks = <&usart3_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 9>; clock-names = "usart"; status = "disabled"; };
@@ -242,7 +242,7 @@ reg = <0xfffc8000 0x300>; interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; #pwm-cells = <3>; - clocks = <&pwm_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 19>; clock-names = "pwm_clk"; status = "disabled"; };
@@ -255,7 +255,7 @@ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 13>; clock-names = "spi_clk"; status = "disabled"; };
@@ -266,7 +266,7 @@ compatible = "atmel,at91sam9rl-adc"; reg = <0xfffd0000 0x100>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&adc_clk>, <&adc_op_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>; clock-names = "adc_clk", "adc_op_clk"; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0x3f>;
@@ -304,7 +304,7 @@ reg = <0x00600000 0x100000>, <0xfffd4000 0x4000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; - clocks = <&udphs_clk>, <&utmi>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>; clock-names = "pclk", "hclk"; status = "disabled";
@@ -366,7 +366,7 @@ reg = <0xffffe600 0x200>; interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; #dma-cells = <2>; - clocks = <&dma0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; clock-names = "dma_clk"; };
@@ -399,7 +399,7 @@ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_dbgu>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; clock-names = "usart"; status = "disabled"; };
@@ -794,7 +794,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioA_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 2>; }; pioB: gpio at fffff600 {
@@ -805,7 +805,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioB_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 3>; }; pioC: gpio at fffff800 {
@@ -816,7 +816,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioC_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 4>; }; pioD: gpio at fffffa00 {
@@ -827,7 +827,7 @@ gpio-controller; interrupt-controller; #interrupt-cells = <2>; - clocks = <&pioD_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 5>; }; };
@@ -835,202 +835,9 @@ compatible = "atmel,at91sam9rl-pmc", "syscon"; reg = <0xfffffc00 0x100>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - interrupt-controller; - #address-cells = <1>; - #size-cells = <0>; - #interrupt-cells = <1>; - - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MOSCS>; - clocks = <&main_xtal>; - }; - - plla: pllack { - compatible = "atmel,at91rm9200-clk-pll"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_LOCKA>; - clocks = <&main>; - reg = <0>; - atmel,clk-input-range = <1000000 32000000>; - #atmel,pll-clk-output-range-cells = <3>; - atmel,pll-clk-output-ranges = <80000000 200000000 0>, - <190000000 240000000 2>; - }; - - utmi: utmick { - compatible = "atmel,at91sam9x5-clk-utmi"; - #clock-cells = <0>; - interrupt-parent = <&pmc>; - interrupts = <AT91_PMC_LOCKU>; - clocks = <&main>; - }; - - mck: masterck { - compatible = "atmel,at91rm9200-clk-master"; - #clock-cells = <0>; - interrupts-extended = <&pmc AT91_PMC_MCKRDY>; - clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; - atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 0>; - }; - - prog: progck { - compatible = "atmel,at91rm9200-clk-programmable"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&pmc>; - clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>; - - prog0: prog0 { - #clock-cells = <0>; - reg = <0>; - interrupts = <AT91_PMC_PCKRDY(0)>; - }; - - prog1: prog1 { - #clock-cells = <0>; - reg = <1>; - interrupts = <AT91_PMC_PCKRDY(1)>; - }; - }; - - systemck { - compatible = "atmel,at91rm9200-clk-system"; - #address-cells = <1>; - #size-cells = <0>; - - pck0: pck0 { - #clock-cells = <0>; - reg = <8>; - clocks = <&prog0>; - }; - - pck1: pck1 { - #clock-cells = <0>; - reg = <9>; - clocks = <&prog1>; - }; - - }; - - periphck { - compatible = "atmel,at91rm9200-clk-peripheral"; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&mck>; - - pioA_clk: pioA_clk { - #clock-cells = <0>; - reg = <2>; - }; - - pioB_clk: pioB_clk { - #clock-cells = <0>; - reg = <3>; - }; - - pioC_clk: pioC_clk { - #clock-cells = <0>; - reg = <4>; - }; - - pioD_clk: pioD_clk { - #clock-cells = <0>; - reg = <5>; - }; - - usart0_clk: usart0_clk { - #clock-cells = <0>; - reg = <6>; - }; - - usart1_clk: usart1_clk { - #clock-cells = <0>; - reg = <7>; - }; - - usart2_clk: usart2_clk { - #clock-cells = <0>; - reg = <8>; - }; - - usart3_clk: usart3_clk { - #clock-cells = <0>; - reg = <9>; - }; - - mci0_clk: mci0_clk { - #clock-cells = <0>; - reg = <10>; - }; - - twi0_clk: twi0_clk { - #clock-cells = <0>; - reg = <11>; - }; - - twi1_clk: twi1_clk { - #clock-cells = <0>; - reg = <12>; - }; - - spi0_clk: spi0_clk { - #clock-cells = <0>; - reg = <13>; - }; - - ssc0_clk: ssc0_clk { - #clock-cells = <0>; - reg = <14>; - }; - - ssc1_clk: ssc1_clk { - #clock-cells = <0>; - reg = <15>; - }; - - tc0_clk: tc0_clk { - #clock-cells = <0>; - reg = <16>; - }; - - tc1_clk: tc1_clk { - #clock-cells = <0>; - reg = <17>; - }; - - tc2_clk: tc2_clk { - #clock-cells = <0>; - reg = <18>; - }; - - pwm_clk: pwm_clk { - #clock-cells = <0>; - reg = <19>; - }; - - adc_clk: adc_clk { - #clock-cells = <0>; - reg = <20>; - }; - - dma0_clk: dma0_clk { - #clock-cells = <0>; - reg = <21>; - }; - - udphs_clk: udphs_clk { - #clock-cells = <0>; - reg = <22>; - }; - - lcd_clk: lcd_clk { - #clock-cells = <0>; - reg = <23>; - }; - }; + #clock-cells = <2>; + clocks = <&clk32k>, <&main_xtal>; + clock-names = "slow_clk", "main_xtal"; }; rstc at fffffd00 {
@@ -1049,7 +856,7 @@ compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&mck>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; }; watchdog at fffffd40 {
Signature · 1 line
2.19.1
Stephen Boyd
maintainerQuoting Alexandre Belloni (2018-10-16 07:21:38)
Quoted 8 lines
This is the promised rework of the at91 PMC clocks driver. It is mainly necessary to remove the DTC warnings but it also complies with the CCF rule that there should be one node per controller instead of one node per clock.
This only handles the PMC, I'm planning to also rework the SCKC bindings later (without breaking the DT ABI).
Quoted 8 lines
The series is based on top of v4.19-rc1.
The first two patches are actually fixes and may be considered for this cycle.
I'll take the device tree changes through the at91 tree as DT backward compatibility is working.
I get the following warnings and errors from my auto checker script:
ERROR: need consistent spacing around '+' (ctx:WxV) #167: FILE: drivers/clk/at91/sama5d4.c:137:
+ sama5d4_pmc = pmc_data_allocate(PMC_MCK2 +1,
^
drivers/clk/at91/clk-i2s-mux.c:49:15: warning: symbol 'at91_clk_i2s_mux_register' was not declared. Should it be static? drivers/clk/at91/clk-audio-pll.c:447:15: warning: symbol 'at91_clk_register_audio_pll_frac' was not declared. Should it be static? drivers/clk/at91/clk-audio-pll.c:477:15: warning: symbol 'at91_clk_register_audio_pll_pad' was not declared. Should it be static? drivers/clk/at91/clk-audio-pll.c:508:15: warning: symbol 'at91_clk_register_audio_pll_pmc' was not declared. Should it be static? drivers/clk/at91/sama5d4.c:123 sama5d4_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/sama5d4.c:129 sama5d4_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/sama5d2.c:140 sama5d2_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/sama5d2.c:146 sama5d2_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/at91sam9x5.c:132 at91sam9x5_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/at91sam9x5.c:138 at91sam9x5_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/at91sam9rl.c:76 at91sam9rl_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/at91sam9rl.c:82 at91sam9rl_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/at91sam9260.c:341 at91sam926x_pmc_setup() warn: unsigned 'i' is never less than zero. drivers/clk/at91/at91sam9260.c:347 at91sam926x_pmc_setup() warn: unsigned 'i' is never less than zero.
I fixed them with the below patch, that I'll squash into the right place. Things look good!
drivers/clk/at91/at91sam9260.c +1 -1
@@ -334,7 +334,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,const char *slck_name;struct regmap *regmap;struct clk_hw *hw; -unsigned int i; +int i;bool bypass; i =of_property_match_string (np,"clock-names" ,"slow_xtal" );
drivers/clk/at91/at91sam9rl.c +1 -1
@@ -70,7 +70,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)const char *parent_names[6 ];struct regmap *regmap;struct clk_hw *hw; -unsigned int i; +int i; i =of_property_match_string (np,"clock-names" ,"slow_clk" );if (i <0 )
drivers/clk/at91/at91sam9x5.c +1 -1
@@ -125,7 +125,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,const char *parent_names[6 ];struct regmap *regmap;struct clk_hw *hw; -unsigned int i; +int i;bool bypass; i =of_property_match_string (np,"clock-names" ,"slow_clk" );
drivers/clk/at91/clk-audio-pll.c +2 -0
@@ -43,6 +43,8 @@#include <linux/regmap.h> #include <linux/slab.h> +#include "pmc.h" +#define AUDIO_PLL_DIV_FRAC BIT(22)#define AUDIO_PLL_ND_MAX (AT91_PMC_AUDIO_PLL_ND_MASK >> \ AT91_PMC_AUDIO_PLL_ND_OFFSET)
drivers/clk/at91/clk-i2s-mux.c +2 -0
@@ -14,6 +14,8 @@#include <soc/at91/atmel-sfr.h> +#include "pmc.h" +struct clk_i2s_mux {struct clk_hw hw;struct regmap *regmap;
drivers/clk/at91/sama5d2.c +1 -1
@@ -133,7 +133,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)const char *parent_names[6 ];struct regmap *regmap, *regmap_sfr;struct clk_hw *hw; -unsigned int i; +int i;bool bypass; i =of_property_match_string (np,"clock-names" ,"slow_clk" );
drivers/clk/at91/sama5d4.c +2 -2
@@ -116,7 +116,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)const char *parent_names[5 ];struct regmap *regmap;struct clk_hw *hw; -unsigned int i; +int i;bool bypass; i =of_property_match_string (np,"clock-names" ,"slow_clk" );
@@ -134,7 +134,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)if (IS_ERR (regmap))return ; - sama5d4_pmc =pmc_data_allocate (PMC_MCK2 +1 , + sama5d4_pmc =pmc_data_allocate (PMC_MCK2 +1 ,nck (sama5d4_systemck),nck (sama5d4_periph32ck),0 );if (!sama5d4_pmc)
Alexandre Belloni
maintainerQuoted 40 lines · Stephen Boyd
Quoting Alexandre Belloni (2018-10-16 07:21:38)
Quoted 8 lines
This is the promised rework of the at91 PMC clocks driver. It is mainly necessary to remove the DTC warnings but it also complies with the CCF rule that there should be one node per controller instead of one node per clock.
This only handles the PMC, I'm planning to also rework the SCKC bindings later (without breaking the DT ABI).
Quoted 8 lines
The series is based on top of v4.19-rc1.
The first two patches are actually fixes and may be considered for this cycle.
I'll take the device tree changes through the at91 tree as DT backward compatibility is working.
I get the following warnings and errors from my auto checker script:
ERROR: need consistent spacing around '+' (ctx:WxV) #167: FILE:
drivers/clk/at91/sama5d4.c:137:
+sama5d4_pmc= pmc_data_allocate(PMC_MCK2 +1,^
drivers/clk/at91/clk-i2s-mux.c:49:15: warning: symbol 'at91_clk_i2s_mux_register' was not declared. Should it be static?drivers/clk/at91/clk-audio-pll.c:447:15: warning: symbol 'at91_clk_register_audio_pll_frac' was not declared. Should it be static?drivers/clk/at91/clk-audio-pll.c:477:15: warning: symbol 'at91_clk_register_audio_pll_pad' was not declared. Should it be static?drivers/clk/at91/clk-audio-pll.c:508:15: warning: symbol 'at91_clk_register_audio_pll_pmc' was not declared. Should it be static?drivers/clk/at91/sama5d4.c:123sama5d4_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/sama5d4.c:129sama5d4_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/sama5d2.c:140sama5d2_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/sama5d2.c:146sama5d2_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/at91sam9x5.c:132at91sam9x5_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/at91sam9x5.c:138at91sam9x5_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/at91sam9rl.c:76at91sam9rl_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/at91sam9rl.c:82at91sam9rl_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/at91sam9260.c:341at91sam926x_pmc_setup()warn: unsigned 'i' is never less than zero.drivers/clk/at91/at91sam9260.c:347at91sam926x_pmc_setup()warn: unsigned 'i' is never less than zero.
Quoted 3 lines
I fixed them with the below patch, that I'll squash into the right place. Things look good!
The patch seems good to me.
Quoted 100 lines
drivers/clk/at91/at91sam9260.c +1
-1@@ -334,7 +334,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,const char *slck_name;struct regmap *regmap;struct clk_hw *hw; -unsigned int i; +int i;bool bypass; i =of_property_match_string (np,"clock-names" ,"slow_xtal" );drivers/clk/at91/at91sam9rl.c +1
-1@@ -70,7 +70,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)const char *parent_names[6 ];struct regmap *regmap;struct clk_hw *hw; -unsigned int i; +int i; i =of_property_match_string (np,"clock-names" ,"slow_clk" );if (i <0 )drivers/clk/at91/at91sam9x5.c +1
-1@@ -125,7 +125,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,const char *parent_names[6 ];struct regmap *regmap;struct clk_hw *hw; -unsigned int i; +int i;bool bypass; i =of_property_match_string (np,"clock-names" ,"slow_clk" );drivers/clk/at91/clk-audio-pll.c +2
-0@@ -43,6 +43,8 @@#include <linux/regmap.h> #include <linux/slab.h> +#include "pmc.h" +#define AUDIO_PLL_DIV_FRAC BIT(22)#define AUDIO_PLL_ND_MAX (AT91_PMC_AUDIO_PLL_ND_MASK >> \ AT91_PMC_AUDIO_PLL_ND_OFFSET)drivers/clk/at91/clk-i2s-mux.c +2
-0@@ -14,6 +14,8 @@#include <soc/at91/atmel-sfr.h> +#include "pmc.h" +struct clk_i2s_mux {struct clk_hw hw;struct regmap *regmap;drivers/clk/at91/sama5d2.c +1
-1@@ -133,7 +133,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)const char *parent_names[6 ];struct regmap *regmap, *regmap_sfr;struct clk_hw *hw; -unsigned int i; +int i;bool bypass; i =of_property_match_string (np,"clock-names" ,"slow_clk" );drivers/clk/at91/sama5d4.c +2
-2@@ -116,7 +116,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)const char *parent_names[5 ];struct regmap *regmap;struct clk_hw *hw; -unsigned int i; +int i;bool bypass; i =of_property_match_string (np,"clock-names" ,"slow_clk" );@@ -134,7 +134,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)if (IS_ERR (regmap))return ; - sama5d4_pmc =pmc_data_allocate (PMC_MCK2 +1 , + sama5d4_pmc =pmc_data_allocate (PMC_MCK2 +1 ,nck (sama5d4_systemck),nck (sama5d4_periph32ck),0 );if (!sama5d4_pmc)
Signature · 3 lines
Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com