x86: BayTrail: southcluster.asl: Change PCI 64 bit address range / region

This is needed for the PCIe hotplug to work correctly on some boards with the newer Linux kernel versions.

Signed-off-by Stefan Roese <[email protected]>

Cc Bin Meng <[email protected]>

---
 include/configs/theadorable-x86-common.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Quoted 10 lines · Stefan Roese

This is needed for the PCIe hotplug to work correctly on some boards with the newer Linux kernel versions.

Signed-off-by Stefan Roese <[email protected]>

Cc Bin Meng <[email protected]>

---
 include/configs/theadorable-x86-common.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

I cannot find 'hpmemprefsize' as a kernel command line parameter, so I assume removing it does not introduce any issue.

Reviewed-by Bin Meng <[email protected]>

To enable the root device selection (kernel cmd-line) via PARTUUID, this patch enables CMD_PART on all missing theadorable-x86 boards and changes the default environment to generate the root=PARTUUID string automatically.

This fixes problems that have been noticed on systems with multiple SATA/AHCI controller connected via PCIe, where the device name for the root device / partition (/dev/sdaX) was incorrect.

Signed-off-by Stefan Roese <[email protected]>

---
 ...able-x86-conga-qa3-e3845-pcie-x4_defconfig |  1 +
 .../theadorable-x86-conga-qa3-e3845_defconfig |  1 +
 include/configs/theadorable-x86-common.h      | 35 +++++++++++--------
 3 files changed, 23 insertions(+), 14 deletions(-)

Quoted 10 lines · Stefan Roese

To enable the root device selection (kernel cmd-line) via PARTUUID, this patch enables CMD_PART on all missing theadorable-x86 boards and changes the default environment to generate the root=PARTUUID string automatically.

This fixes problems that have been noticed on systems with multiple SATA/AHCI controller connected via PCIe, where the device name for the root device / partition (/dev/sdaX) was incorrect.

Quoted 7 lines

Signed-off-by Stefan Roese <[email protected]>

---
 ...able-x86-conga-qa3-e3845-pcie-x4_defconfig |  1 +
 .../theadorable-x86-conga-qa3-e3845_defconfig |  1 +
 include/configs/theadorable-x86-common.h      | 35 +++++++++++--------
 3 files changed, 23 insertions(+), 14 deletions(-)

Reviewed-by Bin Meng <[email protected]>

The build breaks because its not fitting the U-Boot binary into the ROM image. So lets move VGA BIOS a bit to make room for the grown U-Boot binary.

Signed-off-by Stefan Roese <[email protected]>

---
 configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig | 2 +-
 configs/theadorable-x86-conga-qa3-e3845_defconfig         | 2 +-
 configs/theadorable-x86-dfi-bt700_defconfig               | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

Quoted 5 lines · Stefan Roese

The build breaks because its not fitting the U-Boot binary into the ROM image. So lets move VGA BIOS a bit to make room for the grown U-Boot binary.

Quoted 7 lines

Signed-off-by Stefan Roese <[email protected]>

---
 configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig | 2 +-
 configs/theadorable-x86-conga-qa3-e3845_defconfig         | 2 +-
 configs/theadorable-x86-dfi-bt700_defconfig               | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

Reviewed-by Bin Meng <[email protected]>

To allow bigger 64 bit prefetchable PCI regions in Linux, this patch changes the base address and range of the ACPI area passed to Linux. BayTrail can only physically access 36 bit of PCI address space. So just chaning the range without changing the base address won't work here, as 0xf.ffff.ffff is already the maximum address.

With this patch, a maximum of 16 GiB of local DDR is supported. This should be enough for all BayTrail boards though.

Signed-off-by Stefan Roese <[email protected]>

Cc Bin Meng <[email protected]>

Cc Simon Glass <[email protected]>

---
 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Quoted 10 lines · Stefan Roese

To allow bigger 64 bit prefetchable PCI regions in Linux, this patch changes the base address and range of the ACPI area passed to Linux. BayTrail can only physically access 36 bit of PCI address space. So just chaning the range without changing the base address won't work here, as 0xf.ffff.ffff is already the maximum address.

With this patch, a maximum of 16 GiB of local DDR is supported. This should be enough for all BayTrail boards though.

Quoted 7 lines

Signed-off-by Stefan Roese <[email protected]>

Cc Bin Meng <[email protected]>

Cc Simon Glass <[email protected]>

---
 arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by Bin Meng <[email protected]>