net: phy: Allow BCM54616S PHY to setup internal TX/RX clock delay
Subsystems (4)
PATCH 1/1 net: phy: Allow BCM54616S PHY to setup internal TX/RX clock delay
This patch allows users to enable/disable internal TX and/or RX clock delay for BCM54616S PHYs so as to satisfy RGMII timing specifications.
On a particular platform, whether TX and/or RX clock delay is required depends on how PHY connected to the MAC IP. This requirement can be specified through "phy-mode" property in the platform device tree.
The patch is inspired by commit 733336262b28 ("net: phy: Allow BCM5481x PHYs to setup internal TX/RX clock delay").
--- drivers/net/phy/broadcom.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-)
drivers/net/phy/broadcom.c +16 -2
@@ -92,7 +92,7 @@ static int bcm54612e_config_init(struct phy_device *phydev)return 0 ; } -static int bcm5481x_config (struct phy_device *phydev) +static int bcm54xx_config_clock_delay (struct phy_device *phydev) {int rc, val;
@@ -429,7 +429,7 @@ static int bcm5481_config_aneg(struct phy_device *phydev) ret =genphy_config_aneg (phydev);/* Then we can set up the delay. */ -bcm5481x_config (phydev); +bcm54xx_config_clock_delay (phydev);if (of_property_read_bool (np,"enet-phy-lane-swap" )) {/* Lane Swap - Undocumented register...magic! */
@@ -442,6 +442,19 @@ static int bcm5481_config_aneg(struct phy_device *phydev)return ret; } +static int bcm54616s_config_aneg (struct phy_device *phydev) +{ +int ret; + +/* Aneg firsly. */ + ret =genphy_config_aneg (phydev); + +/* Then we can set up the delay. */ +bcm54xx_config_clock_delay (phydev); + +return ret; +} +static int brcm_phy_setbits (struct phy_device *phydev,int reg,int set) {int val;
@@ -636,6 +649,7 @@ static struct phy_driver broadcom_drivers[] = { .features = PHY_GBIT_FEATURES, .flags = PHY_HAS_INTERRUPT, .config_init = bcm54xx_config_init, + .config_aneg = bcm54616s_config_aneg, .ack_interrupt = bcm_phy_ack_intr, .config_intr = bcm_phy_config_intr, }, {
Signature · 1 line
2.17.1
Quoted 9 lines · Tao Ren
This patch allows users to enable/disable internal TX and/or RX clock delay for BCM54616S PHYs so as to satisfy RGMII timing specifications.
On a particular platform, whether TX and/or RX clock delay is required depends on how PHY connected to the MAC IP. This requirement can be specified through "phy-mode" property in the platform device tree.
The patch is inspired by commit
733336262b28("net: phy: Allow BCM5481x PHYs to setup internal TX/RX clock delay").
I will let David be the judge whether this is appropriate as a bugfix (thus targeting the "net" tree) or a feature, which would have to wait for net-next to re-open.
Quoted 2 lines
Signed-off-by Tao Ren <[email protected]>
Quoted 55 lines
--- drivers/net/phy/broadcom.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-)drivers/net/phy/broadcom.c +16
-2@@ -92,7 +92,7 @@ static int bcm54612e_config_init(struct phy_device *phydev)return 0 ; } -static int bcm5481x_config (struct phy_device *phydev) +static int bcm54xx_config_clock_delay (struct phy_device *phydev) {int rc, val;@@ -429,7 +429,7 @@ static int bcm5481_config_aneg(struct phy_device *phydev) ret =genphy_config_aneg (phydev);/* Then we can set up the delay. */ -bcm5481x_config (phydev); +bcm54xx_config_clock_delay (phydev);if (of_property_read_bool (np,"enet-phy-lane-swap" )) {/* Lane Swap - Undocumented register...magic! */ @@ -442,6 +442,19 @@ static int bcm5481_config_aneg(struct phy_device *phydev)return ret; } +static int bcm54616s_config_aneg (struct phy_device *phydev) +{ +int ret; + +/* Aneg firsly. */ + ret =genphy_config_aneg (phydev); + +/* Then we can set up the delay. */ +bcm54xx_config_clock_delay (phydev); + +return ret; +} +static int brcm_phy_setbits (struct phy_device *phydev,int reg,int set) {int val;@@ -636,6 +649,7 @@ static struct phy_driver broadcom_drivers[] = { .features = PHY_GBIT_FEATURES, .flags = PHY_HAS_INTERRUPT, .config_init = bcm54xx_config_init, + .config_aneg = bcm54616s_config_aneg, .ack_interrupt = bcm_phy_ack_intr, .config_intr = bcm_phy_config_intr, }, {
Signature · 1 line
Florian
Quoted 3 lines · Florian Fainelli
I will let David be the judge whether this is appropriate as a bugfix (thus targeting the "net" tree) or a feature, which would have to wait for net-next to re-open.
Sure.
Quoted 3 lines
Quoted 1 line
Signed-off-by Tao Ren <[email protected]>Reviewed-by Florian Fainelli <[email protected]>
Thank you Florian for the quick review!
Thanks,
Tao Ren
David Miller
maintainerFrom: Tao Ren <[email protected]>
Date: Mon, 5 Nov 2018 14:35:40 -0800
Quoted 11 lines
This patch allows users to enable/disable internal TX and/or RX clock delay for BCM54616S PHYs so as to satisfy RGMII timing specifications.
On a particular platform, whether TX and/or RX clock delay is required depends on how PHY connected to the MAC IP. This requirement can be specified through "phy-mode" property in the platform device tree.
The patch is inspired by commit
733336262b28("net: phy: Allow BCM5481x PHYs to setup internal TX/RX clock delay").Signed-off-by Tao Ren <[email protected]>
This is fine for 'net', applied, thanks.
Quoted 10 lines · David Miller
From: Tao Ren <[email protected]>
Date: Mon, 5 Nov 2018 14:35:40 -0800Quoted 7 lines
This patch allows users to enable/disable internal TX and/or RX clock delay for BCM54616S PHYs so as to satisfy RGMII timing specifications.
On a particular platform, whether TX and/or RX clock delay is required depends on how PHY connected to the MAC IP. This requirement can be specified through "phy-mode" property in the platform device tree.
Quoted 6 lines
Quoted 4 lines
The patch is inspired by commit
733336262b28("net: phy: Allow BCM5481x PHYs to setup internal TX/RX clock delay").Signed-off-by Tao Ren <[email protected]>This is fine for 'net', applied, thanks.
Thanks David for the quick action.
- Tao Ren