arm64: dts: r8a77990: Add SDHI device nodes

PATCH Superseded Marek Vasut 5 participants 11 messages Nov 5, 2018 – Nov 6, 2018

Subsystems (2)

Device tree bindings Arm/RISC-V/Renesas architecture

lore

Share & tools

lore

Marek Vasut

author

2018-11-05 21:41 UTC #0 lore raw

PATCH 1/2 arm64: dts: r8a77990: Add SDHI device nodes

From: Takeshi Kihara <[email protected]>

This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.

Signed-off-by Takeshi Kihara <[email protected]>

Signed-off-by Marek Vasut <[email protected]>

Cc Geert Uytterhoeven <[email protected]>

Cc Simon Horman <[email protected]>

Cc Wolfram Sang <[email protected]>

Cc Yoshihiro Shimoda <[email protected]>

Cc linux-renesas-soc at vger.kernel.org

Cc linux-arm-kernel at lists.infradead.org

---
 arch/arm64/boot/dts/renesas/r8a77990.dtsi | 36 +++++++++++++++++++++++
 1 file changed, 36 insertions(+)

arch/arm64/boot/dts/renesas/r8a77990.dtsi +36 -0

index 9509dc05665f..fb0818d07cdb 100644
@@ -826,6 +826,42 @@
 			status = "disabled";
 		};
 
+		sdhi0: sd at ee100000 {
+			compatible = "renesas,sdhi-r8a77990",
+				     "renesas,rcar-gen3-sdhi";
+			reg = <0 0xee100000 0 0x2000>;
+			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 314>;
+			max-frequency = <200000000>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 314>;
+			status = "disabled";
+		};
+
+		sdhi1: sd at ee120000 {
+			compatible = "renesas,sdhi-r8a77990",
+				     "renesas,rcar-gen3-sdhi";
+			reg = <0 0xee120000 0 0x2000>;
+			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 313>;
+			max-frequency = <200000000>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 313>;
+			status = "disabled";
+		};
+
+		sdhi3: sd at ee160000 {
+			compatible = "renesas,sdhi-r8a77990",
+				     "renesas,rcar-gen3-sdhi";
+			reg = <0 0xee160000 0 0x2000>;
+			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 311>;
+			max-frequency = <200000000>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			resets = <&cpg 311>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller at f1010000 {
 			compatible = "arm,gic-400";
 			#interrupt-cells = <3>;

Signature · 1 line

2.18.0

Marek Vasut

author

2018-11-05 21:41 UTC #1 lore raw

PATCH 2/2 arm64: dts: r8a77990: ebisu: Enable SDHI interfaces

From: Takeshi Kihara <[email protected]>

This patch enables SD card slot connected to SDHI0, micro SD card slot connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board using the R8A77990 SoC.

Signed-off-by Takeshi Kihara <[email protected]>

Signed-off-by Marek Vasut <[email protected]>

Cc Geert Uytterhoeven <[email protected]>

Cc Simon Horman <[email protected]>

Cc Wolfram Sang <[email protected]>

Cc Yoshihiro Shimoda <[email protected]>

Cc linux-renesas-soc at vger.kernel.org

Cc linux-arm-kernel at lists.infradead.org

---
 .../arm64/boot/dts/renesas/r8a77990-ebisu.dts | 136 ++++++++++++++++++
 1 file changed, 136 insertions(+)

arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +136 -0

index 611f0265fcc5..bda1765dcdbd 100644
@@ -119,6 +119,15 @@
 		};
 	};
 
+	reg_1p8v: regulator0 {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
 	reg_3p3v: regulator1 {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-3.3V";

@@ -133,6 +142,54 @@
 		#clock-cells = <0>;
 		clock-frequency = <74250000>;
 	};
+
+	vcc_sdhi0: regulator-vcc-sdhi0 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "SDHI0 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	vccq_sdhi0: regulator-vccq-sdhi0 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI0 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
+		gpios-states = <1>;
+		states = <3300000 1
+			  1800000 0>;
+	};
+
+	vcc_sdhi1: regulator-vcc-sdhi1 {
+		compatible = "regulator-fixed";
+
+		regulator-name = "SDHI1 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	vccq_sdhi1: regulator-vccq-sdhi1 {
+		compatible = "regulator-gpio";
+
+		regulator-name = "SDHI1 VccQ";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+
+		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
+		gpios-states = <1>;
+		states = <3300000 1
+			  1800000 0>;
+	};
 };
 
 &avb {

@@ -326,6 +383,42 @@
 		function = "scif2";
 	};
 
+	sdhi0_pins: sd0 {
+		groups = "sdhi0_data4", "sdhi0_ctrl";
+		function = "sdhi0";
+		power-source = <3300>;
+	};
+
+	sdhi0_pins_uhs: sd0_uhs {
+		groups = "sdhi0_data4", "sdhi0_ctrl";
+		function = "sdhi0";
+		power-source = <1800>;
+	};
+
+	sdhi1_pins: sd1 {
+		groups = "sdhi1_data4", "sdhi1_ctrl";
+		function = "sdhi1";
+		power-source = <3300>;
+	};
+
+	sdhi1_pins_uhs: sd1_uhs {
+		groups = "sdhi1_data4", "sdhi1_ctrl";
+		function = "sdhi1";
+		power-source = <1800>;
+	};
+
+	sdhi3_pins: sd3 {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};
+
+	sdhi3_pins_uhs: sd3_uhs {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};
+
 	usb0_pins: usb {
 		groups = "usb0_b";
 		function = "usb0";

@@ -380,3 +473,46 @@
 
 	status = "okay";
 };
+
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_pins>;
+	pinctrl-1 = <&sdhi0_pins_uhs>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&vcc_sdhi0>;
+	vqmmc-supply = <&vccq_sdhi0>;
+	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
+	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
+	bus-width = <4>;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&sdhi1 {
+	pinctrl-0 = <&sdhi1_pins>;
+	pinctrl-1 = <&sdhi1_pins_uhs>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&vcc_sdhi1>;
+	vqmmc-supply = <&vccq_sdhi1>;
+	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&sdhi3 {
+	/* used for on-board 8bit eMMC */
+	pinctrl-0 = <&sdhi3_pins>;
+	pinctrl-1 = <&sdhi3_pins_uhs>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_1p8v>;
+	mmc-hs200-1_8v;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};

Signature · 1 line

2.18.0

Yoshihiro Shimoda

2018-11-06 05:29 UTC #2 lore raw

PATCH 2/2 arm64: dts: r8a77990: ebisu: Enable SDHI interfaces

Hello Marek-san,

Quoted 16 lines

From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
From: Takeshi Kihara <[email protected]>
This patch enables SD card slot connected to SDHI0, micro SD card slot connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board using the R8A77990 SoC.
Signed-off-by Takeshi Kihara <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Cc Geert Uytterhoeven <[email protected]>
Cc Simon Horman <[email protected]>
Cc Wolfram Sang <[email protected]>
Cc Yoshihiro Shimoda <[email protected]>
Cc linux-renesas-soc at vger.kernel.org
Cc linux-arm-kernel at lists.infradead.org

Quoted 1 line

---

Thank you for the patch!

Reviewed-by Yoshihiro Shimoda <[email protected]>

I have a few nit comments below.

Quoted 7 lines

 .../arm64/boot/dts/renesas/r8a77990-ebisu.dts | 136 ++++++++++++++++++
 1 file changed, 136 insertions(+)

arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +0 -0

index 611f0265fcc5..bda1765dcdbd 100644

<snip>

arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts line 420

Quoted 11 lines

arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +11 -0

+	sdhi3_pins: sd3 {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};
+
+	sdhi3_pins_uhs: sd3_uhs {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};

I assumed that we will add "sdhi3_ds" into these groups when we add support for HS400 mode.

Best regards,
Yoshihiro Shimoda

Marek Vasut

author

2018-11-06 09:17 UTC #3 lore raw

PATCH 2/2 arm64: dts: r8a77990: ebisu: Enable SDHI interfaces

Quoted 1 line · Yoshihiro Shimoda

Hello Marek-san,

Hello Shimoda-san,

Quoted 32 lines

Quoted 16 lines
From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
From: Takeshi Kihara <[email protected]>
This patch enables SD card slot connected to SDHI0, micro SD card slot connected to SDHI1 and eMMC connected to SDHI3 on the Ebisu board using the R8A77990 SoC.
Signed-off-by Takeshi Kihara <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Cc Geert Uytterhoeven <[email protected]>
Cc Simon Horman <[email protected]>
Cc Wolfram Sang <[email protected]>
Cc Yoshihiro Shimoda <[email protected]>
Cc linux-renesas-soc at vger.kernel.org
Cc linux-arm-kernel at lists.infradead.org
Quoted 1 line
---
Thank you for the patch!
Reviewed-by Yoshihiro Shimoda <[email protected]>
I have a few nit comments below.
Quoted 7 lines
 .../arm64/boot/dts/renesas/r8a77990-ebisu.dts | 136 ++++++++++++++++++
 1 file changed, 136 insertions(+)
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +0 -0
index 611f0265fcc5..bda1765dcdbd 100644
<snip>

Quoted 13 lines

arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts line 420
Quoted 11 lines
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +11 -0
+	sdhi3_pins: sd3 {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};
+
+	sdhi3_pins_uhs: sd3_uhs {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};
I assumed that we will add "sdhi3_ds" into these groups when we add support for HS400 mode.

That's a good point, I think we can add it right away, so added in V2.

Signature · 2 lines

Best regards,
Marek Vasut

Wolfram Sang

2018-11-06 08:34 UTC #4 lore raw

PATCH 2/2 arm64: dts: r8a77990: ebisu: Enable SDHI interfaces

In reply to Marek Vasut

arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts line 420

Quoted 12 lines

arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +11 -0

+	sdhi3_pins: sd3 {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};
+
+	sdhi3_pins_uhs: sd3_uhs {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};

Shouldn't we have only one pinctrl config here, like you did recently for the other Gen3 SoCs?

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 833 bytes
Desc: not available
URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20181106/af029d94/attachment.sig>

Marek Vasut

author

2018-11-06 09:18 UTC #5 lore raw

PATCH 2/2 arm64: dts: r8a77990: ebisu: Enable SDHI interfaces

Quoted 15 lines · Wolfram Sang

arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts line 420
Quoted 12 lines
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts +11 -0
+	sdhi3_pins: sd3 {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};
+
+	sdhi3_pins_uhs: sd3_uhs {
+		groups = "sdhi3_data8", "sdhi3_ctrl";
+		function = "sdhi3";
+		power-source = <1800>;
+	};
Shouldn't we have only one pinctrl config here, like you did recently for the other Gen3 SoCs?

We should, thanks for pointing it out, fixed in V2.

Signature · 2 lines

Best regards,
Marek Vasut

Yoshihiro Shimoda

2018-11-06 05:26 UTC #6 lore raw

PATCH 1/2 arm64: dts: r8a77990: Add SDHI device nodes

In reply to Marek Vasut

Hello Marek-san,

Quoted 14 lines

From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
From: Takeshi Kihara <[email protected]>
This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
Signed-off-by Takeshi Kihara <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Cc Geert Uytterhoeven <[email protected]>
Cc Simon Horman <[email protected]>
Cc Wolfram Sang <[email protected]>
Cc Yoshihiro Shimoda <[email protected]>
Cc linux-renesas-soc at vger.kernel.org
Cc linux-arm-kernel at lists.infradead.org

Quoted 1 line

---

Thank you for the patch!

Reviewed-by Yoshihiro Shimoda <[email protected]>

I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.

Best regards,
Yoshihiro Shimoda

Marek Vasut

author

2018-11-06 09:42 UTC #7 lore raw

PATCH 1/2 arm64: dts: r8a77990: Add SDHI device nodes

Quoted 1 line · Yoshihiro Shimoda

Hello Marek-san,

Hello Shimoda-san,

Quoted 16 lines

Quoted 14 lines
From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
From: Takeshi Kihara <[email protected]>
This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
Signed-off-by Takeshi Kihara <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Cc Geert Uytterhoeven <[email protected]>
Cc Simon Horman <[email protected]>
Cc Wolfram Sang <[email protected]>
Cc Yoshihiro Shimoda <[email protected]>
Cc linux-renesas-soc at vger.kernel.org
Cc linux-arm-kernel at lists.infradead.org
Quoted 1 line
---

Quoted 5 lines

Thank you for the patch!
Reviewed-by Yoshihiro Shimoda <[email protected]>
I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.

I wonder about that, 1/2 is adding SDHI DT nodes for an SoC, 2/2 is enabling SDHI on a particular board, which I think should be separate.

Signature · 2 lines

Best regards,
Marek Vasut

Geert Uytterhoeven

2018-11-06 10:35 UTC #8 lore raw

PATCH 1/2 arm64: dts: r8a77990: Add SDHI device nodes

Hi Marek,

Quoted 17 lines · Marek Vasut

Quoted 16 lines · Yoshihiro Shimoda
Quoted 15 lines
From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
From: Takeshi Kihara <[email protected]>
This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
Signed-off-by Takeshi Kihara <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Cc Geert Uytterhoeven <[email protected]>
Cc Simon Horman <[email protected]>
Cc Wolfram Sang <[email protected]>
Cc Yoshihiro Shimoda <[email protected]>
Cc linux-renesas-soc at vger.kernel.org
Cc linux-arm-kernel at lists.infradead.org
---

Quoted 8 lines

Quoted 5 lines
Thank you for the patch!
Reviewed-by Yoshihiro Shimoda <[email protected]>
I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.
I wonder about that, 1/2 is adding SDHI DT nodes for an SoC, 2/2 is enabling SDHI on a particular board, which I think should be separate.

The arm-soc maintainers tend to disagree, that's why Shimoda-san asked to combine them.

Gr{oetje,eeting}s,

Geert

Signature · 5 lines

Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Simon Horman

2018-11-06 12:17 UTC #9 lore raw

PATCH 1/2 arm64: dts: r8a77990: Add SDHI device nodes

Quoted 24 lines · Geert Uytterhoeven

Hi Marek,
Quoted 21 lines · Marek Vasut
Quoted 20 lines · Yoshihiro Shimoda
Quoted 14 lines
From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
From: Takeshi Kihara <[email protected]>
This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
Signed-off-by Takeshi Kihara <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Cc Geert Uytterhoeven <[email protected]>
Cc Simon Horman <[email protected]>
Cc Wolfram Sang <[email protected]>
Cc Yoshihiro Shimoda <[email protected]>
Cc linux-renesas-soc at vger.kernel.org
Cc linux-arm-kernel at lists.infradead.org
Quoted 1 line
---
Thank you for the patch!
Reviewed-by Yoshihiro Shimoda <[email protected]>

Quoted 7 lines

Quoted 4 lines
Quoted 1 line
I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.
I wonder about that, 1/2 is adding SDHI DT nodes for an SoC, 2/2 is enabling SDHI on a particular board, which I think should be separate.
The arm-soc maintainers tend to disagree, that's why Shimoda-san asked to combine them.

That is also my understanding.
Please consider combining these patches.

Marek Vasut

author

2018-11-06 20:47 UTC #10 lore raw

PATCH 1/2 arm64: dts: r8a77990: Add SDHI device nodes

In reply to Geert Uytterhoeven

Quoted 1 line · Geert Uytterhoeven

Hi Marek,

Hi,

Quoted 22 lines · Marek Vasut

Quoted 21 lines · Yoshihiro Shimoda
Quoted 20 lines
Quoted 14 lines
From: Marek Vasut, Sent: Tuesday, November 6, 2018 6:41 AM
From: Takeshi Kihara <[email protected]>
This patch adds SDHI{0,1,3} device nodes for the r8a77990 SoC.
Signed-off-by Takeshi Kihara <[email protected]>
Signed-off-by Marek Vasut <[email protected]>
Cc Geert Uytterhoeven <[email protected]>
Cc Simon Horman <[email protected]>
Cc Wolfram Sang <[email protected]>
Cc Yoshihiro Shimoda <[email protected]>
Cc linux-renesas-soc at vger.kernel.org
Cc linux-arm-kernel at lists.infradead.org
Quoted 1 line
---
Thank you for the patch!
Reviewed-by Yoshihiro Shimoda <[email protected]>

Quoted 7 lines

Quoted 4 lines
Quoted 1 line
I guess this patch and the 2/2 patch for ebisu have to be merged into a patch though.
I wonder about that, 1/2 is adding SDHI DT nodes for an SoC, 2/2 is enabling SDHI on a particular board, which I think should be separate.
The arm-soc maintainers tend to disagree, that's why Shimoda-san asked to combine them.

Combined patch is out.

Signature · 2 lines

Best regards,
Marek Vasut