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pinctrl: nuvoton: modify NPCM7xx pin configuration

PATCH In review Tomer Maimon 3 participants 4 messages Nov 7, 2018 – Nov 15, 2018

Subsystems (3)
GPIO Pin control Arm/nuvoton npcm architecture
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Tomer Maimon

author maintainer
#0 lore raw

cover pinctrl: nuvoton: modify NPCM7xx pin configuration

This patch Modify GPIO direction setting in pin configuration function.

please refer patch:
Kun Yi https://patchwork.ozlabs.org/patch/985540/

Tomer Maimon (1):
pinctrl: nuvoton: modify NPCM7xx pin configuration function

 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)
Signature · 1 line
2.14.1
author maintainer
#1 lore raw

PATCH 1/1 pinctrl: nuvoton: modify NPCM7xx pin configuration function

Modify GPIO direction setting in pin configuration function by using generic GPIO functions to set the GPIO direction instead of direct access to the GPIO direction register.

Signed-off-by Tomer Maimon <[email protected]>
---
 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +3 -10
index 7ad50d9268aa..b455209382a5 100644
@@ -1799,19 +1799,12 @@ static int npcm7xx_config_set_one(struct npcm7xx_pinctrl *npcm,
 		npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_PU, gpio);
 		break;
 	case PIN_CONFIG_INPUT_ENABLE:
-		if (arg) {
-			iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
-			npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_IEM,
-				      gpio);
-		} else
-			npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_IEM,
-				      gpio);
+		iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
+		bank->direction_input(&bank->gc, pin % bank->gc.ngpio);
 		break;
 	case PIN_CONFIG_OUTPUT:
-		npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_IEM, gpio);
-		iowrite32(gpio, arg ? bank->base + NPCM7XX_GP_N_DOS :
-			  bank->base + NPCM7XX_GP_N_DOC);
 		iowrite32(gpio, bank->base + NPCM7XX_GP_N_OES);
+		bank->direction_output(&bank->gc, pin % bank->gc.ngpio, arg);
 		break;
 	case PIN_CONFIG_DRIVE_PUSH_PULL:
 		npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_OTYP, gpio);
Signature · 1 line
2.14.1
Tested-by on v1 1/1
#2 lore raw

Re: [PATCH v1 1/1] pinctrl: nuvoton: modify NPCM7xx pin configuration function

Quoted 6 lines · Tomer Maimon

Modify GPIO direction setting in pin configuration function by using generic GPIO functions to set the GPIO direction instead of direct access to the GPIO direction register.

Signed-off-by Tomer Maimon <[email protected]>
Tested-by Kun Yi <[email protected]>

Thanks for sending the patch Tomer!

Quoted 32 lines
---
 drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +3 -11
index 7ad50d9268aa..b455209382a5 100644
@@ -1799,19 +1799,12 @@ static int npcm7xx_config_set_one(struct npcm7xx_pinctrl *npcm,
                npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_PU, gpio);
                break;
        case PIN_CONFIG_INPUT_ENABLE:
-               if (arg) {
-                       iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
-                       npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_IEM,
-                                     gpio);
-               } else
-                       npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_IEM,
-                                     gpio);
+               iowrite32(gpio, bank->base + NPCM7XX_GP_N_OEC);
+               bank->direction_input(&bank->gc, pin % bank->gc.ngpio);
                break;
        case PIN_CONFIG_OUTPUT:
-               npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_IEM, gpio);
-               iowrite32(gpio, arg ? bank->base + NPCM7XX_GP_N_DOS :
-                         bank->base + NPCM7XX_GP_N_DOC);
                iowrite32(gpio, bank->base + NPCM7XX_GP_N_OES);
+               bank->direction_output(&bank->gc, pin % bank->gc.ngpio, arg);
                break;
        case PIN_CONFIG_DRIVE_PUSH_PULL:
                npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_OTYP, gpio);
--
Quoted 2 lines

2.14.1

--
Regards,
Kun

#3 lore raw

Re: [PATCH v1 1/1] pinctrl: nuvoton: modify NPCM7xx pin configuration function

In reply to Tomer Maimon
Quoted 5 lines · Tomer Maimon

Modify GPIO direction setting in pin configuration function by using generic GPIO functions to set the GPIO direction instead of direct access to the GPIO direction register.

Signed-off-by Tomer Maimon <[email protected]>

Patch applied with Kun Yi's tested-by tag!

Yours,
Linus Walleij