ARM: dts: BCM5301X: Describe Northstar pins mux controller
PATCH 1/1 ARM: dts: BCM5301X: Describe Northstar pins mux controller
From: Rafa? Mi?ecki <[email protected]>
This describes hardware & will allow referencing pin functions. The first usage is UART1 which allows supporting devices using it.
Signed-off-by Rafa? Mi?ecki <[email protected]>
---
For the documentation see:Documentation/devicetree/bindings/pinctrl/brcm,bcm4708-pinmux.txt
--- arch/arm/boot/dts/bcm5301x.dtsi | 44 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+)
arch/arm/boot/dts/bcm5301x.dtsi +44 -0
@@ -37,6 +37,8 @@ reg = <0x0400 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&iprocslow>; + pinctrl-names = "default"; + pinctrl-0 = <&pinmux_uart1>; status = "disabled"; }; };
@@ -391,6 +393,48 @@ status = "disabled"; }; + dmu at 1800c000 { + compatible = "simple-bus"; + ranges = <0 0x1800c000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + + cru at 100 { + compatible = "simple-bus"; + reg = <0x100 0x1a4>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + + pin-controller at 1c0 { + compatible = "brcm,bcm4708-pinmux"; + reg = <0x1c0 0x24>; + reg-names = "cru_gpio_control"; + + spi-pins { + groups = "spi_grp"; + function = "spi"; + }; + + i2c { + groups = "i2c_grp"; + function = "i2c"; + }; + + pwm { + groups = "pwm0_grp", "pwm1_grp", + "pwm2_grp", "pwm3_grp"; + function = "pwm"; + }; + + pinmux_uart1: uart1 { + groups = "uart1_grp"; + function = "uart1"; + }; + }; + }; + }; + lcpll0: lcpll0 at 1800c100 { #clock-cells = <1>; compatible = "brcm,nsp-lcpll0";
Signature · 1 line
2.13.7
Florian Fainelli
AppliedQuoted 7 lines · Rafał Miłecki
From: Rafał Miłecki <[email protected]>
This describes hardware & will allow referencing pin functions. The first usage is UART1 which allows supporting devices using it.
Signed-off-by Rafał Miłecki <[email protected]>---
Applied to devicetree/next, thanks!
--
Florian
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