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toolchain: Enable Glibc for all little-endian ARCs with atomic ops

PATCH New Alexey Brodkin 2 participants 2 messages Nov 9, 2018

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Alexey Brodkin

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PATCH v2 1/1 toolchain: Enable Glibc for all little-endian ARCs with atomic ops

Initially we had a port only for ARCv2 cores but
then with a simple change ARCompact cores got supported as well.

So we generalize from BR2_archs to BR2_arcle as we haven't tried to get glibc working on big-endian ARCs yet.

Also we never bothered to check avaialbility of atomic instructions in the core but in case of Glibc for ARC this is really a must, so we add this check here.

Note in case of uClibc we may have system w/o HW atomics but:
1. Only single-core systems are allowed
2. Atomic instructions are emulated via arc_usr_cmpxchg syscall

Signed-off-by Alexey Brodkin <[email protected]>
Cc Arnout Vandecappelle (Essensium/Mind) <[email protected]>
Cc Thomas Petazzoni <[email protected]>
Cc Peter Korsgaard <[email protected]>

---

Changes v1 -> v2

* Merge both conditions in one place [Thomas]

 toolchain/toolchain-buildroot/Config.in | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
toolchain/toolchain-buildroot/Config.in +1 -1
index 7d9428c70ed0..beb17a218b57 100644
@@ -48,7 +48,7 @@ config BR2_TOOLCHAIN_BUILDROOT_GLIBC
 		   BR2_powerpc     || BR2_powerpc64  || BR2_powerpc64le || \
 		   BR2_riscv       || BR2_sh         || BR2_sparc64     || \
 		   BR2_x86_64      || BR2_microblaze || BR2_nios2       || \
-		   BR2_archs38
+		   (BR2_arcle && BR2_ARC_ATOMIC_EXT)
 	depends on BR2_USE_MMU
 	depends on !BR2_STATIC_LIBS
 	depends on BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_2
Signature · 1 line
2.19.1
Applied
#1 lore raw

PATCH v2 1/1 toolchain: Enable Glibc for all little-endian ARCs with atomic ops

Hello,

Quoted 14 lines · Alexey Brodkin

Initially we had a port only for ARCv2 cores but
then with a simple change ARCompact cores got supported as well.

So we generalize from BR2_archs to BR2_arcle as we haven't tried to get glibc working on big-endian ARCs yet.

Also we never bothered to check avaialbility of atomic instructions in the core but in case of Glibc for ARC this is really a must, so we add this check here.

Note in case of uClibc we may have system w/o HW atomics but:
1. Only single-core systems are allowed
2. Atomic instructions are emulated via arc_usr_cmpxchg syscall

Quoted 5 lines
Signed-off-by Alexey Brodkin <[email protected]>
Cc Arnout Vandecappelle (Essensium/Mind) <[email protected]>
Cc Thomas Petazzoni <[email protected]>
Cc Peter Korsgaard <[email protected]>

---

Applied to master, thanks.

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com