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x86: acpi: Enable RTC for Intel Tangier

PATCH New Andy Shevchenko 2 participants 6 messages Nov 10, 2018 – Nov 18, 2018 x86

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Andy Shevchenko

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#0 lore raw

PATCH 1/2 x86: acpi: Enable RTC for Intel Tangier

Intel Tangier SoC has RTC inside. So, enable it in ACPI.

Signed-off-by Andy Shevchenko <[email protected]>
---
 arch/x86/include/asm/arch-tangier/acpi/platform.asl | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/x86/include/asm/arch-tangier/acpi/platform.asl +13 -0
index 7abea4bb96..353b879918 100644
@@ -21,6 +21,19 @@ Method(_WAK, 1)
     Return (Package() {0, 0})
 }
 
+Scope (_SB)
+{
+    /* Real Time Clock */
+    Device (RTC0)
+    {
+        Name (_HID, EisaId ("PNP0B00"))
+        Name (_CRS, ResourceTemplate()
+        {
+            IO(Decode16, 0x70, 0x70, 0x01, 0x08)
+        })
+    }
+}
+
 /* ACPI global NVS */
 #include "global_nvs.asl"
Signature · 1 line
2.19.1
author
#1 lore raw

PATCH 2/2 x86: acpi: Fix indentation in Intel Tangier ASL code

Make the indentation aligned with what used elsewhere in U-Boot.

No functional change intended.

Signed-off-by Andy Shevchenko <[email protected]>
---
 .../include/asm/arch-tangier/acpi/southcluster.asl   | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
arch/x86/include/asm/arch-tangier/acpi/southcluster.asl +6 -6
index 48193ba957..e166e510cb 100644
@@ -295,16 +295,16 @@ Device (PCI0)
 
             Method (_CRS, 0, Serialized)
             {
-                Name (RBUF, ResourceTemplate ()
+                Name (RBUF, ResourceTemplate()
                 {
-                    UartSerialBus (0x0001C200, DataBitsEight, StopBitsOne,
+                    UartSerialBus(0x0001C200, DataBitsEight, StopBitsOne,
                         0xFC, LittleEndian, ParityTypeNone, FlowControlHardware,
                         0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , )
-                    GpioInt (Level, ActiveHigh, Exclusive, PullNone, 0,
+                    GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0,
                         "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 }
-                    GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
+                    GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
                         "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 }
-                    GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
+                    GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
                         "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 }
                 })
                 Return (RBUF)

@@ -328,7 +328,7 @@ Device (FLIS)
     Name (_DDN, "Intel Merrifield Family-Level Interface Shim")
     Name (RBUF, ResourceTemplate()
     {
-        Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000, )
+        Memory32Fixed(ReadWrite, 0xFF0C0000, 0x00008000)
         PinGroup("spi5", ResourceProducer, ) { 90, 91, 92, 93, 94, 95, 96 }
         PinGroup("uart0", ResourceProducer, ) { 115, 116, 117, 118 }
         PinGroup("uart1", ResourceProducer, ) { 119, 120, 121, 122 }
Signature · 1 line
2.19.1
#2 lore raw

PATCH 2/2 x86: acpi: Fix indentation in Intel Tangier ASL code

Quoted 10 lines · Andy Shevchenko

Make the indentation aligned with what used elsewhere in U-Boot.

No functional change intended.

Signed-off-by Andy Shevchenko <[email protected]>
---
 .../include/asm/arch-tangier/acpi/southcluster.asl   | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
Reviewed-by Bin Meng <[email protected]>
#3 lore raw

PATCH 2/2 x86: acpi: Fix indentation in Intel Tangier ASL code

Quoted 8 lines · Bin Meng
Quoted 5 lines · Andy Shevchenko

Make the indentation aligned with what used elsewhere in U-Boot.

No functional change intended.

Quoted 7 lines
Quoted 5 lines
Signed-off-by Andy Shevchenko <[email protected]>
---
 .../include/asm/arch-tangier/acpi/southcluster.asl   | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
Reviewed-by Bin Meng <[email protected]>

applied to u-boot-x86, thanks!

#5 lore raw

PATCH 1/2 x86: acpi: Enable RTC for Intel Tangier

Quoted 6 lines · Bin Meng
Quoted 3 lines · Andy Shevchenko

Intel Tangier SoC has RTC inside. So, enable it in ACPI.

Quoted 7 lines
Quoted 5 lines
Signed-off-by Andy Shevchenko <[email protected]>
---
 arch/x86/include/asm/arch-tangier/acpi/platform.asl | 13 +++++++++++++
 1 file changed, 13 insertions(+)
Reviewed-by Bin Meng <[email protected]>

applied to u-boot-x86, thanks!