imx: fix M4 boot on i.MX8MQ processors

PATCH New Gary Bisson 3 participants 7 messages Nov 14, 2018 – Dec 8, 2018

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Gary Bisson

author

2018-11-14 16:55 UTC #0 lore raw

cover imx: fix M4 boot on i.MX8MQ processors

Hi,

This series fixes loading a M4 firmware into memory and start that M4 core using bootaux on i.MX8MQ platforms.

There were two issues:
1- the memory where the firmware is loaded (TCM) wasn't mapped 2- the bootaux code relied on ulong instead of u32 (M4 core is 32-bit)

This was tested on Nitrogen8M platform.

Regards,
Gary

Gary Bisson (2):
imx: mx8m: add memory mapping for CAAM and TCM
imx: bootaux: fix stack and pc assignment on 64-bit platforms

 arch/arm/mach-imx/imx_bootaux.c |  4 ++--
 arch/arm/mach-imx/mx8m/soc.c    | 16 ++++++++++++++++
 2 files changed, 18 insertions(+), 2 deletions(-)

Signature · 1 line

2.19.1

Gary Bisson

author

2018-11-14 16:55 UTC #1 lore raw

PATCH 1/2 imx: mx8m: add memory mapping for CAAM and TCM

Otherwise can't boot the M4 core as it is impossible to load its firmware into the TCM memory.

Signed-off-by Gary Bisson <[email protected]>

---
 arch/arm/mach-imx/mx8m/soc.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

arch/arm/mach-imx/mx8m/soc.c +16 -0

index 46873aa8dd..11251c5f9a 100644
@@ -77,6 +77,22 @@ static struct mm_region imx8m_mem_map[] = {
 		.size = 0x100000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_OUTER_SHARE
+	}, {
+		/* CAAM */
+		.virt = 0x100000UL,
+		.phys = 0x100000UL,
+		.size = 0x8000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {
+		/* TCM */
+		.virt = 0x7C0000UL,
+		.phys = 0x7C0000UL,
+		.size = 0x80000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
 	}, {
 		/* OCRAM */
 		.virt = 0x900000UL,

Signature · 1 line

2.19.1

Peng Fan

2018-11-17 10:00 UTC #2 lore raw

PATCH 1/2 imx: mx8m: add memory mapping for CAAM and TCM

Quoted 36 lines

-----Original Message-----
From: Gary Bisson [mailto:gary.bisson at boundarydevices.com]
Sent: 2018年11月15日 0:55
To: u-boot at lists.denx.de
Cc: sbabic at denx.de; Fabio Estevam <[email protected]>; Peng Fan <[email protected]>; dl-linux-imx <[email protected]>; Gary Bisson <[email protected]>
Subject: [PATCH 1/2] imx: mx8m: add memory mapping for CAAM and TCM
Otherwise can't boot the M4 core as it is impossible to load its firmware into the TCM memory.
Signed-off-by Gary Bisson <[email protected]>
---
 arch/arm/mach-imx/mx8m/soc.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
(quoted diff) +0 -0
b/arch/arm/mach-imx/mx8m/soc.c index 46873aa8dd..11251c5f9a 100644
arch/arm/mach-imx/mx8m/soc.c +9 -0
@@ -77,6 +77,22 @@ static struct mm_region imx8m_mem_map[] = {
 		.size = 0x100000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_OUTER_SHARE
+	}, {
+		/* CAAM */
+		.virt = 0x100000UL,
+		.phys = 0x100000UL,
+		.size = 0x8000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {

arch/arm/mach-imx/mx8m/soc.c static struct mm_region imx8m_mem_map[] = { · line 98

Quoted 10 lines

arch/arm/mach-imx/mx8m/soc.c +7 -0

+		/* TCM */
+		.virt = 0x7C0000UL,
+		.phys = 0x7C0000UL,
+		.size = 0x80000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
 	}, {
 		/* OCRAM */
 		.virt = 0x900000UL,

Reviewed-by Peng Fan <[email protected]>

Quoted 2 lines

--
2.19.1

Stefano Babic

2018-12-08 17:38 UTC #3 lore raw

PATCH 1/2 imx: mx8m: add memory mapping for CAAM and TCM

In reply to Gary Bisson

Quoted 26 lines · Gary Bisson

Otherwise can't boot the M4 core as it is impossible to load its firmware into the TCM memory.

Signed-off-by Gary Bisson <[email protected]>

---
 arch/arm/mach-imx/mx8m/soc.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

arch/arm/mach-imx/mx8m/soc.c +9 -0

index 46873aa8dd..11251c5f9a 100644
@@ -77,6 +77,22 @@ static struct mm_region imx8m_mem_map[] = {
 		.size = 0x100000UL,
 		.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
 			 PTE_BLOCK_OUTER_SHARE
+	}, {
+		/* CAAM */
+		.virt = 0x100000UL,
+		.phys = 0x100000UL,
+		.size = 0x8000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
+	}, {

arch/arm/mach-imx/mx8m/soc.c static struct mm_region imx8m_mem_map[] = { · line 98

Quoted 10 lines

arch/arm/mach-imx/mx8m/soc.c +7 -0

+		/* TCM */
+		.virt = 0x7C0000UL,
+		.phys = 0x7C0000UL,
+		.size = 0x80000UL,
+		.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+			 PTE_BLOCK_NON_SHARE |
+			 PTE_BLOCK_PXN | PTE_BLOCK_UXN
 	}, {
 		/* OCRAM */
 		.virt = 0x900000UL,

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

Gary Bisson

author

2018-11-14 16:55 UTC #4 lore raw

PATCH 2/2 imx: bootaux: fix stack and pc assignment on 64-bit platforms

In reply to Gary Bisson

Using ulong is wrong as its size depends on the Host CPU architecture (32-bit vs. 64-bit) although the Cortex-M4 is always 32-bit.

Without this patch, the stack and PC are obviously wrong and it generates an abort when used on 64-bit processors such as the i.MX8MQ.

Signed-off-by Gary Bisson <[email protected]>

---
 arch/arm/mach-imx/imx_bootaux.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

arch/arm/mach-imx/imx_bootaux.c +2 -2

index a1ea5c13f1..3103001b7c 100644
@@ -17,8 +17,8 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
 	if (!boot_private_data)
 		return -EINVAL;
 
-	stack = *(ulong *)boot_private_data;
-	pc = *(ulong *)(boot_private_data + 4);
+	stack = *(u32 *)boot_private_data;
+	pc = *(u32 *)(boot_private_data + 4);
 
 	/* Set the stack and pc to M4 bootROM */
 	writel(stack, M4_BOOTROM_BASE_ADDR);

Signature · 1 line

2.19.1

Peng Fan

2018-11-17 10:02 UTC #5 lore raw

PATCH 2/2 imx: bootaux: fix stack and pc assignment on 64-bit platforms

Quoted 38 lines

-----Original Message-----
From: Gary Bisson [mailto:gary.bisson at boundarydevices.com]
Sent: 2018年11月15日 0:55
To: u-boot at lists.denx.de
Cc: sbabic at denx.de; Fabio Estevam <[email protected]>; Peng Fan <[email protected]>; dl-linux-imx <[email protected]>; Gary Bisson <[email protected]>
Subject: [PATCH 2/2] imx: bootaux: fix stack and pc assignment on 64-bit platforms
Using ulong is wrong as its size depends on the Host CPU architecture (32-bit vs. 64-bit) although the Cortex-M4 is always 32-bit.
Without this patch, the stack and PC are obviously wrong and it generates an abort when used on 64-bit processors such as the i.MX8MQ.
Signed-off-by Gary Bisson <[email protected]>
---
 arch/arm/mach-imx/imx_bootaux.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
(quoted diff) +0 -0
b/arch/arm/mach-imx/imx_bootaux.c index a1ea5c13f1..3103001b7c 100644
arch/arm/mach-imx/imx_bootaux.c +2 -2
@@ -17,8 +17,8 @@ int arch_auxiliary_core_up(u32 core_id, ulong
 boot_private_data)
 	if (!boot_private_data)
 		return -EINVAL;
 
-	stack = *(ulong *)boot_private_data;
-	pc = *(ulong *)(boot_private_data + 4);
+	stack = *(u32 *)boot_private_data;
+	pc = *(u32 *)(boot_private_data + 4);
 
 	/* Set the stack and pc to M4 bootROM */

Quoted 1 line

writel(stack, M4_BOOTROM_BASE_ADDR);

Reviewed-by Peng Fan <[email protected]>

Quoted 2 lines

--
2.19.1

Stefano Babic

2018-12-08 17:38 UTC #6 lore raw

PATCH 2/2 imx: bootaux: fix stack and pc assignment on 64-bit platforms

In reply to Gary Bisson

Quoted 17 lines · Gary Bisson

Using ulong is wrong as its size depends on the Host CPU architecture (32-bit vs. 64-bit) although the Cortex-M4 is always 32-bit.
Without this patch, the stack and PC are obviously wrong and it generates an abort when used on 64-bit processors such as the i.MX8MQ.
Signed-off-by Gary Bisson <[email protected]>
---
 arch/arm/mach-imx/imx_bootaux.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm/mach-imx/imx_bootaux.c +0 -0
index a1ea5c13f1..3103001b7c 100644

arch/arm/mach-imx/imx_bootaux.c int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) · line 24

Quoted 10 lines

arch/arm/mach-imx/imx_bootaux.c +2 -2

@@ -17,8 +17,8 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
 	if (!boot_private_data)
 		return -EINVAL;
 
-	stack = *(ulong *)boot_private_data;
-	pc = *(ulong *)(boot_private_data + 4);
+	stack = *(u32 *)boot_private_data;
+	pc = *(u32 *)(boot_private_data + 4);
 
 	/* Set the stack and pc to M4 bootROM */
 	writel(stack, M4_BOOTROM_BASE_ADDR);

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic

Signature · 5 lines

=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================