Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
Subsystems (4)
PATCH v3 1/6 Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
This patch adds Allwinner sun8i pwm binding document.
--- .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +24 -0
@@ -0,0 +1,24 @@ +Allwinner sun8i R40/V40/T3 SoC PWM controller + +Required properties: + - compatible: Should be one of: + - "allwinner,sun8i-r40-pwm" + - reg: Physical base address and length of the controller's registers + - interrupts: Should contain interrupt. + - clocks: From common clock binding, handle to the parent clock. + - clock-names: Must contain the clock names described just above. + - pwm-channels: PWM channels of the controller. + - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of + the cells format. + +Example: + +pwm: pwm at 1c23400 { + compatible = "allwinner,sun8i-r40-pwm"; + reg = <0x01c23400 0x400>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>, <&ccu CLK_APB1>; + clock-names = "mux-0", "mux-1"; + pwm-channels = <8>; + #pwm-cells = <3>; +};
Signature · 1 line
2.7.4
Quoted 8 lines · Hao Zhang
This patch adds Allwinner sun8i pwm binding document.
Signed-off-by Hao Zhang <[email protected]>--- .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
Hello,
Quoted 16 lines · Hao Zhang
This patch adds Allwinner sun8i pwm binding document.
Signed-off-by Hao Zhang <[email protected]>--- .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txtDocumentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +2
-0@@ -0,0 +1,24 @@ +Allwinner sun8i R40/V40/T3 SoC PWM controller +
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt line 12
Quoted 10 lines
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +10
-0+Required properties: + - compatible: Should be one of: + - "allwinner,sun8i-r40-pwm" + - reg: Physical base address and length of the controller's registers + - interrupts: Should contain interrupt. + - clocks: From common clock binding, handle to the parent clock. + - clock-names: Must contain the clock names described just above. + - pwm-channels: PWM channels of the controller. + - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of + the cells format.
I wonder why "interrupts" is needed here. I guess this is only needed for waveform capture? Is this only "optional"? The driver doesn't use it.
Apart from this interrupts property this is all pretty standard and I wonder if we could merge several documents into one.
For example Documentation/devicetree/bindings/pwm/pwm-st.txt looks identically apart from "pwm-channels" being called "st,pwm-num-chan" there. (It even has an interrupts property. Should the st driver move to "pwm-channels", too?)
Best regards
Uwe
Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
Quoted 14 lines · Hao Zhang
This patch adds Allwinner sun8i pwm binding document.
Signed-off-by Hao Zhang <[email protected]>--- .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txtDocumentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +0
-0
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt line 9
Quoted 9 lines
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +9
-0@@ -0,0 +1,24 @@ +Allwinner sun8i R40/V40/T3 SoC PWM controller + +Required properties: + - compatible: Should be one of: + - "allwinner,sun8i-r40-pwm" + - reg: Physical base address and length of the controller's registers + - interrupts: Should contain interrupt. + - clocks: From common clock binding, handle to the parent clock. + - clock-names: Must contain the clock names described just above.
You didn't describe those names in that document.
You seem to have used mux-0 and mux-1 for the clock names. I guess we don't have to use a name there, we can simply use the position to find out (as long as it's documented in the binding)
Maxime
Signature · 3 lines
Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
Hello,
Quoted 9 lines · Maxime Ripard
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt line 9
Quoted 2 lines · Hao Zhang
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +2
-0+ - clocks: From common clock binding, handle to the parent clock. + - clock-names: Must contain the clock names described just above.[...]
You seem to have used mux-0 and mux-1 for the clock names. I guess we don't have to use a name there, we can simply use the position to find out (as long as it's documented in the binding)
I also wondered if the driver relies on the fact that the second clock is the faster running one. Is this sensible?
Best regards
Uwe
Signature · 2 lines
Pengutronix e.K. | Uwe Kleine-K?nig | Industrial Linux Solutions | http://www.pengutronix.de/ |
Quoted 7 lines · Uwe Kleine-K?nig
Hello,
Quoted 4 lines · Maxime Ripard
Quoted 2 lines · Hao Zhang
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +2
-0+ - clocks: From common clock binding, handle to the parent clock. + - clock-names: Must contain the clock names described just above.
Quoted 8 lines
Quoted 5 lines
[...]
You seem to have used mux-0 and mux-1 for the clock names. I guess we don't have to use a name there, we can simply use the position to find out (as long as it's documented in the binding)
I also wondered if the driver relies on the fact that the second clock is the faster running one. Is this sensible?
Not really, I'm not sure we can make those expectations in the DT binding, especially since clock rate can change at runtime.
Maxime
Signature · 10 lines
Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 228 bytes Desc: not available URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20181127/9a1f0822/attachment.sig>
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Hi!
(Please keep all the recipiens in Cc)
Quoted 22 lines · Hao Zhang
Quoted 15 lines · Maxime Ripard <[email protected]>…
Quoted 13 lines · Uwe Kleine-König
Hello,
Quoted 9 lines · Maxime Ripard
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt line 9
Quoted 2 lines · Hao Zhang
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +2
-0+ - clocks: From common clock binding, handle to the parent clock. + - clock-names: Must contain the clock names described just above.[...]
You seem to have used mux-0 and mux-1 for the clock names. I guess we don't have to use a name there, we can simply use the position to find out (as long as it's documented in the binding)
Quoted 5 lines
Quoted 2 lines
I also wondered if the driver relies on the fact that the second clock is the faster running one. Is this sensible?
Not really, I'm not sure we can make those expectations in the DT binding, especially since clock rate can change at runtime.
Quoted 6 lines
How about just add one clock on DT, most of the time, 24MHZ is enough (apb1 is 100MHZ)
other one just use as a optional.
clock rate change at runtime would make the same pair pwm channel uncontrollable,
because previous one would be change by the new one different setting.
The DT is a hardware representation. If the hardware block can use both clocks, it should be described.
Now, you can totally use only one clock of these 2 in your driver if that's easier / more reasonable.
Maxime
Signature · 8 lines
Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/[email protected] For more options, visit https://groups.google.com/d/optout.
Quoted 14 lines · Hao Zhang
This patch adds Allwinner sun8i pwm binding document.
Signed-off-by Hao Zhang <[email protected]>--- .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txtDocumentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +0
-0
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt line 10
Quoted 10 lines
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +10
-0@@ -0,0 +1,24 @@ +Allwinner sun8i R40/V40/T3 SoC PWM controller + +Required properties: + - compatible: Should be one of: + - "allwinner,sun8i-r40-pwm" + - reg: Physical base address and length of the controller's registers + - interrupts: Should contain interrupt. + - clocks: From common clock binding, handle to the parent clock. + - clock-names: Must contain the clock names described just above. + - pwm-channels: PWM channels of the controller.
Why do you need this? In the cover letter you say:
"The sun8i R40/T3/V40 PWM has 8 PWM channals ..."
Why does this need to be specified in the DT?
Thierry
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PATCH v3 1/6 Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
---------- Forwarded message ---------
From: Hao Zhang <[email protected]>
Date: 2019年3月12日周二 下午12:59
Subject: Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
To: Thierry Reding <[email protected]>
Quoted 29 lines · Thierry Reding <[email protected]>…
Quoted 14 lines · Hao Zhang
This patch adds Allwinner sun8i pwm binding document.
Signed-off-by Hao Zhang <[email protected]>--- .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txtDocumentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +0
-0Documentation/devicetree/bindings/pwm/pwm-sun8i.txt line 10
Quoted 10 lines
Documentation/devicetree/bindings/pwm/pwm-sun8i.txt new file +10
-0@@ -0,0 +1,24 @@ +Allwinner sun8i R40/V40/T3 SoC PWM controller + +Required properties: + - compatible: Should be one of: + - "allwinner,sun8i-r40-pwm" + - reg: Physical base address and length of the controller's registers + - interrupts: Should contain interrupt. + - clocks: From common clock binding, handle to the parent clock. + - clock-names: Must contain the clock names described just above. + - pwm-channels: PWM channels of the controller.Why do you need this? In the cover letter you say:
Quoted 3 lines
"The sun8i R40/T3/V40 PWM has 8 PWM channals ..."Why does this need to be specified in the DT?
T3 PWM has 8 channals, i think it is necessary to tell user how to specify it Instead of
hardcode the channal myself :)
Thanks for review :)
Quoted 18 lines
Thierry
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