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serial: bcm6345: switch to raw I/O functions

PATCH Superseded Álvaro Fernández Rojas 3 participants 12 messages Nov 30, 2018 – Dec 7, 2018

Subsystems (2)
Arm (32-bit) Broadcom bcmbca Arm architecture
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Álvaro Fernández Rojas

author
#0 lore raw

cover serial: bcm6345: switch to raw I/O functions

These patches allow to use bcm6345 uart driver for both BE and LE, making bcm6858 serial driver unneeded.

Álvaro Fernández Rojas (3):
serial: bcm6345: switch to raw I/O functions
arm: implement {in,out}_{16,32} and {clr,set,clrset}bits_{16,32}
serial: bcm6858: remove driver and switch to bcm6345

 arch/arm/dts/bcm6858.dtsi       |   2 +-
 arch/arm/include/asm/io.h       |  13 ++
 configs/bcm968580_ram_defconfig |   2 +-
 drivers/serial/Kconfig          |   8 +-
 drivers/serial/Makefile         |   1 -
 drivers/serial/serial_bcm6345.c | 100 +++++++-------
 drivers/serial/serial_bcm6858.c | 300 ----------------------------------------
 7 files changed, 66 insertions(+), 360 deletions(-)
 delete mode 100644 drivers/serial/serial_bcm6858.c
Signature · 1 line
2.11.0
author
#1 lore raw

PATCH 1/3 serial: bcm6345: switch to raw I/O functions

Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
 drivers/serial/serial_bcm6345.c | 100 ++++++++++++++++++++--------------------
 1 file changed, 50 insertions(+), 50 deletions(-)
drivers/serial/serial_bcm6345.c +50 -50
index a0e709a11e..2866b88c26 100644
@@ -89,26 +89,26 @@ struct bcm6345_serial_priv {
 /* enable rx & tx operation on uart */
 static void bcm6345_serial_enable(void __iomem *base)
 {
-	setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
-		     UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+	setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+		   UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
 }
 
 /* disable rx & tx operation on uart */
 static void bcm6345_serial_disable(void __iomem *base)
 {
-	clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
-		     UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+	clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+		   UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
 }
 
 /* clear all unread data in rx fifo and unsent data in tx fifo */
 static void bcm6345_serial_flush(void __iomem *base)
 {
 	/* empty rx and tx fifo */
-	setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
-		     UART_CTL_RSTTXFIFO_MASK);
+	setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
+		   UART_CTL_RSTTXFIFO_MASK);
 
 	/* read any pending char to make sure all irq status are cleared */
-	readl_be(base + UART_FIFO_REG);
+	__raw_readl(base + UART_FIFO_REG);
 }
 
 static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)

@@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 	bcm6345_serial_flush(base);
 
 	/* set uart control config */
-	clrsetbits_be32(base + UART_CTL_REG,
-			/* clear rx timeout */
-			UART_CTL_RXTIMEOUT_MASK |
-			/* clear stop bits */
-			UART_CTL_STOPBITS_MASK |
-			/* clear bits per symbol */
-			UART_CTL_BITSPERSYM_MASK |
-			/* clear xmit break */
-			UART_CTL_XMITBRK_MASK |
-			/* clear reserved bit */
-			UART_CTL_RSVD_MASK |
-			/* disable parity */
-			UART_CTL_RXPAREN_MASK |
-			UART_CTL_TXPAREN_MASK |
-			/* disable loopback */
-			UART_CTL_LOOPBACK_MASK,
-			/* set timeout to 5 */
-			UART_CTL_RXTIMEOUT_5 |
-			/* set 8 bits/symbol */
-			UART_CTL_BITSPERSYM_8 |
-			/* set 1 stop bit */
-			UART_CTL_STOPBITS_1 |
-			/* set parity to even */
-			UART_CTL_RXPAREVEN_MASK |
-			UART_CTL_TXPAREVEN_MASK);
+	clrsetbits_32(base + UART_CTL_REG,
+		      /* clear rx timeout */
+		      UART_CTL_RXTIMEOUT_MASK |
+		      /* clear stop bits */
+		      UART_CTL_STOPBITS_MASK |
+		      /* clear bits per symbol */
+		      UART_CTL_BITSPERSYM_MASK |
+		      /* clear xmit break */
+		      UART_CTL_XMITBRK_MASK |
+		      /* clear reserved bit */
+		      UART_CTL_RSVD_MASK |
+		      /* disable parity */
+		      UART_CTL_RXPAREN_MASK |
+		      UART_CTL_TXPAREN_MASK |
+		      /* disable loopback */
+		      UART_CTL_LOOPBACK_MASK,
+		      /* set timeout to 5 */
+		      UART_CTL_RXTIMEOUT_5 |
+		      /* set 8 bits/symbol */
+		      UART_CTL_BITSPERSYM_8 |
+		      /* set 1 stop bit */
+		      UART_CTL_STOPBITS_1 |
+		      /* set parity to even */
+		      UART_CTL_RXPAREVEN_MASK |
+		      UART_CTL_TXPAREVEN_MASK);
 
 	/* set uart fifo config */
-	clrsetbits_be32(base + UART_FIFO_CFG_REG,
-			/* clear fifo config */
-			UART_FIFO_CFG_RX_MASK |
-			UART_FIFO_CFG_TX_MASK,
-			/* set fifo config to 4 */
-			UART_FIFO_CFG_RX_4 |
-			UART_FIFO_CFG_TX_4);
+	clrsetbits_32(base + UART_FIFO_CFG_REG,
+		      /* clear fifo config */
+		      UART_FIFO_CFG_RX_MASK |
+		      UART_FIFO_CFG_TX_MASK,
+		      /* set fifo config to 4 */
+		      UART_FIFO_CFG_RX_4 |
+		      UART_FIFO_CFG_TX_4);
 
 	/* set baud rate */
 	val = ((clk / baudrate) >> 4);

@@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 		val = (val >> 1);
 	else
 		val = (val >> 1) - 1;
-	writel_be(val, base + UART_BAUD_REG);
+	__raw_writel(val, base + UART_BAUD_REG);
 
 	/* clear interrupts */
-	writel_be(0, base + UART_IR_REG);
+	__raw_writel(0, base + UART_IR_REG);
 
 	/* enable uart */
 	bcm6345_serial_enable(base);

@@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 static int bcm6345_serial_pending(struct udevice *dev, bool input)
 {
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
-	u32 val = readl_be(priv->base + UART_IR_REG);
+	u32 val = __raw_readl(priv->base + UART_IR_REG);
 
 	if (input)
 		return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY));

@@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch)
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
 	u32 val;
 
-	val = readl_be(priv->base + UART_IR_REG);
+	val = __raw_readl(priv->base + UART_IR_REG);
 	if (!(val & UART_IR_STAT(UART_IR_TXEMPTY)))
 		return -EAGAIN;
 
-	writel_be(ch, priv->base + UART_FIFO_REG);
+	__raw_writel(ch, priv->base + UART_FIFO_REG);
 
 	return 0;
 }

@@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev)
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
 	u32 val;
 
-	val = readl_be(priv->base + UART_IR_REG);
+	val = __raw_readl(priv->base + UART_IR_REG);
 	if (val & UART_IR_STAT(UART_IR_RXOVER))
-		setbits_be32(priv->base + UART_CTL_REG,
-			     UART_CTL_RSTRXFIFO_MASK);
+		setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK);
 	if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
 		return -EAGAIN;
 
-	val = readl_be(priv->base + UART_FIFO_REG);
+	val = __raw_readl(priv->base + UART_FIFO_REG);
 	if (val & UART_FIFO_ANYERR_MASK)
 		return -EAGAIN;
 

@@ -264,6 +263,7 @@ U_BOOT_DRIVER(bcm6345_serial) = {
 	.probe = bcm6345_serial_probe,
 	.priv_auto_alloc_size = sizeof(struct bcm6345_serial_priv),
 	.ops = &bcm6345_serial_ops,
+	.flags = DM_FLAG_PRE_RELOC,
 };
 
 #ifdef CONFIG_DEBUG_UART_BCM6345

@@ -277,7 +277,7 @@ static inline void _debug_uart_init(void)
 static inline void wait_xfered(void __iomem *base)
 {
 	do {
-		u32 val = readl_be(base + UART_IR_REG);
+		u32 val = __raw_readl(base + UART_IR_REG);
 		if (val & UART_IR_STAT(UART_IR_TXEMPTY))
 			break;
 	} while (1);

@@ -288,7 +288,7 @@ static inline void _debug_uart_putc(int ch)
 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
 
 	wait_xfered(base);
-	writel_be(ch, base + UART_FIFO_REG);
+	__raw_writel(ch, base + UART_FIFO_REG);
 	wait_xfered(base);
 }
Signature · 1 line
2.11.0
#2 lore raw

PATCH 1/3 serial: bcm6345: switch to raw I/O functions

Am 30.11.18 um 18:55 schrieb Álvaro Fernández Rojas:

Quoted 30 lines
Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
 drivers/serial/serial_bcm6345.c | 100 ++++++++++++++++++++--------------------
 1 file changed, 50 insertions(+), 50 deletions(-)
drivers/serial/serial_bcm6345.c +4 -4
index a0e709a11e..2866b88c26 100644
@@ -89,26 +89,26 @@ struct bcm6345_serial_priv {
 /* enable rx & tx operation on uart */
 static void bcm6345_serial_enable(void __iomem *base)
 {
-	setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
-		     UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+	setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+		   UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
 }
 
 /* disable rx & tx operation on uart */
 static void bcm6345_serial_disable(void __iomem *base)
 {
-	clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
-		     UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+	clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+		   UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
 }
 
 /* clear all unread data in rx fifo and unsent data in tx fifo */
 static void bcm6345_serial_flush(void __iomem *base)

drivers/serial/serial_bcm6345.c struct bcm6345_serial_priv { · line 111

Quoted 10 lines
drivers/serial/serial_bcm6345.c +3 -3
 {
 	/* empty rx and tx fifo */
-	setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
-		     UART_CTL_RSTTXFIFO_MASK);
+	setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
+		   UART_CTL_RSTTXFIFO_MASK);
 
 	/* read any pending char to make sure all irq status are cleared */
-	readl_be(base + UART_FIFO_REG);
+	__raw_readl(base + UART_FIFO_REG);

if you always use native endianess on ARM and MIPS, you could use readl(). On MIPS this will never swap except you enable CONFIG_SWAP_IO_SPACE.

Quoted 131 lines
drivers/serial/serial_bcm6345.c +40 -41
 }
 
 static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)

@@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 	bcm6345_serial_flush(base);
 
 	/* set uart control config */
-	clrsetbits_be32(base + UART_CTL_REG,
-			/* clear rx timeout */
-			UART_CTL_RXTIMEOUT_MASK |
-			/* clear stop bits */
-			UART_CTL_STOPBITS_MASK |
-			/* clear bits per symbol */
-			UART_CTL_BITSPERSYM_MASK |
-			/* clear xmit break */
-			UART_CTL_XMITBRK_MASK |
-			/* clear reserved bit */
-			UART_CTL_RSVD_MASK |
-			/* disable parity */
-			UART_CTL_RXPAREN_MASK |
-			UART_CTL_TXPAREN_MASK |
-			/* disable loopback */
-			UART_CTL_LOOPBACK_MASK,
-			/* set timeout to 5 */
-			UART_CTL_RXTIMEOUT_5 |
-			/* set 8 bits/symbol */
-			UART_CTL_BITSPERSYM_8 |
-			/* set 1 stop bit */
-			UART_CTL_STOPBITS_1 |
-			/* set parity to even */
-			UART_CTL_RXPAREVEN_MASK |
-			UART_CTL_TXPAREVEN_MASK);
+	clrsetbits_32(base + UART_CTL_REG,
+		      /* clear rx timeout */
+		      UART_CTL_RXTIMEOUT_MASK |
+		      /* clear stop bits */
+		      UART_CTL_STOPBITS_MASK |
+		      /* clear bits per symbol */
+		      UART_CTL_BITSPERSYM_MASK |
+		      /* clear xmit break */
+		      UART_CTL_XMITBRK_MASK |
+		      /* clear reserved bit */
+		      UART_CTL_RSVD_MASK |
+		      /* disable parity */
+		      UART_CTL_RXPAREN_MASK |
+		      UART_CTL_TXPAREN_MASK |
+		      /* disable loopback */
+		      UART_CTL_LOOPBACK_MASK,
+		      /* set timeout to 5 */
+		      UART_CTL_RXTIMEOUT_5 |
+		      /* set 8 bits/symbol */
+		      UART_CTL_BITSPERSYM_8 |
+		      /* set 1 stop bit */
+		      UART_CTL_STOPBITS_1 |
+		      /* set parity to even */
+		      UART_CTL_RXPAREVEN_MASK |
+		      UART_CTL_TXPAREVEN_MASK);
 
 	/* set uart fifo config */
-	clrsetbits_be32(base + UART_FIFO_CFG_REG,
-			/* clear fifo config */
-			UART_FIFO_CFG_RX_MASK |
-			UART_FIFO_CFG_TX_MASK,
-			/* set fifo config to 4 */
-			UART_FIFO_CFG_RX_4 |
-			UART_FIFO_CFG_TX_4);
+	clrsetbits_32(base + UART_FIFO_CFG_REG,
+		      /* clear fifo config */
+		      UART_FIFO_CFG_RX_MASK |
+		      UART_FIFO_CFG_TX_MASK,
+		      /* set fifo config to 4 */
+		      UART_FIFO_CFG_RX_4 |
+		      UART_FIFO_CFG_TX_4);
 
 	/* set baud rate */
 	val = ((clk / baudrate) >> 4);

@@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 		val = (val >> 1);
 	else
 		val = (val >> 1) - 1;
-	writel_be(val, base + UART_BAUD_REG);
+	__raw_writel(val, base + UART_BAUD_REG);
 
 	/* clear interrupts */
-	writel_be(0, base + UART_IR_REG);
+	__raw_writel(0, base + UART_IR_REG);
 
 	/* enable uart */
 	bcm6345_serial_enable(base);

@@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 static int bcm6345_serial_pending(struct udevice *dev, bool input)
 {
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
-	u32 val = readl_be(priv->base + UART_IR_REG);
+	u32 val = __raw_readl(priv->base + UART_IR_REG);
 
 	if (input)
 		return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY));

@@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch)
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
 	u32 val;
 
-	val = readl_be(priv->base + UART_IR_REG);
+	val = __raw_readl(priv->base + UART_IR_REG);
 	if (!(val & UART_IR_STAT(UART_IR_TXEMPTY)))
 		return -EAGAIN;
 
-	writel_be(ch, priv->base + UART_FIFO_REG);
+	__raw_writel(ch, priv->base + UART_FIFO_REG);
 
 	return 0;
 }

@@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev)
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
 	u32 val;
 
-	val = readl_be(priv->base + UART_IR_REG);
+	val = __raw_readl(priv->base + UART_IR_REG);
 	if (val & UART_IR_STAT(UART_IR_RXOVER))
-		setbits_be32(priv->base + UART_CTL_REG,
-			     UART_CTL_RSTRXFIFO_MASK);
+		setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK);
 	if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
 		return -EAGAIN;
 
-	val = readl_be(priv->base + UART_FIFO_REG);
+	val = __raw_readl(priv->base + UART_FIFO_REG);
 	if (val & UART_FIFO_ANYERR_MASK)
 		return -EAGAIN;

drivers/serial/serial_bcm6345.c U_BOOT_DRIVER(bcm6345_serial) = { · line 266

Quoted 4 lines
drivers/serial/serial_bcm6345.c +1 -0
@@ -264,6 +263,7 @@ U_BOOT_DRIVER(bcm6345_serial) = {
 	.probe = bcm6345_serial_probe,
 	.priv_auto_alloc_size = sizeof(struct bcm6345_serial_priv),
 	.ops = &bcm6345_serial_ops,
+	.flags = DM_FLAG_PRE_RELOC,

this was recently removed from all drivers, so it shouldn't be added again

Quoted 22 lines
drivers/serial/serial_bcm6345.c +2 -2
 };
 
 #ifdef CONFIG_DEBUG_UART_BCM6345

@@ -277,7 +277,7 @@ static inline void _debug_uart_init(void)
 static inline void wait_xfered(void __iomem *base)
 {
 	do {
-		u32 val = readl_be(base + UART_IR_REG);
+		u32 val = __raw_readl(base + UART_IR_REG);
 		if (val & UART_IR_STAT(UART_IR_TXEMPTY))
 			break;
 	} while (1);

@@ -288,7 +288,7 @@ static inline void _debug_uart_putc(int ch)
 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
 
 	wait_xfered(base);
-	writel_be(ch, base + UART_FIFO_REG);
+	__raw_writel(ch, base + UART_FIFO_REG);
 	wait_xfered(base);
 }
Signature · 9 lines
- Daniel

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author
#3 lore raw

PATCH 2/3 arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

In reply to Álvaro Fernández Rojas
Signed-off-by Ã�lvaro Fernández Rojas <[email protected]>
---
 arch/arm/include/asm/io.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/include/asm/io.h +13 -0
index 5df74728de..12bc7fbe06 100644
@@ -160,7 +160,12 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
 #define in_be32(a)	in_arch(l,be32,a)
 #define in_be16(a)	in_arch(w,be16,a)
 
+#define out_32(a,v)	__raw_writel(v,a)
+#define out_16(a,v)	__raw_writew(v,a)
 #define out_8(a,v)	__raw_writeb(v,a)
+
+#define in_32(a)	__raw_readl(a)
+#define in_16(a)	__raw_readw(a)
 #define in_8(a)		__raw_readb(a)
 
 #define clrbits(type, addr, clear) \

@@ -180,6 +185,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
 #define setbits_le32(addr, set) setbits(le32, addr, set)
 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
 
+#define clrbits_32(addr, clear) clrbits(32, addr, clear)
+#define setbits_32(addr, set) setbits(32, addr, set)
+#define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
+
 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
 #define setbits_be16(addr, set) setbits(be16, addr, set)
 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)

@@ -188,6 +197,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
 #define setbits_le16(addr, set) setbits(le16, addr, set)
 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
 
+#define clrbits_16(addr, clear) clrbits(16, addr, clear)
+#define setbits_16(addr, set) setbits(16, addr, set)
+#define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
+
 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
Signature · 1 line
2.11.0
author
#4 lore raw

PATCH 3/3 serial: bcm6858: remove driver and switch to bcm6345

In reply to Álvaro Fernández Rojas
Signed-off-by Álvaro Fernández Rojas <[email protected]>
---
 arch/arm/dts/bcm6858.dtsi       |   2 +-
 configs/bcm968580_ram_defconfig |   2 +-
 drivers/serial/Kconfig          |   8 +-
 drivers/serial/Makefile         |   1 -
 drivers/serial/serial_bcm6858.c | 300 ----------------------------------------
 5 files changed, 3 insertions(+), 310 deletions(-)
 delete mode 100644 drivers/serial/serial_bcm6858.c
arch/arm/dts/bcm6858.dtsi +1 -1
index 9869d729d3..d78d34d213 100644
@@ -75,7 +75,7 @@
 		u-boot,dm-pre-reloc;
 
 		uart0: serial at ff800640 {
-			compatible = "brcm,bcm6858-uart";
+			compatible = "brcm,bcm6345-uart";
 			reg = <0x0 0xff800640 0x0 0x18>;
 			clocks = <&periph_osc>;
configs/bcm968580_ram_defconfig +1 -1
index abe90ee75f..4e10175a50 100644
@@ -30,7 +30,7 @@ CONFIG_SPECIFY_CONSOLE_INDEX=y
 CONFIG_CONS_INDEX=0
 CONFIG_DM_SERIAL=y
 CONFIG_SERIAL_SEARCH_ALL=y
-CONFIG_BCM6858_SERIAL=y
+CONFIG_BCM6345_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_REGEX=y
 # CONFIG_GENERATE_SMBIOS_TABLE is not set
drivers/serial/Kconfig +1 -7
index 3bcc61e731..6252dd8c4b 100644
@@ -506,16 +506,10 @@ config BCM283X_PL011_SERIAL
 
 config BCM6345_SERIAL
 	bool "Support for BCM6345 UART"
-	depends on DM_SERIAL && ARCH_BMIPS
+	depends on DM_SERIAL
 	help
 	  Select this to enable UART on BCM6345 SoCs.
 
-config BCM6858_SERIAL
-	bool "Support for BCM6858 UART"
-	depends on DM_SERIAL && ARCH_BCM6858
-	help
-	  Select this to enable UART on BCM6358 SoCs.
-
 config FSL_LINFLEXUART
 	bool "Freescale Linflex UART support"
 	depends on DM_SERIAL
drivers/serial/Makefile +0 -1
index b6377b1076..2f8d065a4c 100644
@@ -35,7 +35,6 @@ obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
 obj-$(CONFIG_ARM_DCC) += arm_dcc.o
 obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
 obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
-obj-$(CONFIG_BCM6858_SERIAL) += serial_bcm6858.o
 obj-$(CONFIG_EFI_APP) += serial_efi.o
 obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 obj-$(CONFIG_MCFUART) += mcfuart.o
drivers/serial/serial_bcm6858.c deleted +0 -300

300 lines not on this page · raw message

Signature · 1 line
2.11.0
author
#5 lore raw

v2 cover serial: bcm6345: switch to raw I/O functions

In reply to Álvaro Fernández Rojas

These patches allow to use bcm6345 uart driver for both BE and LE, making bcm6858 serial driver unneeded.

Álvaro Fernández Rojas (3):
serial: bcm6345: switch to raw I/O functions
arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}
serial: bcm6858: remove driver and switch to bcm6345

 arch/arm/dts/bcm6858.dtsi       |   2 +-
 arch/arm/include/asm/io.h       |  13 ++
 configs/bcm968580_ram_defconfig |   2 +-
 drivers/serial/Kconfig          |   8 +-
 drivers/serial/Makefile         |   1 -
 drivers/serial/serial_bcm6345.c |  99 +++++++------
 drivers/serial/serial_bcm6858.c | 300 ----------------------------------------
 7 files changed, 65 insertions(+), 360 deletions(-)
 delete mode 100644 drivers/serial/serial_bcm6858.c
Signature · 1 line
2.11.0
author
#6 lore raw

PATCH v2 1/3 serial: bcm6345: switch to raw I/O functions

Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v2: introduce changes suggested by Daniel Schwierzeck:
- Use readl/writel instead of __raw_readl/__raw_writel.
- Remove DM_FLAG_PRE_RELOC.

 drivers/serial/serial_bcm6345.c | 99 ++++++++++++++++++++---------------------
 1 file changed, 49 insertions(+), 50 deletions(-)
drivers/serial/serial_bcm6345.c +49 -50
index a0e709a11e..9ad8c770d5 100644
@@ -89,26 +89,26 @@ struct bcm6345_serial_priv {
 /* enable rx & tx operation on uart */
 static void bcm6345_serial_enable(void __iomem *base)
 {
-	setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
-		     UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+	setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+		   UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
 }
 
 /* disable rx & tx operation on uart */
 static void bcm6345_serial_disable(void __iomem *base)
 {
-	clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
-		     UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
+	clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK |
+		   UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK);
 }
 
 /* clear all unread data in rx fifo and unsent data in tx fifo */
 static void bcm6345_serial_flush(void __iomem *base)
 {
 	/* empty rx and tx fifo */
-	setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
-		     UART_CTL_RSTTXFIFO_MASK);
+	setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK |
+		   UART_CTL_RSTTXFIFO_MASK);
 
 	/* read any pending char to make sure all irq status are cleared */
-	readl_be(base + UART_FIFO_REG);
+	readl(base + UART_FIFO_REG);
 }
 
 static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)

@@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 	bcm6345_serial_flush(base);
 
 	/* set uart control config */
-	clrsetbits_be32(base + UART_CTL_REG,
-			/* clear rx timeout */
-			UART_CTL_RXTIMEOUT_MASK |
-			/* clear stop bits */
-			UART_CTL_STOPBITS_MASK |
-			/* clear bits per symbol */
-			UART_CTL_BITSPERSYM_MASK |
-			/* clear xmit break */
-			UART_CTL_XMITBRK_MASK |
-			/* clear reserved bit */
-			UART_CTL_RSVD_MASK |
-			/* disable parity */
-			UART_CTL_RXPAREN_MASK |
-			UART_CTL_TXPAREN_MASK |
-			/* disable loopback */
-			UART_CTL_LOOPBACK_MASK,
-			/* set timeout to 5 */
-			UART_CTL_RXTIMEOUT_5 |
-			/* set 8 bits/symbol */
-			UART_CTL_BITSPERSYM_8 |
-			/* set 1 stop bit */
-			UART_CTL_STOPBITS_1 |
-			/* set parity to even */
-			UART_CTL_RXPAREVEN_MASK |
-			UART_CTL_TXPAREVEN_MASK);
+	clrsetbits_32(base + UART_CTL_REG,
+		      /* clear rx timeout */
+		      UART_CTL_RXTIMEOUT_MASK |
+		      /* clear stop bits */
+		      UART_CTL_STOPBITS_MASK |
+		      /* clear bits per symbol */
+		      UART_CTL_BITSPERSYM_MASK |
+		      /* clear xmit break */
+		      UART_CTL_XMITBRK_MASK |
+		      /* clear reserved bit */
+		      UART_CTL_RSVD_MASK |
+		      /* disable parity */
+		      UART_CTL_RXPAREN_MASK |
+		      UART_CTL_TXPAREN_MASK |
+		      /* disable loopback */
+		      UART_CTL_LOOPBACK_MASK,
+		      /* set timeout to 5 */
+		      UART_CTL_RXTIMEOUT_5 |
+		      /* set 8 bits/symbol */
+		      UART_CTL_BITSPERSYM_8 |
+		      /* set 1 stop bit */
+		      UART_CTL_STOPBITS_1 |
+		      /* set parity to even */
+		      UART_CTL_RXPAREVEN_MASK |
+		      UART_CTL_TXPAREVEN_MASK);
 
 	/* set uart fifo config */
-	clrsetbits_be32(base + UART_FIFO_CFG_REG,
-			/* clear fifo config */
-			UART_FIFO_CFG_RX_MASK |
-			UART_FIFO_CFG_TX_MASK,
-			/* set fifo config to 4 */
-			UART_FIFO_CFG_RX_4 |
-			UART_FIFO_CFG_TX_4);
+	clrsetbits_32(base + UART_FIFO_CFG_REG,
+		      /* clear fifo config */
+		      UART_FIFO_CFG_RX_MASK |
+		      UART_FIFO_CFG_TX_MASK,
+		      /* set fifo config to 4 */
+		      UART_FIFO_CFG_RX_4 |
+		      UART_FIFO_CFG_TX_4);
 
 	/* set baud rate */
 	val = ((clk / baudrate) >> 4);

@@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 		val = (val >> 1);
 	else
 		val = (val >> 1) - 1;
-	writel_be(val, base + UART_BAUD_REG);
+	writel(val, base + UART_BAUD_REG);
 
 	/* clear interrupts */
-	writel_be(0, base + UART_IR_REG);
+	writel(0, base + UART_IR_REG);
 
 	/* enable uart */
 	bcm6345_serial_enable(base);

@@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 static int bcm6345_serial_pending(struct udevice *dev, bool input)
 {
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
-	u32 val = readl_be(priv->base + UART_IR_REG);
+	u32 val = readl(priv->base + UART_IR_REG);
 
 	if (input)
 		return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY));

@@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch)
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
 	u32 val;
 
-	val = readl_be(priv->base + UART_IR_REG);
+	val = readl(priv->base + UART_IR_REG);
 	if (!(val & UART_IR_STAT(UART_IR_TXEMPTY)))
 		return -EAGAIN;
 
-	writel_be(ch, priv->base + UART_FIFO_REG);
+	writel(ch, priv->base + UART_FIFO_REG);
 
 	return 0;
 }

@@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev)
 	struct bcm6345_serial_priv *priv = dev_get_priv(dev);
 	u32 val;
 
-	val = readl_be(priv->base + UART_IR_REG);
+	val = readl(priv->base + UART_IR_REG);
 	if (val & UART_IR_STAT(UART_IR_RXOVER))
-		setbits_be32(priv->base + UART_CTL_REG,
-			     UART_CTL_RSTRXFIFO_MASK);
+		setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK);
 	if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)))
 		return -EAGAIN;
 
-	val = readl_be(priv->base + UART_FIFO_REG);
+	val = readl(priv->base + UART_FIFO_REG);
 	if (val & UART_FIFO_ANYERR_MASK)
 		return -EAGAIN;
 

@@ -277,7 +276,7 @@ static inline void _debug_uart_init(void)
 static inline void wait_xfered(void __iomem *base)
 {
 	do {
-		u32 val = readl_be(base + UART_IR_REG);
+		u32 val = readl(base + UART_IR_REG);
 		if (val & UART_IR_STAT(UART_IR_TXEMPTY))
 			break;
 	} while (1);

@@ -288,7 +287,7 @@ static inline void _debug_uart_putc(int ch)
 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;
 
 	wait_xfered(base);
-	writel_be(ch, base + UART_FIFO_REG);
+	writel(ch, base + UART_FIFO_REG);
 	wait_xfered(base);
 }
Signature · 1 line
2.11.0
#7 lore raw

PATCH v2 1/3 serial: bcm6345: switch to raw I/O functions

Quoted 1 line · Álvaro Fernández Rojas
Signed-off-by Álvaro Fernández Rojas <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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author
#8 lore raw

PATCH v2 2/3 arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

In reply to Álvaro Fernández Rojas
Signed-off-by Ã�lvaro Fernández Rojas <[email protected]>

---
v2: no changes

 arch/arm/include/asm/io.h | 13 +++++++++++++
 1 file changed, 13 insertions(+)
arch/arm/include/asm/io.h +13 -0
index 5df74728de..12bc7fbe06 100644
@@ -160,7 +160,12 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
 #define in_be32(a)	in_arch(l,be32,a)
 #define in_be16(a)	in_arch(w,be16,a)
 
+#define out_32(a,v)	__raw_writel(v,a)
+#define out_16(a,v)	__raw_writew(v,a)
 #define out_8(a,v)	__raw_writeb(v,a)
+
+#define in_32(a)	__raw_readl(a)
+#define in_16(a)	__raw_readw(a)
 #define in_8(a)		__raw_readb(a)
 
 #define clrbits(type, addr, clear) \

@@ -180,6 +185,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
 #define setbits_le32(addr, set) setbits(le32, addr, set)
 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
 
+#define clrbits_32(addr, clear) clrbits(32, addr, clear)
+#define setbits_32(addr, set) setbits(32, addr, set)
+#define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
+
 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
 #define setbits_be16(addr, set) setbits(be16, addr, set)
 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)

@@ -188,6 +197,10 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
 #define setbits_le16(addr, set) setbits(le16, addr, set)
 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
 
+#define clrbits_16(addr, clear) clrbits(16, addr, clear)
+#define setbits_16(addr, set) setbits(16, addr, set)
+#define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
+
 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
Signature · 1 line
2.11.0
#9 lore raw

PATCH v2 2/3 arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}

Quoted 1 line · Álvaro Fernández Rojas
Signed-off-by Álvaro Fernández Rojas <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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author
#10 lore raw

PATCH v2 3/3 serial: bcm6858: remove driver and switch to bcm6345

In reply to Álvaro Fernández Rojas
Signed-off-by Álvaro Fernández Rojas <[email protected]>

---
v2: no changes

 arch/arm/dts/bcm6858.dtsi       |   2 +-
 configs/bcm968580_ram_defconfig |   2 +-
 drivers/serial/Kconfig          |   8 +-
 drivers/serial/Makefile         |   1 -
 drivers/serial/serial_bcm6858.c | 300 ----------------------------------------
 5 files changed, 3 insertions(+), 310 deletions(-)
 delete mode 100644 drivers/serial/serial_bcm6858.c
arch/arm/dts/bcm6858.dtsi +1 -1
index 9869d729d3..d78d34d213 100644
@@ -75,7 +75,7 @@
 		u-boot,dm-pre-reloc;
 
 		uart0: serial at ff800640 {
-			compatible = "brcm,bcm6858-uart";
+			compatible = "brcm,bcm6345-uart";
 			reg = <0x0 0xff800640 0x0 0x18>;
 			clocks = <&periph_osc>;
configs/bcm968580_ram_defconfig +1 -1
index abe90ee75f..4e10175a50 100644
@@ -30,7 +30,7 @@ CONFIG_SPECIFY_CONSOLE_INDEX=y
 CONFIG_CONS_INDEX=0
 CONFIG_DM_SERIAL=y
 CONFIG_SERIAL_SEARCH_ALL=y
-CONFIG_BCM6858_SERIAL=y
+CONFIG_BCM6345_SERIAL=y
 CONFIG_SYSRESET=y
 CONFIG_REGEX=y
 # CONFIG_GENERATE_SMBIOS_TABLE is not set
drivers/serial/Kconfig +1 -7
index 3bcc61e731..6252dd8c4b 100644
@@ -506,16 +506,10 @@ config BCM283X_PL011_SERIAL
 
 config BCM6345_SERIAL
 	bool "Support for BCM6345 UART"
-	depends on DM_SERIAL && ARCH_BMIPS
+	depends on DM_SERIAL
 	help
 	  Select this to enable UART on BCM6345 SoCs.
 
-config BCM6858_SERIAL
-	bool "Support for BCM6858 UART"
-	depends on DM_SERIAL && ARCH_BCM6858
-	help
-	  Select this to enable UART on BCM6358 SoCs.
-
 config FSL_LINFLEXUART
 	bool "Freescale Linflex UART support"
 	depends on DM_SERIAL
drivers/serial/Makefile +0 -1
index b6377b1076..2f8d065a4c 100644
@@ -35,7 +35,6 @@ obj-$(CONFIG_AR933X_UART) += serial_ar933x.o
 obj-$(CONFIG_ARM_DCC) += arm_dcc.o
 obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
 obj-$(CONFIG_BCM6345_SERIAL) += serial_bcm6345.o
-obj-$(CONFIG_BCM6858_SERIAL) += serial_bcm6858.o
 obj-$(CONFIG_EFI_APP) += serial_efi.o
 obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 obj-$(CONFIG_MCFUART) += mcfuart.o
drivers/serial/serial_bcm6858.c deleted +0 -300

300 lines not on this page · raw message

Signature · 1 line
2.11.0
#11 lore raw

PATCH v2 3/3 serial: bcm6858: remove driver and switch to bcm6345

Quoted 1 line · Álvaro Fernández Rojas
Signed-off-by Álvaro Fernández Rojas <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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