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arm: baltos: move the board to CONFIG_BLK

PATCH New yegorslists at googlemail.com 3 participants 12 messages Nov 22, 2018 – Dec 3, 2018 Arm (32-bit)

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PATCH v2 1/4 arm: baltos: move the board to CONFIG_BLK

From: Yegor Yefremov <[email protected]>

Use DM for both MMC and USB subsystems and use dedicated DTS for U-Boot configuration.

Disable SPL support for GPIO and remove EVMSK leftover for DDR power control via GPIO.

Signed-off-by Yegor Yefremov <[email protected]>

---
Changes v1 -> v2:
- remove GPIO7 pinmux too

 arch/arm/dts/am335x-baltos.dts  | 439 ++++++++++++++++++++++++++++++++
 board/vscom/baltos/board.c      |   6 +-
 board/vscom/baltos/mux.c        |   7 -
 configs/am335x_baltos_defconfig |  10 +-
 4 files changed, 447 insertions(+), 15 deletions(-)
 create mode 100644 arch/arm/dts/am335x-baltos.dts
arch/arm/dts/am335x-baltos.dts new file +439 -0
new file mode 100644
index 0000000000..f939cf6406
@@ -0,0 +1,439 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * VScom OnRISC
+ * http://www.vscom.de
+ */
+
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+	model = "OnRISC Baltos";
+	compatible = "vscom,onrisc", "ti,am33xx";
+
+	chosen {
+		stdout-path = &uart0;
+	};
+
+	cpus {
+		cpu at 0 {
+			cpu0-supply = <&vdd1_reg>;
+		};
+	};
+
+	vbat: fixedregulator at 0 {
+		compatible = "regulator-fixed";
+		regulator-name = "vbat";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-boot-on;
+	};
+};
+
+&am33xx_pinmux {
+	mmc1_pins: pinmux_mmc1_pins {
+		pinctrl-single,pins = <
+			0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_dat3.mmc0_dat3 */
+			0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_dat2.mmc0_dat2 */
+			0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_dat1.mmc0_dat1 */
+			0xfc (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_dat0.mmc0_dat0 */
+			0x100 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_clk.mmc0_clk */
+			0x104 (MUX_MODE0 | INPUT_EN | PULL_UP)	/* mmc0_cmd.mmc0_cmd */
+		>;
+	};
+
+	i2c1_pins: pinmux_i2c1_pins {
+		pinctrl-single,pins = <
+			0x158 0x2a      /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */
+			0x15c 0x2a      /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */
+		>;
+	};
+
+	tps65910_pins: pinmux_tps65910_pins {
+		pinctrl-single,pins = <
+			0x078 (PIN_INPUT_PULLUP | MUX_MODE7)      /* gpmc_ben1.gpio1[28] */
+		>;
+
+	};
+	tca6416_pins: pinmux_tca6416_pins {
+		pinctrl-single,pins = <
+			AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
+		>;
+	};
+
+	uart0_pins: pinmux_uart0_pins {
+		pinctrl-single,pins = <
+			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
+			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)		/* uart0_txd.uart0_txd */
+		>;
+	};
+
+	cpsw_default: cpsw_default {
+		pinctrl-single,pins = <
+			/* Slave 1 */
+			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1)       /* mii1_crs.rmii1_crs_dv */
+			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_tx_en.rmii1_txen */
+			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd1.rmii1_txd1 */
+			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)      /* mii1_txd0.rmii1_txd0 */
+			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd1.rmii1_rxd1 */
+			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)      /* mii1_rxd0.rmii1_rxd0 */
+			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0)      /* rmii1_ref_clk.rmii1_refclk */
+
+
+			/* Slave 2 */
+			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
+			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
+			0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
+			0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
+			0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
+			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
+			0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
+			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
+			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
+			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
+			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
+			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
+		>;
+	};
+
+	cpsw_sleep: cpsw_sleep {
+		pinctrl-single,pins = <
+			/* Slave 1 reset value */
+			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+
+			/* Slave 2 reset value*/
+			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+		>;
+	};
+
+	davinci_mdio_default: davinci_mdio_default {
+		pinctrl-single,pins = <
+			/* MDIO */
+			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
+			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
+		>;
+	};
+
+	davinci_mdio_sleep: davinci_mdio_sleep {
+		pinctrl-single,pins = <
+			/* MDIO reset value */
+			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
+			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
+		>;
+	};
+
+	nandflash_pins_s0: nandflash_pins_s0 {
+		pinctrl-single,pins = <
+			0x0 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad0.gpmc_ad0 */
+			0x4 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad1.gpmc_ad1 */
+			0x8 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad2.gpmc_ad2 */
+			0xc (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad3.gpmc_ad3 */
+			0x10 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad4.gpmc_ad4 */
+			0x14 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad5.gpmc_ad5 */
+			0x18 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad6.gpmc_ad6 */
+			0x1c (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_ad7.gpmc_ad7 */
+			0x70 (PIN_INPUT_PULLUP | MUX_MODE0)	/* gpmc_wait0.gpmc_wait0 */
+			0x74 (PIN_INPUT_PULLUP | MUX_MODE7)	/* gpmc_wpn.gpio0_30 */
+			0x7c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_csn0.gpmc_csn0  */
+			0x90 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_advn_ale.gpmc_advn_ale */
+			0x94 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_oen_ren.gpmc_oen_ren */
+			0x98 (PIN_OUTPUT | MUX_MODE0)		/* gpmc_wen.gpmc_wen */
+			0x9c (PIN_OUTPUT | MUX_MODE0)		/* gpmc_be0n_cle.gpmc_be0n_cle */
+		>;
+	};
+};
+
+&elm {
+	status = "okay";
+};
+
+&gpmc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&nandflash_pins_s0>;
+	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
+	status = "okay";
+
+	nand at 0,0 {
+		reg = <0 0 0>; /* CS0, offset 0 */
+		nand-bus-width = <8>;
+		ti,nand-ecc-opt = "bch8";
+		ti,nand-xfer-type = "polled";
+
+		gpmc,device-nand = "true";
+		gpmc,device-width = <1>;
+		gpmc,sync-clk-ps = <0>;
+		gpmc,cs-on-ns = <0>;
+		gpmc,cs-rd-off-ns = <44>;
+		gpmc,cs-wr-off-ns = <44>;
+		gpmc,adv-on-ns = <6>;
+		gpmc,adv-rd-off-ns = <34>;
+		gpmc,adv-wr-off-ns = <44>;
+		gpmc,we-on-ns = <0>;
+		gpmc,we-off-ns = <40>;
+		gpmc,oe-on-ns = <0>;
+		gpmc,oe-off-ns = <54>;
+		gpmc,access-ns = <64>;
+		gpmc,rd-cycle-ns = <82>;
+		gpmc,wr-cycle-ns = <82>;
+		gpmc,wait-on-read = "true";
+		gpmc,wait-on-write = "true";
+		gpmc,bus-turnaround-ns = <0>;
+		gpmc,cycle2cycle-delay-ns = <0>;
+		gpmc,clk-activation-ns = <0>;
+		gpmc,wait-monitoring-ns = <0>;
+		gpmc,wr-access-ns = <40>;
+		gpmc,wr-data-mux-bus-ns = <0>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		elm_id = <&elm>;
+
+		boot at 0 {
+		       label = "SPL";
+		       reg = <0x0 0x20000>;
+		};
+		boot at 20000{
+		       label = "SPL.backup1";
+		       reg = <0x20000 0x20000>;
+		};
+		boot at 40000 {
+		       label = "SPL.backup2";
+		       reg = <0x40000 0x20000>;
+		};
+		boot at 60000 {
+		       label = "SPL.backup3";
+		       reg = <0x60000 0x20000>;
+		};
+		boot at 80000 {
+		       label = "u-boot";
+		       reg = <0x80000 0x1e0000>;
+		};
+		boot at 260000 {
+		       label = "UBI";
+		       reg = <0x260000 0xfda0000>;
+		};
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+
+	status = "okay";
+};
+
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_pins>;
+
+	status = "okay";
+	clock-frequency = <1000>;
+
+	tps: tps at 2d {
+		reg = <0x2d>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <28 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&tps65910_pins>;
+	};
+
+	at24 at 50 {
+		compatible = "at24,24c02";
+		pagesize = <8>;
+		reg = <0x50>;
+	};
+
+	tca6416: gpio at 20 {
+		compatible = "ti,tca6416";
+		reg = <0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <20 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&tca6416_pins>;
+	};
+};
+
+&usb {
+	status = "okay";
+};
+
+&usb_ctrl_mod {
+	status = "okay";
+};
+
+&usb0_phy {
+	status = "okay";
+};
+
+&usb1_phy {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&usb1 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&cppi41dma  {
+	status = "okay";
+};
+
+/include/ "tps65910.dtsi"
+
+&tps {
+	vcc1-supply = <&vbat>;
+	vcc2-supply = <&vbat>;
+	vcc3-supply = <&vbat>;
+	vcc4-supply = <&vbat>;
+	vcc5-supply = <&vbat>;
+	vcc6-supply = <&vbat>;
+	vcc7-supply = <&vbat>;
+	vccio-supply = <&vbat>;
+
+	ti,en-ck32k-xtal = <1>;
+
+	regulators {
+		vrtc_reg: regulator at 0 {
+			regulator-always-on;
+		};
+
+		vio_reg: regulator at 1 {
+			regulator-always-on;
+		};
+
+		vdd1_reg: regulator at 2 {
+			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+			regulator-name = "vdd_mpu";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1312500>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdd2_reg: regulator at 3 {
+			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+			regulator-name = "vdd_core";
+			regulator-min-microvolt = <912500>;
+			regulator-max-microvolt = <1150000>;
+			regulator-boot-on;
+			regulator-always-on;
+		};
+
+		vdd3_reg: regulator at 4 {
+			regulator-always-on;
+		};
+
+		vdig1_reg: regulator at 5 {
+			regulator-always-on;
+		};
+
+		vdig2_reg: regulator at 6 {
+			regulator-always-on;
+		};
+
+		vpll_reg: regulator at 7 {
+			regulator-always-on;
+		};
+
+		vdac_reg: regulator at 8 {
+			regulator-always-on;
+		};
+
+		vaux1_reg: regulator at 9 {
+			regulator-always-on;
+		};
+
+		vaux2_reg: regulator at 10 {
+			regulator-always-on;
+		};
+
+		vaux33_reg: regulator at 11 {
+			regulator-always-on;
+		};
+
+		vmmc_reg: regulator at 12 {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+	};
+};
+
+&mac {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&cpsw_default>;
+	pinctrl-1 = <&cpsw_sleep>;
+	dual_emac = <1>;
+
+	status = "okay";
+};
+
+&davinci_mdio {
+	pinctrl-names = "default", "sleep";
+	pinctrl-0 = <&davinci_mdio_default>;
+	pinctrl-1 = <&davinci_mdio_sleep>;
+
+	status = "okay";
+};
+
+&cpsw_emac0 {
+	phy_id = <&davinci_mdio>, <0>;
+	phy-mode = "rmii";
+	dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+	phy_id = <&davinci_mdio>, <7>;
+	phy-mode = "rgmii-txid";
+	dual_emac_res_vlan = <2>;
+};
+
+&phy_sel {
+	rmii-clock-ext = <1>;
+};
+
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins>;
+	vmmc-supply = <&vmmc_reg>;
+	status = "okay";
+};
+
+&gpio0 {
+	ti,no-reset-on-init;
+};
board/vscom/baltos/board.c +1 -5
index df0a2d2b7a..60651f501f 100644
@@ -35,8 +35,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* GPIO that controls power to DDR on EVM-SK */
-#define GPIO_DDR_VTT_EN		7
+/* GPIO that controls DIP switch and mPCIe slot */
 #define DIP_S1			44
 #define MPCIE_SW		100
 

@@ -248,9 +247,6 @@ const struct ctrl_ioregs ioregs_baltos = {
 
 void sdram_init(void)
 {
-	gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
-	gpio_direction_output(GPIO_DDR_VTT_EN, 1);
-
 	config_ddr(400, &ioregs_baltos,
 		   &ddr3_baltos_data,
 		   &ddr3_baltos_cmd_ctrl_data,
board/vscom/baltos/mux.c +0 -7
index 94410ae35e..9c5542ea02 100644
@@ -34,7 +34,6 @@ static struct module_pin_mux mmc0_pin_mux[] = {
 	{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT0 */
 	{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CLK */
 	{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CMD */
-	//{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)},	/* MMC0_CD */
 	{-1},
 };
 

@@ -46,11 +45,6 @@ static struct module_pin_mux i2c1_pin_mux[] = {
 	{-1},
 };
 
-static struct module_pin_mux gpio0_7_pin_mux[] = {
-	{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)},	/* GPIO0_7 */
-	{-1},
-};
-
 static struct module_pin_mux rmii1_pin_mux[] = {
 	{OFFSET(mii1_crs), MODE(1) | RXACTIVE},			/* RGMII1_TCTL */
 	{OFFSET(mii1_txen), MODE(1)},			/* RGMII1_TCTL */

@@ -114,7 +108,6 @@ void enable_i2c1_pin_mux(void)
 void enable_board_pin_mux()
 {
 	configure_module_pin_mux(i2c1_pin_mux);
-	configure_module_pin_mux(gpio0_7_pin_mux);
 	configure_module_pin_mux(rgmii2_pin_mux);
 	configure_module_pin_mux(rmii1_pin_mux);
 	configure_module_pin_mux(mmc0_pin_mux);
configs/am335x_baltos_defconfig +7 -3
index a61b13b6fc..4e68956b7c 100644
@@ -1,6 +1,5 @@
 CONFIG_ARM=y
 CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_AM33XX=y

@@ -39,17 +38,22 @@ CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:128k(SPL),128k(SPL.backup1),128k(SPL.backup2),128k(SPL.backup3),1920k(u-boot),-(UBI)"
 CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_SYS_OMAP24_I2C_SPEED=1000
+CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MMC_OMAP_HS_ADMA=y
 CONFIG_NAND=y
 CONFIG_PHY_ADDR_ENABLE=y
-CONFIG_DRIVER_TI_CPSW=y
 CONFIG_MII=y
+CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_MUSB_DSPS=y

@@ -59,7 +63,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0403
 CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
 CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USB_ETHER=y
 CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
 CONFIG_FAT_WRITE=y
-CONFIG_OF_LIBFDT=y
Signature · 1 line
2.17.0
author
#1 lore raw

PATCH v2 2/4 arm: baltos: remove unused header

From: Yegor Yefremov <[email protected]>

OnRISC Baltos series uses SoM with tps65910 PMIC, so remove "power/tps65217.h" header inclusion.

Signed-off-by Yegor Yefremov <[email protected]>
---
 board/vscom/baltos/board.c | 1 -
 1 file changed, 1 deletion(-)
board/vscom/baltos/board.c +0 -1
index 60651f501f..c5949ad267 100644
@@ -27,7 +27,6 @@
 #include <i2c.h>
 #include <miiphy.h>
 #include <cpsw.h>
-#include <power/tps65217.h>
 #include <power/tps65910.h>
 #include <environment.h>
 #include <watchdog.h>
Signature · 1 line
2.17.0
#3 lore raw

PATCH v2 2/4 arm: baltos: remove unused header

In reply to yegorslists at googlemail.com
Quoted 7 lines · yegorslists at googlemail.com

From: Yegor Yefremov <[email protected]>

OnRISC Baltos series uses SoM with tps65910 PMIC, so remove "power/tps65217.h" header inclusion.

Signed-off-by Yegor Yefremov <[email protected]>
Reviewed-by Simon Glass <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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author
#4 lore raw

PATCH v2 3/4 arm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfig

In reply to yegorslists at googlemail.com

From: Yegor Yefremov <[email protected]>

Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT feature won't be used.

Signed-off-by Yegor Yefremov <[email protected]>
---
 configs/am335x_baltos_defconfig | 2 ++
 include/configs/baltos.h        | 9 +--------
 2 files changed, 3 insertions(+), 8 deletions(-)
configs/am335x_baltos_defconfig +2 -0
index 4e68956b7c..74fd487097 100644
@@ -47,6 +47,8 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MMC_OMAP_HS_ADMA=y
 CONFIG_NAND=y
+CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
+CONFIG_SYS_NAND_U_BOOT_OFFS=0x00080000
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
include/configs/baltos.h +1 -8
index 006b049d09..7b5f652f7e 100644
@@ -34,15 +34,8 @@
 /* FIT support */
 #define CONFIG_SYS_BOOTM_LEN         SZ_64M
 
-/* UBI Support */
-
-/* I2C configuration */
-
 #ifdef CONFIG_NAND
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x00080000
-#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#endif
+
 #define NANDARGS \
 	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Signature · 1 line
2.17.0
#5 lore raw

PATCH v2 3/4 arm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfig

Quoted 12 lines · On Thu, 22 Nov 2018 at 01:19, <[email protected]> wrote:

From: Yegor Yefremov <[email protected]>

Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT feature won't be used.

Signed-off-by Yegor Yefremov <[email protected]>
---
 configs/am335x_baltos_defconfig | 2 ++
 include/configs/baltos.h        | 9 +--------
 2 files changed, 3 insertions(+), 8 deletions(-)
Reviewed-by Simon Glass <[email protected]>
#6 lore raw

PATCH v2 3/4 arm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfig

In reply to yegorslists at googlemail.com
Quoted 7 lines · yegorslists at googlemail.com

From: Yegor Yefremov <[email protected]>

Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT feature won't be used.

Signed-off-by Yegor Yefremov <[email protected]>
Reviewed-by Simon Glass <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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author
#7 lore raw

PATCH v2 4/4 arm: baltos: migrate Ethernet PHYs configuration to Kconfig

In reply to yegorslists at googlemail.com

From: Yegor Yefremov <[email protected]>

Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig and select them in Kconfig.

Signed-off-by Yegor Yefremov <[email protected]>
---
 configs/am335x_baltos_defconfig | 2 ++
 include/configs/baltos.h        | 4 ----
 2 files changed, 2 insertions(+), 4 deletions(-)
configs/am335x_baltos_defconfig +2 -0
index 74fd487097..05d41aea87 100644
@@ -50,6 +50,8 @@ CONFIG_NAND=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x00080000
 CONFIG_PHY_ADDR_ENABLE=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
include/configs/baltos.h +0 -4
index 7b5f652f7e..ccbdc0a335 100644
@@ -257,10 +257,6 @@
 #define CONFIG_AM335X_USB1
 #define CONFIG_AM335X_USB1_MODE MUSB_OTG
 
-/* Network. */
-#define CONFIG_PHY_SMSC
-#define CONFIG_PHY_ATHEROS
-
 /* NAND support */
 #ifdef CONFIG_NAND
 #define GPMC_NAND_ECC_LP_x8_LAYOUT	1
Signature · 1 line
2.17.0
#8 lore raw

PATCH v2 4/4 arm: baltos: migrate Ethernet PHYs configuration to Kconfig

Quoted 11 lines · On Thu, 22 Nov 2018 at 01:19, <[email protected]> wrote:

From: Yegor Yefremov <[email protected]>

Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig and select them in Kconfig.

Signed-off-by Yegor Yefremov <[email protected]>
---
 configs/am335x_baltos_defconfig | 2 ++
 include/configs/baltos.h        | 4 ----
 2 files changed, 2 insertions(+), 4 deletions(-)
Reviewed-by Simon Glass <[email protected]>
#9 lore raw

PATCH v2 4/4 arm: baltos: migrate Ethernet PHYs configuration to Kconfig

In reply to yegorslists at googlemail.com
Quoted 7 lines · yegorslists at googlemail.com

From: Yegor Yefremov <[email protected]>

Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig and select them in Kconfig.

Signed-off-by Yegor Yefremov <[email protected]>
Reviewed-by Simon Glass <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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#10 lore raw

PATCH v2 1/4 arm: baltos: move the board to CONFIG_BLK

In reply to yegorslists at googlemail.com
Quoted 14 lines · On Thu, 22 Nov 2018 at 01:19, <[email protected]> wrote:

From: Yegor Yefremov <[email protected]>

Use DM for both MMC and USB subsystems and use dedicated DTS for U-Boot configuration.

Disable SPL support for GPIO and remove EVMSK leftover for DDR power control via GPIO.

Signed-off-by Yegor Yefremov <[email protected]>

---
Changes v1 -> v2:
- remove GPIO7 pinmux too

Quoted 7 lines
 arch/arm/dts/am335x-baltos.dts  | 439 ++++++++++++++++++++++++++++++++
 board/vscom/baltos/board.c      |   6 +-
 board/vscom/baltos/mux.c        |   7 -
 configs/am335x_baltos_defconfig |  10 +-
 4 files changed, 447 insertions(+), 15 deletions(-)
 create mode 100644 arch/arm/dts/am335x-baltos.dts
Reviewed-by Simon Glass <[email protected]>
#11 lore raw

PATCH v2 1/4 arm: baltos: move the board to CONFIG_BLK

In reply to yegorslists at googlemail.com
Quoted 10 lines · yegorslists at googlemail.com

From: Yegor Yefremov <[email protected]>

Use DM for both MMC and USB subsystems and use dedicated DTS for U-Boot configuration.

Disable SPL support for GPIO and remove EVMSK leftover for DDR power control via GPIO.

Signed-off-by Yegor Yefremov <[email protected]>
Reviewed-by Simon Glass <[email protected]>

Applied to u-boot/master, thanks!

Signature · 8 lines
Tom
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