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ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet

PATCH In review Heiko Stuebner 2 participants 10 messages Nov 13, 2018 – Dec 6, 2018

Subsystems (3)
Device tree bindings Arm Rockchip Arm and arm64 SoC sub-architectures (common parts)
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Heiko Stuebner

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#0 lore raw

cover ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet

Add a devicetree for the BQ Edison2 tablet from MundoReader. Incidentially this is the device I wanted to run mainline Linux on when starting the Rockchip port - thinking, "this can't take thaaat long" ;-) - so I've come somewhat full-circle now.

With Lima it can also use gpu acceleration for gles2.

Notable absent peripherals are the touchscreen (ft5606), IT66121 hdmi bridge (internal panel is working nicely) and sound. All areas I'm still trying to get working.

The series includes some smallish cleanups before the board with cleaning up the cpu-core nodes being a big part.

And there are a number of driver-side additions pending that should get accepted before the board itself can go in. (bq24196, Innolux panel, tmp108-interrupt).

Heiko Stuebner (6):
ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s
ARM: dts: rockchip: convert rk3188 to opp-v2
ARM: dts: rockchip: add cpu-core resets for rk3188
ARM: dts: rockchip: add phandles to secondary cpu cores
ARM: dts: rockchip: update cpu supplies on rk3188
ARM: dts: rockchip: add BQ Edison 2 QC devicetree

 .../devicetree/bindings/arm/rockchip.txt      |   4 +
 arch/arm/boot/dts/Makefile                    |   1 +
 arch/arm/boot/dts/rk3066a.dtsi                |   3 +
 arch/arm/boot/dts/rk3188-bqedison2qc.dts      | 711 ++++++++++++++++++
 arch/arm/boot/dts/rk3188-px3-evb.dts          |  14 +-
 arch/arm/boot/dts/rk3188-radxarock.dts        |  14 +-
 arch/arm/boot/dts/rk3188.dtsi                 |  66 +-
 7 files changed, 797 insertions(+), 16 deletions(-)
 create mode 100644 arch/arm/boot/dts/rk3188-bqedison2qc.dts
Signature · 1 line
2.18.0
author maintainer
#1 lore raw

PATCH 1/6 ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s

From: Heiko Stuebner <[email protected]>

The Rockchip i2s always just requires a sound-dail-cells value of 0, so add them to the core soc dtsi for convenience.

Signed-off-by Heiko Stuebner <[email protected]>
---
 arch/arm/boot/dts/rk3066a.dtsi | 3 +++
 arch/arm/boot/dts/rk3188.dtsi  | 1 +
 2 files changed, 4 insertions(+)
arch/arm/boot/dts/rk3066a.dtsi +3 -0
index 57f75a7a529b..971cd10592e2 100644
@@ -153,6 +153,7 @@
 		clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
 		rockchip,playback-channels = <8>;
 		rockchip,capture-channels = <2>;
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
 

@@ -170,6 +171,7 @@
 		clocks = <&cru HCLK_I2S1>, <&cru SCLK_I2S1>;
 		rockchip,playback-channels = <2>;
 		rockchip,capture-channels = <2>;
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
 

@@ -187,6 +189,7 @@
 		clocks = <&cru HCLK_I2S2>, <&cru SCLK_I2S2>;
 		rockchip,playback-channels = <2>;
 		rockchip,capture-channels = <2>;
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
arch/arm/boot/dts/rk3188.dtsi +1 -0
index 7e0dc52630d9..fd896b0a46e3 100644
@@ -139,6 +139,7 @@
 		clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
 		rockchip,playback-channels = <2>;
 		rockchip,capture-channels = <2>;
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
Signature · 1 line
2.18.0
author maintainer
#2 lore raw

PATCH 2/6 ARM: dts: rockchip: convert rk3188 to opp-v2

In reply to Heiko Stuebner

From: Heiko Stuebner <[email protected]>

The fact that OPPs specified only on cpu0 work is Linux specific and normally cpu frequencies should be specified for each cpu core. To facilitate this without needing to duplicate the frequency table each time, convert to opp-v2 before adding references to all cores.

Signed-off-by Heiko Stuebner <[email protected]>
---
 arch/arm/boot/dts/rk3188.dtsi | 55 ++++++++++++++++++++++++++++-------
 1 file changed, 44 insertions(+), 11 deletions(-)
arch/arm/boot/dts/rk3188.dtsi +44 -11
index fd896b0a46e3..9d8c4c560e51 100644
@@ -23,37 +23,70 @@
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x0>;
-			operating-points = <
-				/* kHz    uV */
-				1608000 1350000
-				1416000 1250000
-				1200000 1150000
-				1008000 1075000
-				 816000  975000
-				 600000  950000
-				 504000  925000
-				 312000  875000
-			>;
 			clock-latency = <40000>;
 			clocks = <&cru ARMCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x1>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu at 2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x2>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
 		cpu at 3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
 			reg = <0x3>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+	};
+
+	cpu0_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp-312000000 {
+			opp-hz = /bits/ 64 <312000000>;
+			opp-microvolt = <875000>;
+			clock-latency-ns = <40000>;
+		};
+		opp-504000000 {
+			opp-hz = /bits/ 64 <504000000>;
+			opp-microvolt = <925000>;
+		};
+		opp-600000000 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <950000>;
+			opp-suspend;
+		};
+		opp-816000000 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <975000>;
+		};
+		opp-1008000000 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <1075000>;
+		};
+		opp-1200000000 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <1150000>;
+		};
+		opp-1416000000 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <1250000>;
+		};
+		opp-1608000000 {
+			opp-hz = /bits/ 64 <1608000000>;
+			opp-microvolt = <1350000>;
 		};
 	};
Signature · 1 line
2.18.0
author maintainer
#3 lore raw

PATCH 3/6 ARM: dts: rockchip: add cpu-core resets for rk3188

In reply to Heiko Stuebner

From: Heiko Stuebner <[email protected]>

Specify the reset handles for each cpu core.

Signed-off-by Heiko Stuebner <[email protected]>
---
 arch/arm/boot/dts/rk3188.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/rk3188.dtsi +4 -0
index 9d8c4c560e51..f1f7a36b46d4 100644
@@ -26,6 +26,7 @@
 			clock-latency = <40000>;
 			clocks = <&cru ARMCLK>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			resets = <&cru SRST_CORE0>;
 		};
 		cpu at 1 {
 			device_type = "cpu";

@@ -33,6 +34,7 @@
 			next-level-cache = <&L2>;
 			reg = <0x1>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			resets = <&cru SRST_CORE1>;
 		};
 		cpu at 2 {
 			device_type = "cpu";

@@ -40,6 +42,7 @@
 			next-level-cache = <&L2>;
 			reg = <0x2>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			resets = <&cru SRST_CORE2>;
 		};
 		cpu at 3 {
 			device_type = "cpu";

@@ -47,6 +50,7 @@
 			next-level-cache = <&L2>;
 			reg = <0x3>;
 			operating-points-v2 = <&cpu0_opp_table>;
+			resets = <&cru SRST_CORE3>;
 		};
 	};
Signature · 1 line
2.18.0
author maintainer
#4 lore raw

PATCH 4/6 ARM: dts: rockchip: add phandles to secondary cpu cores

In reply to Heiko Stuebner

From: Heiko Stuebner <[email protected]>

Add phandles to secondary cpu cores as we may need to reference these down the road as well.

Signed-off-by Heiko Stuebner <[email protected]>
---
 arch/arm/boot/dts/rk3188.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
arch/arm/boot/dts/rk3188.dtsi +3 -3
index f1f7a36b46d4..4acb501dd3f8 100644
@@ -28,7 +28,7 @@
 			operating-points-v2 = <&cpu0_opp_table>;
 			resets = <&cru SRST_CORE0>;
 		};
-		cpu at 1 {
+		cpu1: cpu at 1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;

@@ -36,7 +36,7 @@
 			operating-points-v2 = <&cpu0_opp_table>;
 			resets = <&cru SRST_CORE1>;
 		};
-		cpu at 2 {
+		cpu2: cpu at 2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;

@@ -44,7 +44,7 @@
 			operating-points-v2 = <&cpu0_opp_table>;
 			resets = <&cru SRST_CORE2>;
 		};
-		cpu at 3 {
+		cpu3: cpu at 3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			next-level-cache = <&L2>;
Signature · 1 line
2.18.0
author maintainer
#5 lore raw

PATCH 5/6 ARM: dts: rockchip: update cpu supplies on rk3188

In reply to Heiko Stuebner

From: Heiko Stuebner <[email protected]>

cpu0-supply in cpu0 is deprecated, instead each cpu-core is supposed to list its supply separately. With the added cpu core phandles, update existing rk3188 boards accordingly.

Signed-off-by Heiko Stuebner <[email protected]>
---
 arch/arm/boot/dts/rk3188-px3-evb.dts   | 14 +++++++++++++-
 arch/arm/boot/dts/rk3188-radxarock.dts | 14 +++++++++++++-
 2 files changed, 26 insertions(+), 2 deletions(-)
arch/arm/boot/dts/rk3188-px3-evb.dts +13 -1
index 375129b62102..9ae65c767c90 100644
@@ -44,7 +44,19 @@
 };
 
 &cpu0 {
-	cpu0-supply = <&vdd_cpu>;
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu2 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu3 {
+	cpu-supply = <&vdd_cpu>;
 };
 
 &emmc {
arch/arm/boot/dts/rk3188-radxarock.dts +13 -1
index 0e5e4cf3d84c..9175b58c244a 100644
@@ -153,7 +153,19 @@
 };
 
 &cpu0 {
-	cpu0-supply = <&vdd_arm>;
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+	cpu-supply = <&vdd_arm>;
 };
 
 &gpu {
Signature · 1 line
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author maintainer
#6 lore raw

PATCH 6/6 ARM: dts: rockchip: add BQ Edison 2 QC devicetree

In reply to Heiko Stuebner

From: Heiko Stuebner <[email protected]>

The Edison 2 Quad-Core was a Tablet device released in 2013 by MundoReader using a rk3188 soc. Add a devicetree for it.

Signed-off-by Heiko Stuebner <[email protected]>
---
 .../devicetree/bindings/arm/rockchip.txt      |   4 +
 arch/arm/boot/dts/Makefile                    |   1 +
 arch/arm/boot/dts/rk3188-bqedison2qc.dts      | 711 ++++++++++++++++++
 3 files changed, 716 insertions(+)
 create mode 100644 arch/arm/boot/dts/rk3188-bqedison2qc.dts
Documentation/devicetree/bindings/arm/rockchip.txt +4 -0
index 7ce7382fedd8..6445dbc25c29 100644
@@ -33,6 +33,10 @@ Rockchip platforms device tree bindings
     Required root node properties:
       - compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";
 
+- bq Edison 2 Quad-Core tablet:
+    Required root node properties:
+      - compatible = "mundoreader,bq-edison2qc", "rockchip,rk3188";
+
 - ChipSPARK Rayeager PX2 board:
     Required root node properties:
       - compatible = "chipspark,rayeager-px2", "rockchip,rk3066a";
arch/arm/boot/dts/Makefile +1 -0
index b0e966d625b9..71d6c015f246 100644
@@ -854,6 +854,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3066a-marsboard.dtb \
 	rk3066a-mk808.dtb \
 	rk3066a-rayeager.dtb \
+	rk3188-bqedison2qc.dtb \
 	rk3188-px3-evb.dtb \
 	rk3188-radxarock.dtb \
 	rk3228-evb.dtb \
arch/arm/boot/dts/rk3188-bqedison2qc.dts new file +711 -0

711 lines not on this page · raw message

Signature · 1 line
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maintainer Reviewed-by on v1 6/6
#7 lore raw

Re: [PATCH 6/6] ARM: dts: rockchip: add BQ Edison 2 QC devicetree

Quoted 5 lines · Heiko Stuebner

From: Heiko Stuebner <[email protected]>

The Edison 2 Quad-Core was a Tablet device released in 2013 by MundoReader using a rk3188 soc. Add a devicetree for it.

Quoted 8 lines
Signed-off-by Heiko Stuebner <[email protected]>
---
 .../devicetree/bindings/arm/rockchip.txt      |   4 +
 arch/arm/boot/dts/Makefile                    |   1 +
 arch/arm/boot/dts/rk3188-bqedison2qc.dts      | 711 ++++++++++++++++++
 3 files changed, 716 insertions(+)
 create mode 100644 arch/arm/boot/dts/rk3188-bqedison2qc.dts
Reviewed-by Rob Herring <[email protected]>
author maintainer
#9 lore raw

cover ARM: dts: rockchip: Add BQ Edison2 QuadCore tablet

In reply to Heiko Stuebner

Am Dienstag, 13. November 2018, 14:05:53 CET schrieb Heiko Stuebner:

Quoted 19 lines

Add a devicetree for the BQ Edison2 tablet from MundoReader. Incidentially this is the device I wanted to run mainline Linux on when starting the Rockchip port - thinking, "this can't take thaaat long" ;-) - so I've come somewhat full-circle now.

With Lima it can also use gpu acceleration for gles2.

Notable absent peripherals are the touchscreen (ft5606), IT66121 hdmi bridge (internal panel is working nicely) and sound. All areas I'm still trying to get working.

The series includes some smallish cleanups before the board with cleaning up the cpu-core nodes being a big part.

And there are a number of driver-side additions pending that should get accepted before the board itself can go in. (bq24196, Innolux panel, tmp108-interrupt).

Quoted 6 lines

Heiko Stuebner (6):
ARM: dts: rockchip: add #sound-dai-cells to Cortex-A9 i2s
ARM: dts: rockchip: convert rk3188 to opp-v2
ARM: dts: rockchip: add cpu-core resets for rk3188
ARM: dts: rockchip: add phandles to secondary cpu cores
ARM: dts: rockchip: update cpu supplies on rk3188

applied the general cleanups from patch 1-5 for 4.21 now.

Quoted 1 line

ARM: dts: rockchip: add BQ Edison 2 QC devicetree

this one gets a bit more time for possible dt-maintainer Review of the small binding addition.