kvm: x86: Report STIBP on GET_SUPPORTED_CPUID
PATCH 1/1 kvm: x86: Report STIBP on GET_SUPPORTED_CPUID
Months ago, we have added code to allow direct access to MSR_IA32_SPEC_CTRL to the guest, which makes STIBP available to guests. This was implemented by commits d28b387fb74d ("KVM/VMX: Allow direct access to MSR_IA32_SPEC_CTRL") and b2ac58f90540 ("KVM/SVM: Allow direct access to MSR_IA32_SPEC_CTRL").
However, we never updated GET_SUPPORTED_CPUID to let userspace know that STIBP can be enabled in CPUID. Fix that by updating kvm_cpuid_8000_0008_ebx_x86_features and kvm_cpuid_7_0_edx_x86_features.
--- arch/x86/kvm/cpuid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
arch/x86/kvm/cpuid.c +2 -2
@@ -381,7 +381,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,/* cpuid 0x80000008.ebx */ const u32 kvm_cpuid_8000_0008_ebx_x86_features =F (AMD_IBPB ) |F (AMD_IBRS ) |F (AMD_SSBD ) |F (VIRT_SSBD ) | -F (AMD_SSB_NO ); +F (AMD_SSB_NO ) |F (AMD_STIBP );/* cpuid 0xC0000001.edx */ const u32 kvm_cpuid_C000_0001_edx_x86_features =
@@ -411,7 +411,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,/* cpuid 7.0.edx*/ const u32 kvm_cpuid_7_0_edx_x86_features =F (AVX512_4VNNIW ) |F (AVX512_4FMAPS ) |F (SPEC_CTRL ) | -F (SPEC_CTRL_SSBD ) |F (ARCH_CAPABILITIES ); +F (SPEC_CTRL_SSBD ) |F (ARCH_CAPABILITIES ) |F (INTEL_STIBP );/* all calls to cpuid_count() should be made on the same cpu */ get_cpu ();
Signature · 1 line
2.18.0.rc1.1.g3f1ff2140
Quoted 7 lines · Eduardo Habkost
Months ago, we have added code to allow direct access to
MSR_IA32_SPEC_CTRLto the guest, which makes STIBP available to guests. This was implemented by commitsd28b387fb74d("KVM/VMX: Allow direct access toMSR_IA32_SPEC_CTRL") andb2ac58f90540("KVM/SVM: Allow direct access toMSR_IA32_SPEC_CTRL").
Quoted 5 lines
However, we never updated
GET_SUPPORTED_CPUIDto let userspace know that STIBP can be enabled in CPUID. Fix that by updatingkvm_cpuid_8000_0008_ebx_x86_featuresandkvm_cpuid_7_0_edx_x86_features.Signed-off-by Eduardo Habkost <[email protected]>
Quoted 8 lines · Eduardo Habkost
Months ago, we have added code to allow direct access to
MSR_IA32_SPEC_CTRLto the guest, which makes STIBP available to guests. This was implemented by commitsd28b387fb74d("KVM/VMX: Allow direct access toMSR_IA32_SPEC_CTRL") andb2ac58f90540("KVM/SVM: Allow direct access toMSR_IA32_SPEC_CTRL").However, we never updated
GET_SUPPORTED_CPUIDto let userspace know that STIBP can be enabled in CPUID. Fix that by updating
Ooops!
Quoted 1 line
kvm_cpuid_8000_0008_ebx_x86_featuresandkvm_cpuid_7_0_edx_x86_features.
Shouldn't there also be a patch in QEMU to use it? (aka, +stibp).
Thank you!
Quoted 30 lines
Signed-off-by Eduardo Habkost <[email protected]>--- arch/x86/kvm/cpuid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)arch/x86/kvm/cpuid.c +2
-2@@ -381,7 +381,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,/* cpuid 0x80000008.ebx */ const u32 kvm_cpuid_8000_0008_ebx_x86_features =F (AMD_IBPB ) |F (AMD_IBRS ) |F (AMD_SSBD ) |F (VIRT_SSBD ) | -F (AMD_SSB_NO ); +F (AMD_SSB_NO ) |F (AMD_STIBP );/* cpuid 0xC0000001.edx */ const u32 kvm_cpuid_C000_0001_edx_x86_features =@@ -411,7 +411,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,/* cpuid 7.0.edx*/ const u32 kvm_cpuid_7_0_edx_x86_features =F (AVX512_4VNNIW ) |F (AVX512_4FMAPS ) |F (SPEC_CTRL ) | -F (SPEC_CTRL_SSBD ) |F (ARCH_CAPABILITIES ); +F (SPEC_CTRL_SSBD ) |F (ARCH_CAPABILITIES ) |F (INTEL_STIBP );/* all calls to cpuid_count() should be made on the same cpu */ get_cpu ();Signature · 1 line
2.18.0.rc1.1.g3f1ff2140
Quoted 8 lines · Konrad Rzeszutek Wilk
Quoted 6 lines · Eduardo Habkost
Months ago, we have added code to allow direct access to
MSR_IA32_SPEC_CTRLto the guest, which makes STIBP available to guests. This was implemented by commitsd28b387fb74d("KVM/VMX: Allow direct access toMSR_IA32_SPEC_CTRL") andb2ac58f90540("KVM/SVM: Allow direct access toMSR_IA32_SPEC_CTRL").
Quoted 7 lines
Quoted 2 lines
However, we never updated
GET_SUPPORTED_CPUIDto let userspace know that STIBP can be enabled in CPUID. Fix that by updatingOoops!
Quoted 1 line
kvm_cpuid_8000_0008_ebx_x86_featuresandkvm_cpuid_7_0_edx_x86_features.Shouldn't there also be a patch in QEMU to use it? (aka, +stibp).
I don't see how that's relevant here. GET_SUPPORTED_CPUID should report all of the supported CPUID features regardless of what particular consumers choose to do with them.
Quoted 7 lines · Konrad Rzeszutek Wilk
Quoted 6 lines · Eduardo Habkost
Months ago, we have added code to allow direct access to
MSR_IA32_SPEC_CTRLto the guest, which makes STIBP available to guests. This was implemented by commitsd28b387fb74d("KVM/VMX: Allow direct access toMSR_IA32_SPEC_CTRL") andb2ac58f90540("KVM/SVM: Allow direct access toMSR_IA32_SPEC_CTRL").
Quoted 7 lines
Quoted 2 lines
However, we never updated
GET_SUPPORTED_CPUIDto let userspace know that STIBP can be enabled in CPUID. Fix that by updatingOoops!
Quoted 1 line
kvm_cpuid_8000_0008_ebx_x86_featuresandkvm_cpuid_7_0_edx_x86_features.Shouldn't there also be a patch in QEMU to use it? (aka, +stibp).
I will submit the QEMU patch soon.
A patch exists on some downstream QEMU distributions, already, but it was never merged upstream because GET_SUPPORTED_CPUID never supported STIBP in the upstream kernel. (And because in the end it was not used for mitigating Spectre)
Quoted 2 lines
Reviewed-by Konrad Rzeszutek Wilk <[email protected]>
Thanks!
Signature · 1 line
Eduardo
Quoted 30 lines · Eduardo Habkost
Months ago, we have added code to allow direct access to
MSR_IA32_SPEC_CTRLto the guest, which makes STIBP available to guests. This was implemented by commitsd28b387fb74d("KVM/VMX: Allow direct access toMSR_IA32_SPEC_CTRL") andb2ac58f90540("KVM/SVM: Allow direct access toMSR_IA32_SPEC_CTRL").However, we never updated
GET_SUPPORTED_CPUIDto let userspace know that STIBP can be enabled in CPUID. Fix that by updatingkvm_cpuid_8000_0008_ebx_x86_featuresandkvm_cpuid_7_0_edx_x86_features.Signed-off-by Eduardo Habkost <[email protected]>--- arch/x86/kvm/cpuid.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)arch/x86/kvm/cpuid.c +1
-1@@ -381,7 +381,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,/* cpuid 0x80000008.ebx */ const u32 kvm_cpuid_8000_0008_ebx_x86_features =F (AMD_IBPB ) |F (AMD_IBRS ) |F (AMD_SSBD ) |F (VIRT_SSBD ) | -F (AMD_SSB_NO ); +F (AMD_SSB_NO ) |F (AMD_STIBP );/* cpuid 0xC0000001.edx */ const u32 kvm_cpuid_C000_0001_edx_x86_features =
arch/x86/kvm/cpuid.c static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, · line 417
Quoted 8 lines
arch/x86/kvm/cpuid.c +1
-1@@ -411,7 +411,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,/* cpuid 7.0.edx*/ const u32 kvm_cpuid_7_0_edx_x86_features =F (AVX512_4VNNIW ) |F (AVX512_4FMAPS ) |F (SPEC_CTRL ) | -F (SPEC_CTRL_SSBD ) |F (ARCH_CAPABILITIES ); +F (SPEC_CTRL_SSBD ) |F (ARCH_CAPABILITIES ) |F (INTEL_STIBP );/* all calls to cpuid_count() should be made on the same cpu */ get_cpu ();
Queued, thanks.
Paolo
Quoted 12 lines · Paolo Bonzini
Quoted 10 lines · Eduardo Habkost
Months ago, we have added code to allow direct access to
MSR_IA32_SPEC_CTRLto the guest, which makes STIBP available to guests. This was implemented by commitsd28b387fb74d("KVM/VMX: Allow direct access toMSR_IA32_SPEC_CTRL") andb2ac58f90540("KVM/SVM: Allow direct access toMSR_IA32_SPEC_CTRL").However, we never updated
GET_SUPPORTED_CPUIDto let userspace know that STIBP can be enabled in CPUID. Fix that by updatingkvm_cpuid_8000_0008_ebx_x86_featuresandkvm_cpuid_7_0_edx_x86_features.
Quoted 5 lines
Quoted 2 lines
Signed-off-by Eduardo Habkost <[email protected]>...
Queued, thanks.
Paolo
On second thought, I believe this is premature. KVM does not currently support Intel's STIBP.
From volume 4 of the SDM, "Prevents indirect branch predictions on *all* logical processors on the core from being controlled by any sibling logical processor in the same core." (emphasis mine)
In particular, if two virtual HT siblings are running on different physical cores, and one of them sets IA32_SPEC_CTRL.STIBP, KVM must intercept the MSR write, track down the sibling vCPU thread, and ensure that IA32_SPEC_CTRL.STIBP is set on its logical processor. Moreover, whenever a vCPU thread migrates to a new logical processor, IA32_SPEC_CTRL.STIBP on the logical processor must be set to the logical or of the vCPU thread's own IA32_SPEC_CTRL.STIBP value and its sibling vCPU thread's IA32_SPEC_CTRL.STIBP value. Note that this implies that IA32_SPEC_CTRL cannot be a pass-through MSR.