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AM654: Add McSPI DT entry

PATCH In review Vignesh R 2 participants 6 messages Dec 9, 2018 – Dec 13, 2018

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Vignesh R

author maintainer
#0 lore raw

cover AM654: Add McSPI DT entry

Couple of patches to add support for McSPIs in AM654 SoC.

Vignesh R (2):
arm64: dts: ti: k3-am654: Add McSPI DT nodes
arm64: dts: ti: k3-am654: Enable main domain McSPI0

 arch/arm64/boot/dts/ti/k3-am65-main.dtsi      | 52 +++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi       | 30 +++++++++++
 .../arm64/boot/dts/ti/k3-am654-base-board.dts | 27 ++++++++++
 3 files changed, 109 insertions(+)
Signature · 1 line
2.19.2
author maintainer
#1 lore raw

PATCH 1/2 arm64: dts: ti: k3-am654: Add McSPI DT nodes

There are 3 instances of McSPI in MCU domain and 4 instances in Main domain. Add DT nodes for all McSPI instances present on AM654 SoC.

Signed-off-by Vignesh R <[email protected]>
---
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 52 ++++++++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi  | 30 ++++++++++++++
 2 files changed, 82 insertions(+)
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +52 -0
index 0a0a8fc5df64..6c71e67b8988 100644
@@ -138,4 +138,56 @@
 		clocks = <&k3_clks 39 0>;
 		clock-names = "fck";
 	};
+
+	main_spi0: spi@2100000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2100000 0x0 0x400>;
+		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 137 1>;
+		power-domains = <&k3_pds 137>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	main_spi1: spi@2110000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2110000 0x0 0x400>;
+		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 138 1>;
+		power-domains = <&k3_pds 138>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		assigned-clocks = <&k3_clks 137 1>;
+		assigned-clock-rates = <48000000>;
+	};
+
+	main_spi2: spi@2120000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2120000 0x0 0x400>;
+		interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 139 1>;
+		power-domains = <&k3_pds 139>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	main_spi3: spi@2130000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2130000 0x0 0x400>;
+		interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 140 1>;
+		power-domains = <&k3_pds 140>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	main_spi4: spi@2140000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2140000 0x0 0x400>;
+		interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 141 1>;
+		power-domains = <&k3_pds 141>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
 };
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +30 -0
index 1fd027748e1f..1aeae52fb239 100644
@@ -26,4 +26,34 @@
 		clocks = <&k3_clks 114 1>;
 		power-domains = <&k3_pds 114>;
 	};
+
+	mcu_spi0: spi@40300000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x40300000 0x0 0x400>;
+		interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 142 1>;
+		power-domains = <&k3_pds 142>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	mcu_spi1: spi@40310000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x40310000 0x0 0x400>;
+		interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 143 1>;
+		power-domains = <&k3_pds 143>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	mcu_spi2: spi@40320000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x40320000 0x0 0x400>;
+		interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 144 1>;
+		power-domains = <&k3_pds 144>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
 };
Signature · 1 line
2.19.2
#2 lore raw

Re: [PATCH 1/2] arm64: dts: ti: k3-am654: Add McSPI DT nodes

Quoted 14 lines · Vignesh R

There are 3 instances of McSPI in MCU domain and 4 instances in Main domain. Add DT nodes for all McSPI instances present on AM654 SoC.

Signed-off-by Vignesh R <[email protected]>
---
  arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 52 ++++++++++++++++++++++++
  arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi  | 30 ++++++++++++++
  2 files changed, 82 insertions(+)
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +0 -0
index 0a0a8fc5df64..6c71e67b8988 100644

arch/arm64/boot/dts/ti/k3-am65-main.dtsi line 143

Quoted 6 lines
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +3 -0
@@ -138,4 +138,56 @@
  		clocks = <&k3_clks 39 0>;
  		clock-names = "fck";
  	};
+
+	main_spi0: spi@2100000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";

WARNING: DT compatible string "ti,am654-mcspi" appears un-documented -- check ../../Documentation/devicetree/bindings/ #63: FILE: arch/arm64/boot/dts/ti/k3-am65-main.dtsi:143:
+ compatible = "ti,am654-mcspi","ti,omap4-mcspi";

Same for the rest of the nodes.

Did you forget documentation part?

-Tero

Quoted 80 lines
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +49 -0
+		reg = <0x0 0x2100000 0x0 0x400>;
+		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 137 1>;
+		power-domains = <&k3_pds 137>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	main_spi1: spi@2110000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2110000 0x0 0x400>;
+		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 138 1>;
+		power-domains = <&k3_pds 138>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		assigned-clocks = <&k3_clks 137 1>;
+		assigned-clock-rates = <48000000>;
+	};
+
+	main_spi2: spi@2120000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2120000 0x0 0x400>;
+		interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 139 1>;
+		power-domains = <&k3_pds 139>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	main_spi3: spi@2130000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2130000 0x0 0x400>;
+		interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 140 1>;
+		power-domains = <&k3_pds 140>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	main_spi4: spi@2140000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x2140000 0x0 0x400>;
+		interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 141 1>;
+		power-domains = <&k3_pds 141>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
  };
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +21 -0
index 1fd027748e1f..1aeae52fb239 100644
@@ -26,4 +26,34 @@
  		clocks = <&k3_clks 114 1>;
  		power-domains = <&k3_pds 114>;
  	};
+
+	mcu_spi0: spi@40300000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x40300000 0x0 0x400>;
+		interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 142 1>;
+		power-domains = <&k3_pds 142>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+
+	mcu_spi1: spi@40310000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x40310000 0x0 0x400>;
+		interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 143 1>;
+		power-domains = <&k3_pds 143>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi line 59

Quoted 10 lines
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +9 -0
+	mcu_spi2: spi@40320000 {
+		compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+		reg = <0x0 0x40320000 0x0 0x400>;
+		interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&k3_clks 144 1>;
+		power-domains = <&k3_pds 144>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
  };

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

author maintainer
#3 lore raw

Re: [PATCH 1/2] arm64: dts: ti: k3-am654: Add McSPI DT nodes

Quoted 29 lines · Tero Kristo
Quoted 16 lines · Vignesh R

There are 3 instances of McSPI in MCU domain and 4 instances in Main domain.
Add DT nodes for all McSPI instances present on AM654 SoC.

Signed-off-by Vignesh R <[email protected]>

---
  arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 52 ++++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi  | 30 ++++++++++++++

  2 files changed, 82 insertions(+)
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +0 -0
index 0a0a8fc5df64..6c71e67b8988 100644

arch/arm64/boot/dts/ti/k3-am65-main.dtsi line 143

Quoted 6 lines
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +3 -0
@@ -138,4 +138,56 @@
           clocks = <&k3_clks 39 0>;
           clock-names = "fck";
       };
+
+    main_spi0: spi@2100000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";

WARNING: DT compatible string "ti,am654-mcspi" appears un-documented -- check ../../Documentation/devicetree/bindings/
#63: FILE: arch/arm64/boot/dts/ti/k3-am65-main.dtsi:143:
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";

Quoted 4 lines

Same for the rest of the nodes.

Did you forget documentation part?

Documentation patch as been accepted into SPI tree and part of linux-next:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=abc61f47a70f7c8331f00eff1ccb6557a9d4c224

Regards
Vignesh

Quoted 97 lines

-Tero

Quoted 91 lines
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +49 -0
+        reg = <0x0 0x2100000 0x0 0x400>;
+        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 137 1>;
+        power-domains = <&k3_pds 137>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    main_spi1: spi@2110000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x2110000 0x0 0x400>;
+        interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 138 1>;
+        power-domains = <&k3_pds 138>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        assigned-clocks = <&k3_clks 137 1>;
+        assigned-clock-rates = <48000000>;
+    };
+
+    main_spi2: spi@2120000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x2120000 0x0 0x400>;
+        interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 139 1>;
+        power-domains = <&k3_pds 139>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    main_spi3: spi@2130000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x2130000 0x0 0x400>;
+        interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 140 1>;
+        power-domains = <&k3_pds 140>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    main_spi4: spi@2140000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x2140000 0x0 0x400>;
+        interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 141 1>;
+        power-domains = <&k3_pds 141>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
   };
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +30 -0
index 1fd027748e1f..1aeae52fb239 100644
@@ -26,4 +26,34 @@
           clocks = <&k3_clks 114 1>;
           power-domains = <&k3_pds 114>;
       };
+
+    mcu_spi0: spi@40300000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x40300000 0x0 0x400>;
+        interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 142 1>;
+        power-domains = <&k3_pds 142>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    mcu_spi1: spi@40310000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x40310000 0x0 0x400>;
+        interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 143 1>;
+        power-domains = <&k3_pds 143>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    mcu_spi2: spi@40320000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x40320000 0x0 0x400>;
+        interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 144 1>;
+        power-domains = <&k3_pds 144>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
   };
Signature · 2 lines
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
#4 lore raw

Re: [PATCH 1/2] arm64: dts: ti: k3-am654: Add McSPI DT nodes

Quoted 32 lines · Vignesh R
Quoted 29 lines · Tero Kristo
Quoted 16 lines · Vignesh R

There are 3 instances of McSPI in MCU domain and 4 instances in Main domain.
Add DT nodes for all McSPI instances present on AM654 SoC.

Signed-off-by Vignesh R <[email protected]>
---
   arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 52 ++++++++++++++++++++++++
   arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi  | 30 ++++++++++++++
   2 files changed, 82 insertions(+)
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +0 -0
index 0a0a8fc5df64..6c71e67b8988 100644

arch/arm64/boot/dts/ti/k3-am65-main.dtsi line 143

Quoted 6 lines
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +3 -0
@@ -138,4 +138,56 @@
           clocks = <&k3_clks 39 0>;
           clock-names = "fck";
       };
+
+    main_spi0: spi@2100000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";

WARNING: DT compatible string "ti,am654-mcspi" appears un-documented -- check ../../Documentation/devicetree/bindings/
#63: FILE: arch/arm64/boot/dts/ti/k3-am65-main.dtsi:143:
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";

Quoted 7 lines
Quoted 4 lines

Same for the rest of the nodes.

Did you forget documentation part?

Documentation patch as been accepted into SPI tree and part of linux-next:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=abc61f47a70f7c8331f00eff1ccb6557a9d4c224

Ok thanks for the info.

-Tero

Quoted 99 lines

Regards
Vignesh

Quoted 95 lines

-Tero

Quoted 91 lines
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +49 -0
+        reg = <0x0 0x2100000 0x0 0x400>;
+        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 137 1>;
+        power-domains = <&k3_pds 137>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    main_spi1: spi@2110000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x2110000 0x0 0x400>;
+        interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 138 1>;
+        power-domains = <&k3_pds 138>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+        assigned-clocks = <&k3_clks 137 1>;
+        assigned-clock-rates = <48000000>;
+    };
+
+    main_spi2: spi@2120000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x2120000 0x0 0x400>;
+        interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 139 1>;
+        power-domains = <&k3_pds 139>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    main_spi3: spi@2130000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x2130000 0x0 0x400>;
+        interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 140 1>;
+        power-domains = <&k3_pds 140>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    main_spi4: spi@2140000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x2140000 0x0 0x400>;
+        interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 141 1>;
+        power-domains = <&k3_pds 141>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
   };
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +30 -0
index 1fd027748e1f..1aeae52fb239 100644
@@ -26,4 +26,34 @@
           clocks = <&k3_clks 114 1>;
           power-domains = <&k3_pds 114>;
       };
+
+    mcu_spi0: spi@40300000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x40300000 0x0 0x400>;
+        interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 142 1>;
+        power-domains = <&k3_pds 142>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    mcu_spi1: spi@40310000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x40310000 0x0 0x400>;
+        interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 143 1>;
+        power-domains = <&k3_pds 143>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
+
+    mcu_spi2: spi@40320000 {
+        compatible = "ti,am654-mcspi","ti,omap4-mcspi";
+        reg = <0x0 0x40320000 0x0 0x400>;
+        interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&k3_clks 144 1>;
+        power-domains = <&k3_pds 144>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
   };

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

author maintainer
#5 lore raw

PATCH 2/2 arm64: dts: ti: k3-am654: Enable main domain McSPI0

In reply to Vignesh R

Enable McSPI0 of main domain and add DT node for the SPI NOR flash connected to CS0.

Signed-off-by Vignesh R <[email protected]>
---
 .../arm64/boot/dts/ti/k3-am654-base-board.dts | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)
arch/arm64/boot/dts/ti/k3-am654-base-board.dts +27 -0
index 49ec2c3f5ef1..e41fc3a5987b 100644
@@ -60,6 +60,15 @@
 			AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
 		>;
 	};
+
+	main_spi0_pins_default: main-spi0-pins-default {
+		pinctrl-single,pins = <
+			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
+			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
+			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
+			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
+		>;
+	};
 };
 
 &main_pmx1 {

@@ -136,3 +145,21 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&ecap0_pins_default>;
 };
+
+&main_spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&main_spi0_pins_default>;
+	#address-cells = <1>;
+	#size-cells= <0>;
+	ti,pindir-d0-out-d1-in = <1>;
+
+	flash@0{
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+		spi-max-frequency = <48000000>;
+		#address-cells = <1>;
+		#size-cells= <1>;
+	};
+};
Signature · 1 line
2.19.2