ARM: dts: Fix wrong address for omap5 sata phy
PATCH 1/2 ARM: dts: Fix wrong address for omap5 sata phy
Looks like I missed converting the omap5 sata phy addresses to use offset from the module base instead of full physical address.
While at it, we can also more it to be a direct parent of the interconnect target module, it is not really a child of the ocp2scp control device.
Cc Peter Ujfalusi <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/boot/dts/omap5-l4.dtsi | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-)
arch/arm/boot/dts/omap5-l4.dtsi +13 -13
@@ -515,19 +515,19 @@ #address-cells = <1>; #size-cells = <1>; reg = <0x0 0x20>; - ranges = <0 0 0x4000>; - sata_phy: phy@4a096000 { - compatible = "ti,phy-pipe3-sata"; - reg = <0x6000 0x80>, /* phy_rx */ - <0x4A096400 0x64>, /* phy_tx */ - <0x4A096800 0x40>; /* pll_ctrl */ - reg-names = "phy_rx", "phy_tx", "pll_ctrl"; - syscon-phy-power = <&scm_conf 0x374>; - clocks = <&sys_clkin>, - <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>; - clock-names = "sysclk", "refclk"; - #phy-cells = <0>; - }; + }; + + sata_phy: phy@6000 { + compatible = "ti,phy-pipe3-sata"; + reg = <0x6000 0x80>, /* phy_rx */ + <0x6400 0x64>, /* phy_tx */ + <0x6800 0x40>; /* pll_ctrl */ + reg-names = "phy_rx", "phy_tx", "pll_ctrl"; + syscon-phy-power = <&scm_conf 0x374>; + clocks = <&sys_clkin>, + <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>; + clock-names = "sysclk", "refclk"; + #phy-cells = <0>; }; };
Signature · 1 line
2.19.2
PATCH 2/2 ARM: dts: Cosmetic fix for omap5 USB node names
These should be now using offset from the module base and not the full physical address.
Cc Peter Ujfalusi <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
--- arch/arm/boot/dts/omap5-l4.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
arch/arm/boot/dts/omap5-l4.dtsi +3 -3
@@ -195,7 +195,7 @@ #size-cells = <1>; utmi-mode = <2>; ranges = <0 0 0x20000>; - dwc3: dwc3@4a030000 { + dwc3: dwc3@10000 { compatible = "snps,dwc3"; reg = <0x10000 0x10000>; interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
@@ -332,14 +332,14 @@ "refclk_60m_ext_p1", "refclk_60m_ext_p2"; - usbhsohci: ohci@4a064800 { + usbhsohci: ohci@800 { compatible = "ti,ohci-omap3"; reg = <0x800 0x400>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; remote-wakeup-connected; }; - usbhsehci: ehci@4a064c00 { + usbhsehci: ehci@c00 { compatible = "ti,ehci-omap"; reg = <0xc00 0x400>; interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
Signature · 1 line
2.19.2
Quoted 2 lines · Tony Lindgren
While at it, we can also more it to be a direct parent of the interconnect target module, it is not really a child of the ocp2scp control device.
This should say "direct child of the interconnect target module", not direct parent.. Will fix and push out.
Regards,
Tony