arch: arm: socfpga: arria10: Add stmmac ptp_ref clock to socdk devicetree
PATCH 1/1 arch: arm: socfpga: arria10: Add stmmac ptp_ref clock to socdk devicetree
From: Dalon Westergreen <[email protected]>
Add the stmmac ptp_ref clock as it is configured in the arria10 socdk. The stmmac driver defaults the ptp_ref clock to the main stmmac clock if the ptp_ref clock is not set in the devicetree. This is inapprotiate for the arria10 socdk.
--- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi +2 -1
@@ -74,7 +74,8 @@ &gmac0 { phy-mode = "rgmii"; phy-addr = <0xffffffff>; /* probe for phy addr */ - + clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; + clock-names = "stmmaceth", "ptp_ref"; /* * These skews assume the user's FPGA design is adding 600ps of delay * for TX_CLK on Arria 10.
Signature · 1 line
2.19.2
Quoted 5 lines · On 12/13/18 2:59 PM, [email protected] wrote:
From: Dalon Westergreen <[email protected]>
Add the stmmac
ptp_refclock as it is configured in the arria10 socdk. The stmmac driver defaults theptp_refclock to the main stmmac clock if theptp_refclock is not set in the devicetree. This is inapprotiate
s/inapprotiate/inappropriate
Quoted 12 lines
for the arria10 socdk.
Signed-off-by Dalon Westergreen <[email protected]>--- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)arch/arm/boot/dts/socfpga_arria10_socdk.dtsi +0
-0
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi line 79
Quoted 7 lines
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi +2
-1@@ -74,7 +74,8 @@ &gmac0 { phy-mode = "rgmii"; phy-addr = <0xffffffff>; /* probe for phy addr */ - + clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; + clock-names = "stmmaceth", "ptp_ref";
These should go into the base arria10 dtsi at socfpga_arria10.dtsi? Should the other gmacs get the same updates?
Also the patch header should be "ARM: dts: arria10:"
Dinh
Quoted 17 lines · Dinh Nguyen
Quoted 5 lines · On 12/13/18 2:59 PM, [email protected] wrote:
From: Dalon Westergreen <[email protected]>
Add the stmmac
ptp_refclock as it is configured in the arria10 socdk. The stmmac driver defaults theptp_refclock to the main stmmac clock if theptp_refclock is not set in the devicetree. This is inapprotiates/inapprotiate/inappropriate
Quoted 7 lines
for the arria10 socdk.
Signed-off-by Dalon Westergreen <[email protected]>--- arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Quoted 15 lines
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi line 79
Quoted 13 lines
arch/arm/boot/dts/socfpga_arria10_socdk.dtsi +2
-1@@ -74,7 +74,8 @@ &gmac0 { phy-mode = "rgmii"; phy-addr = <0xffffffff>; /* probe for phy addr */ - + clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>; + clock-names = "stmmaceth", "ptp_ref";These should go into the base arria10 dtsi at
socfpga_arria10.dtsi? Should the other gmacs get the same updates?
Agreed, I will send a new patch set that addresses cv/av, a10, and s10.
Quoted 4 lines
Also the patch header should be "ARM: dts: arria10:"
Dinh