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ARM: dts: cyclone5: Add stmmac ptp_ref clock

PATCH New [email protected] 1 participant 3 messages Dec 13, 2018

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Device tree bindings Arm/socfpga architecture
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#0 lore raw

PATCH 1/3 ARM: dts: cyclone5: Add stmmac ptp_ref clock

From: Dalon Westergreen <[email protected]>

Add the ptp_ref clock to gmac0 / gmac1 specifying the default clk of osc1. The stmmac driver defaults the ptp_ref clock to the main stmmac clock if ptp_ref is not provided. This is inappropriate for the Cyclone5 or Arria5 devices.

Signed-off-by Dalon Westergreen <[email protected]>
---
 arch/arm/boot/dts/socfpga.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
arch/arm/boot/dts/socfpga.dtsi +4 -4
index 28ecb4bdf5aa..c1c9d6a2bb91 100644
@@ -557,8 +557,8 @@
 			interrupts = <0 115 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
-			clocks = <&emac_0_clk>;
-			clock-names = "stmmaceth";
+			clocks = <&emac_0_clk>, <&osc1>;
+			clock-names = "stmmaceth", "ptp_ref";
 			resets = <&rst EMAC0_RESET>;
 			reset-names = "stmmaceth";
 			snps,multicast-filter-bins = <256>;

@@ -575,8 +575,8 @@
 			interrupts = <0 120 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
-			clocks = <&emac_1_clk>;
-			clock-names = "stmmaceth";
+			clocks = <&emac_1_clk>, <&osc1>;
+			clock-names = "stmmaceth", "ptp_ref";
 			resets = <&rst EMAC1_RESET>;
 			reset-names = "stmmaceth";
 			snps,multicast-filter-bins = <256>;
Signature · 1 line
2.19.2
author
#1 lore raw

PATCH 2/3 ARM: dts: arria10: Add stmmac ptp_ref clock

From: Dalon Westergreen <[email protected]>

Add the default stmmac ptp_ref clock for arria10. The stmmac driver defaults the ptp_ref clock to the main stmmac clock
if the ptp_ref clock is not set in the devicetree. This is inappropriate for the arria10 device. The default ptp_ref clock is peri_emac_ptp_clk.

Signed-off-by Dalon Westergreen <[email protected]>
---
 arch/arm/boot/dts/socfpga_arria10.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm/boot/dts/socfpga_arria10.dtsi +6 -6
index 0017bac7f96c..6591def7b225 100644
@@ -426,8 +426,8 @@
 			snps,perfect-filter-entries = <128>;
 			tx-fifo-depth = <4096>;
 			rx-fifo-depth = <16384>;
-			clocks = <&l4_mp_clk>;
-			clock-names = "stmmaceth";
+			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
+			clock-names = "stmmaceth", "ptp_ref";
 			resets = <&rst EMAC0_RESET>;
 			reset-names = "stmmaceth";
 			snps,axi-config = <&socfpga_axi_setup>;

@@ -446,8 +446,8 @@
 			snps,perfect-filter-entries = <128>;
 			tx-fifo-depth = <4096>;
 			rx-fifo-depth = <16384>;
-			clocks = <&l4_mp_clk>;
-			clock-names = "stmmaceth";
+			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
+			clock-names = "stmmaceth", "ptp_ref";
 			resets = <&rst EMAC1_RESET>;
 			reset-names = "stmmaceth";
 			snps,axi-config = <&socfpga_axi_setup>;

@@ -466,8 +466,8 @@
 			snps,perfect-filter-entries = <128>;
 			tx-fifo-depth = <4096>;
 			rx-fifo-depth = <16384>;
-			clocks = <&l4_mp_clk>;
-			clock-names = "stmmaceth";
+			clocks = <&l4_mp_clk>, <&peri_emac_ptp_clk>;
+			clock-names = "stmmaceth", "ptp_ref";
 			snps,axi-config = <&socfpga_axi_setup>;
 			status = "disabled";
 		};
Signature · 1 line
2.19.2
author
#2 lore raw

PATCH 3/3 ARM64: dts: stratix10: Add stmmac ptp_ref clock

In reply to [email protected]

From: Dalon Westergreen <[email protected]>

Add the default stmmac ptp_ref clock for stratix10. The stmmac driver defaults the ptp_ref clock to the main stmmac clock if the ptp_ref clock is not set in the devicetree. This is inappropriate for the stratix10. The default ptp_ref clock is STRATIX10_PERI_EMAC_PTP_CLK in the clock manager.

Signed-off-by Dalon Westergreen <[email protected]>
---
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +6 -6
index adedd563125a..f464e7ba3402 100644
@@ -160,8 +160,8 @@
 			mac-address = [00 00 00 00 00 00];
 			resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
 			reset-names = "stmmaceth", "stmmaceth-ocp";
-			clocks = <&clkmgr STRATIX10_EMAC0_CLK>;
-			clock-names = "stmmaceth";
+			clocks = <&clkmgr STRATIX10_EMAC0_CLK>, <&clkmgr STRATIX10_PERI_EMAC_PTP_CLK>;
+			clock-names = "stmmaceth", "ptp_ref";
 			tx-fifo-depth = <16384>;
 			rx-fifo-depth = <16384>;
 			snps,multicast-filter-bins = <256>;

@@ -176,8 +176,8 @@
 			mac-address = [00 00 00 00 00 00];
 			resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
 			reset-names = "stmmaceth", "stmmaceth-ocp";
-			clocks = <&clkmgr STRATIX10_EMAC1_CLK>;
-			clock-names = "stmmaceth";
+			clocks = <&clkmgr STRATIX10_EMAC1_CLK>, <&clkmgr STRATIX10_PERI_EMAC_PTP_CLK>;
+			clock-names = "stmmaceth", "ptp_ref";
 			tx-fifo-depth = <16384>;
 			rx-fifo-depth = <16384>;
 			snps,multicast-filter-bins = <256>;

@@ -192,8 +192,8 @@
 			mac-address = [00 00 00 00 00 00];
 			resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
 			reset-names = "stmmaceth", "stmmaceth-ocp";
-			clocks = <&clkmgr STRATIX10_EMAC2_CLK>;
-			clock-names = "stmmaceth";
+			clocks = <&clkmgr STRATIX10_EMAC2_CLK>, <&clkmgr STRATIX10_PERI_EMAC_PTP_CLK>;
+			clock-names = "stmmaceth", "ptp_ref";
 			tx-fifo-depth = <16384>;
 			rx-fifo-depth = <16384>;
 			snps,multicast-filter-bins = <256>;
Signature · 1 line
2.19.2