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arm64: dts: sdm845: Add sdm845 GPU interconnect

PATCH In review Jordan Crouse 4 participants 9 messages Dec 14, 2018 – Dec 18, 2018 4 messages not in the archive

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#0 lore raw

v2 cover arm64: dts: sdm845: Add sdm845 GPU interconnect

Two quick patches to document and add an interconnect port definition for the sdm845 GPU.

This is based on the base GPU DT changes:
https://patchwork.freedesktop.org/series/39308/

As well as the DT nodes from Georgi:
https://patchwork.kernel.org/patch/10719483/

v2: Fix interconnect supplier to match latest per Doug Anderson *** BLURB HERE ***

Jordan Crouse (2):
dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU
arm64: dts: sdm845: Add interconnect for GPU

 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++
 arch/arm64/boot/dts/qcom/sdm845.dtsi                  | 3 +++
 2 files changed, 9 insertions(+)
Signature · 6 lines
2.18.0

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#2 lore raw

PATCH v2 1/2 dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt.

---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++
 1 file changed, 6 insertions(+)
Documentation/devicetree/bindings/display/msm/gpu.txt +6 -0
index 8d9415180c22..19b5ae459fdb 100644
@@ -19,6 +19,9 @@ Required properties:
   * "mem_iface"
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
+- interconnect-names: Name string for the interconnects.
 - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will
   control the power for the GPU
 
@@ -68,6 +71,9 @@ Example a6xx (with GMU):
 
 		operating-points-v2 = <&gpu_opp_table>;
 
+		interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+		interconnect-names = "gfx-mem";
+
 		qcom,gmu = <&gmu>;
 	};
 };
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Reviewed-by Douglas Anderson
#4 lore raw

Re: [PATCH v2 1/2] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

Hi,

Quoted 8 lines · Jordan Crouse

Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt.

---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++
 1 file changed, 6 insertions(+)

Looks good to me. This could go into Andy's tree as soon as Georgi's series lands somewhere.

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#5 lore raw

Re: [PATCH v2 1/2] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

Hi,

Quoted 13 lines · Doug Anderson

Hi,

Quoted 8 lines · Jordan Crouse

Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt.

---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++
 1 file changed, 6 insertions(+)
Quoted 4 lines

Looks good to me. This could go into Andy's tree as soon as Georgi's series lands somewhere.

To correct myself, this maybe should go through Georgi's tree together with <https://patchwork.kernel.org/patch/10718587/>. It's the actual dts that would go into Andy's tree.

-Doug
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#6 lore raw

Re: [PATCH v2 1/2] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

In reply to a message not in the archive
Quoted 23 lines · Jordan Crouse

Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt.

---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++
 1 file changed, 6 insertions(+)
Documentation/devicetree/bindings/display/msm/gpu.txt +3 -0
index 8d9415180c22..19b5ae459fdb 100644
@@ -19,6 +19,9 @@ Required properties:
   * "mem_iface"
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
+- interconnect-names: Name string for the interconnects.
 - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will
   control the power for the GPU
 

Documentation/devicetree/bindings/display/msm/gpu.txt Example a6xx (with GMU): · line 75

Quoted 5 lines
Documentation/devicetree/bindings/display/msm/gpu.txt +2 -0
@@ -68,6 +71,9 @@ Example a6xx (with GMU):
 
 		operating-points-v2 = <&gpu_opp_table>;
 
+		interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+		interconnect-names = "gfx-mem";

There's not really any point to having *-names when there is only 1 value.

Quoted 7 lines
Documentation/devicetree/bindings/display/msm/gpu.txt +1 -0
+
 		qcom,gmu = <&gmu>;
 	};
 };
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#7 lore raw

Re: [PATCH v2 1/2] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

Quoted 25 lines · Rob Herring
Quoted 24 lines · Jordan Crouse

Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt.

---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++
 1 file changed, 6 insertions(+)
Documentation/devicetree/bindings/display/msm/gpu.txt +3 -0
index 8d9415180c22..19b5ae459fdb 100644
@@ -19,6 +19,9 @@ Required properties:
   * "mem_iface"
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
+- interconnect-names: Name string for the interconnects.
 - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will
   control the power for the GPU
 
@@ -68,6 +71,9 @@ Example a6xx (with GMU):
 
Quoted 7 lines

Documentation/devicetree/bindings/display/msm/gpu.txt Example a6xx (with GMU): · line 75

Quoted 4 lines
Documentation/devicetree/bindings/display/msm/gpu.txt +2 -0
 		operating-points-v2 = <&gpu_opp_table>;
 
+		interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+		interconnect-names = "gfx-mem";

There's not really any point to having *-names when there is only 1 value.

For the moment we can only look up the path from the DT by name. I guess we could add an lookup by index but I'm not sure if that had already been considered and rejected.

Jordan

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#9 lore raw

Re: [PATCH v2 1/2] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

Quoted 35 lines · Jordan Crouse
Quoted 25 lines · Rob Herring
Quoted 24 lines · Jordan Crouse

Add documentation for the interconnect and interconnect-names bindings for the GPU node as detailed by bindings/interconnect/interconnect.txt.

---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++
 1 file changed, 6 insertions(+)
Documentation/devicetree/bindings/display/msm/gpu.txt +3 -0
index 8d9415180c22..19b5ae459fdb 100644
@@ -19,6 +19,9 @@ Required properties:
   * "mem_iface"
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
+- interconnect-names: Name string for the interconnects.
 - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will
   control the power for the GPU
 
@@ -68,6 +71,9 @@ Example a6xx (with GMU):
 
Quoted 7 lines

Documentation/devicetree/bindings/display/msm/gpu.txt Example a6xx (with GMU): · line 75

Quoted 4 lines
Documentation/devicetree/bindings/display/msm/gpu.txt +2 -0
            operating-points-v2 = <&gpu_opp_table>;
 
+           interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+           interconnect-names = "gfx-mem";

There's not really any point to having *-names when there is only 1 value.

Quoted 3 lines

For the moment we can only look up the path from the DT by name. I guess we could add an lookup by index but I'm not sure if that had already been considered and rejected.

You don't have to support lookup by index, just support a NULL name.

Rob
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#10 lore raw

PATCH v2 2/2 arm64: dts: sdm845: Add interconnect for GPU

In reply to a message not in the archive

Define an interconnect port for the GPU to set bus capabilities.

---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 3 +++
 1 file changed, 3 insertions(+)
arch/arm64/boot/dts/qcom/sdm845.dtsi +3 -0
index 0a5ddfc4c59b..2acfea87716c 100644
@@ -1370,6 +1370,9 @@
 
 			operating-points-v2 = <&gpu_opp_table>;
 
+			interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+			interconnect-names = "gfx-mem";
+
 			qcom,gmu = <&gmu>;
 
 			gpu_opp_table: opp-table {
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Reviewed-by Douglas Anderson
#12 lore raw

Re: [PATCH v2 2/2] arm64: dts: sdm845: Add interconnect for GPU

Hi,

Quoted 8 lines · Jordan Crouse

Define an interconnect port for the GPU to set bus capabilities.

---
 arch/arm64/boot/dts/qcom/sdm845.dtsi | 3 +++
 1 file changed, 3 insertions(+)

Looks good to me. This could go into Andy's tree as soon as Georgi's series lands somewhere.

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