KVM: x86: svm: report MSR_IA32_MCG_EXT_CTL as unsupported
PATCH 1/1 KVM: x86: svm: report MSR_IA32_MCG_EXT_CTL as unsupported
AMD doesn't seem to implement MSR_IA32_MCG_EXT_CTL and svm code in kvm knows nothing about it, however, this MSR is among emulated_msrs and thus returned with KVM_GET_MSR_INDEX_LIST. The consequent KVM_GET_MSRS, of course, fails.
Report the MSR as unsupported to not confuse userspace.
--- arch/x86/kvm/svm.c | 7 +++++++ 1 file changed, 7 insertions(+)
arch/x86/kvm/svm.c +7 -0
@@ -5845,6 +5845,13 @@ static bool svm_cpu_has_accelerated_tpr(void)static bool svm_has_emulated_msr (int index) { +switch (index) { +case MSR_IA32_MCG_EXT_CTL : +return false; +default : +break ; + } +return true; }
Signature · 1 line
2.19.2
Radim Krčmář
Applied2018-12-19 12:06+0100, Vitaly Kuznetsov:
Quoted 17 lines
AMD doesn't seem to implement
MSR_IA32_MCG_EXT_CTLand svm code in kvm knows nothing about it, however, this MSR is amongemulated_msrsand thus returned withKVM_GET_MSR_INDEX_LIST. The consequentKVM_GET_MSRS, of course, fails.Report the MSR as unsupported to not confuse userspace.
Signed-off-by Vitaly Kuznetsov <[email protected]>--- arch/x86/kvm/svm.c | 7 +++++++ 1 file changed, 7 insertions(+)arch/x86/kvm/svm.c +0
-0
arch/x86/kvm/svm.c static bool svm_cpu_has_accelerated_tpr(void) · line 5852
Quoted 8 lines
arch/x86/kvm/svm.c +5
-0@@ -5845,6 +5845,13 @@ static bool svm_cpu_has_accelerated_tpr(void)static bool svm_has_emulated_msr (int index) { +switch (index) { +case MSR_IA32_MCG_EXT_CTL : +return false; +default : +break ;
Queued, thanks.
Btw, I would prefer this without the
default: break;
as I don't think we'll ever add something there.
Quoted 29 lines · Radim Krčmář
2018-12-19 12:06+0100, Vitaly Kuznetsov:
Quoted 17 lines
AMD doesn't seem to implement
MSR_IA32_MCG_EXT_CTLand svm code in kvm knows nothing about it, however, this MSR is amongemulated_msrsand thus returned withKVM_GET_MSR_INDEX_LIST. The consequentKVM_GET_MSRS, of course, fails.Report the MSR as unsupported to not confuse userspace.
Signed-off-by Vitaly Kuznetsov <[email protected]>--- arch/x86/kvm/svm.c | 7 +++++++ 1 file changed, 7 insertions(+)arch/x86/kvm/svm.c +0
-0arch/x86/kvm/svm.c static bool svm_cpu_has_accelerated_tpr(void) · line 5852
Quoted 8 lines
arch/x86/kvm/svm.c +5
-0@@ -5845,6 +5845,13 @@ static bool svm_cpu_has_accelerated_tpr(void)static bool svm_has_emulated_msr (int index) { +switch (index) { +case MSR_IA32_MCG_EXT_CTL : +return false; +default : +break ;Queued, thanks.
Quoted 5 lines
Btw, I would prefer this without the
default: break;
as I don't think we'll ever add something there.
"640K ought to be enough for anybody" :-)
But in case you commit it as
return index != MSR_IA32_MCG_EXT_CTL;
I won't object. Thanks,
Signature · 1 line
Vitaly
Paolo Bonzini
maintainerQuoted 6 lines · Vitaly Kuznetsov
Quoted 5 lines
Btw, I would prefer this without the
default: break;
as I don't think we'll ever add something there.
Quoted 7 lines
"640K ought to be enough for anybody" :-)
But in case you commit it as
return index !=
MSR_IA32_MCG_EXT_CTL;I won't object. Thanks,
Radim committed it as it, but I think he did want the switch statement (hey, vmx_has_emulated_msr has *two* cases!). It's just the "default:
break;" that is unnecessary or could be "default: return true;".
Paolo