Expose thermal information for pms405 PMIC
Subsystems (4)
cover Expose thermal information for pms405 PMIC
Expose the on-die temperature sensor on the pms405 PMIC through the spmi-temp-alarm driver.
This series applies on top of the qcs404 DT series by Vinod[1]
[1] https://patchwork.kernel.org/cover/10675575/
Amit Kucheria (2):
dt-bindings: iio: adc: Add binding for ADC on pms405 PMIC
arm64: dts: pms405: Export PMIC temperature to thermal framework
.../bindings/iio/adc/qcom,spmi-vadc.txt | 1 + arch/arm64/boot/dts/qcom/pms405.dtsi | 79 +++++++++++++++++++ 2 files changed, 80 insertions(+)
Signature · 1 line
2.17.1
PATCH 1/2 dt-bindings: iio: adc: Add binding for ADC on pms405 PMIC
PMS405 contains a variant of the spmi-adc-rev2 ADC. Create a new compatible inorder to handle any differences.
--- Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt | 1 + 1 file changed, 1 insertion(+)
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt +1 -0
@@ -13,6 +13,7 @@ VADC node: Definition: Should contain "qcom,spmi-vadc". Should contain "qcom,spmi-adc5" for PMIC5 ADC driver. Should contain "qcom,spmi-adc-rev2" for PMIC rev2 ADC driver. + Should contain "qcom,pms405-adc" for PMS405 PMIC - reg: Usage: required
Signature · 1 line
2.17.1
Re: [PATCH v1 1/2] dt-bindings: iio: adc: Add binding for ADC on pms405 PMIC
Quoted 8 lines · Amit Kucheria
PMS405 contains a variant of the spmi-adc-rev2 ADC. Create a new compatible inorder to handle any differences.
Signed-off-by Amit Kucheria <[email protected]>--- Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.txt | 1 + 1 file changed, 1 insertion(+)
PATCH 2/2 arm64: dts: pms405: Export PMIC temperature to thermal framework
In reply to Amit KucheriaThe PMS405 PMIC has an ADC that exposes the on-die temperature that we wire up to spmi-temp-alarm thermal driver. This allows the PMIC temperature to be exposed to Linux through the thermal framework.
--- arch/arm64/boot/dts/qcom/pms405.dtsi | 79 ++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+)
arch/arm64/boot/dts/qcom/pms405.dtsi +79 -0
@@ -3,6 +3,32 @@ #include <dt-bindings/spmi/spmi.h> #include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/iio/qcom,spmi-vadc.h> +#include <dt-bindings/thermal/thermal.h> + +/ { + thermal-zones { + pms405 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&pms405_temp>; + + trips { + pms405_alert0: pms405-alert0 { + temperature = <105000>; + hysteresis = <2000>; + type = "passive"; + }; + pms405_crit: pms405-crit { + temperature = <125000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; +}; &spmi_bus { pms405_0: pms405@0 {
@@ -45,6 +71,59 @@ }; }; + pms405_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>; + io-channels = <&pms405_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pms405_adc: adc@3100 { + compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2"; + reg = <0x3100>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + + ref_gnd { + reg = <ADC5_REF_GND>; + qcom,pre-scaling = <1 1>; + }; + + vref_1p25 { + reg = <ADC5_1P25VREF>; + qcom,pre-scaling = <1 1>; + }; + + vph_pwr { + reg = <ADC5_VPH_PWR>; + qcom,pre-scaling = <1 3>; + }; + + die_temp { + reg = <ADC5_DIE_TEMP>; + qcom,pre-scaling = <1 1>; + }; + + xo_therm_100k_pu { + reg = <ADC5_XO_THERM_100K_PU>; + qcom,pre-scaling = <1 1>; + }; + + amux_thm1_100k_pu { + reg = <ADC5_AMUX_THM1_100K_PU>; + qcom,pre-scaling = <1 1>; + }; + + amux_thm3_100k_pu { + reg = <ADC5_AMUX_THM3_100K_PU>; + qcom,pre-scaling = <1 1>; + }; + }; + rtc@6000 { compatible = "qcom,pm8941-rtc"; reg = <0x6000>;
Signature · 1 line
2.17.1