clk: socfpga: stratix10: fix naming convention for the fixed-clocks
Subsystems (2)
Dinh Nguyen
maintainerPATCH RESEND 1/2 clk: socfpga: stratix10: fix naming convention for the fixed-clocks
The fixed clocks in the DTS file have a hyphen, but the clock driver has the fixed clocks using underbar. Thus the clock driver cannot detect the other fixed clocks correctly. Change the fixed clock names to a hyphen.
Stratix10 platform")
--- drivers/clk/socfpga/clk-s10.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
drivers/clk/socfpga/clk-s10.c +10 -10
@@ -12,17 +12,17 @@#include "stratix10-clk.h" -static const char *const pll_mux[] = {"osc1" ,"cb_intosc_hs_div2_clk" , -"f2s_free_clk" ,}; +static const char *const pll_mux[] = {"osc1" ,"cb-intosc-hs-div2-clk" , +"f2s-free-clk" ,};static const char *const cntr_mux[] = {"main_pll" ,"periph_pll" , -"osc1" ,"cb_intosc_hs_div2_clk" , -"f2s_free_clk" }; -static const char *const boot_mux[] = {"osc1" ,"cb_intosc_hs_div2_clk" ,}; +"osc1" ,"cb-intosc-hs-div2-clk" , +"f2s-free-clk" }; +static const char *const boot_mux[] = {"osc1" ,"cb-intosc-hs-div2-clk" ,};static const char *const noc_free_mux[] = {"main_noc_base_clk" ,"peri_noc_base_clk" , -"osc1" ,"cb_intosc_hs_div2_clk" , -"f2s_free_clk" }; +"osc1" ,"cb-intosc-hs-div2-clk" , +"f2s-free-clk" };static const char *const emaca_free_mux[] = {"peri_emaca_clk" ,"boot_clk" };static const char *const emacb_free_mux[] = {"peri_emacb_clk" ,"boot_clk" };
@@ -33,14 +33,14 @@ static const char * const s2f_usr1_free_mux[] = {"peri_s2f_usr1_clk", "boot_clk"static const char *const psi_ref_free_mux[] = {"peri_psi_ref_clk" ,"boot_clk" };static const char *const mpu_mux[] = {"mpu_free_clk" ,"boot_clk" ,}; -static const char *const s2f_usr0_mux[] = {"f2s_free_clk" ,"boot_clk" }; +static const char *const s2f_usr0_mux[] = {"f2s-free-clk" ,"boot_clk" };static const char *const emac_mux[] = {"emaca_free_clk" ,"emacb_free_clk" };static const char *const noc_mux[] = {"noc_free_clk" ,"boot_clk" };static const char *const mpu_free_mux[] = {"main_mpu_base_clk" ,"peri_mpu_base_clk" , -"osc1" ,"cb_intosc_hs_div2_clk" , -"f2s_free_clk" }; +"osc1" ,"cb-intosc-hs-div2-clk" , +"f2s-free-clk" };/* clocks in AO (always on) controller */ static const struct stratix10_pll_clock s10_pll_clks[] = {
Signature · 1 line
2.20.0
Dinh Nguyen
maintainerPATCH RESEND 2/2 clk: socfpga: stratix10: fix rate calculation for pll clocks
The main PLL calculation has a mistake. We should be using the multiplying the VCO frequency, not the parent clock frequency.
Stratix10 platform")
--- drivers/clk/socfpga/clk-pll-s10.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/clk/socfpga/clk-pll-s10.c +1 -1
@@ -43,7 +43,7 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk,/* Read mdiv and fdiv from the fdbck register */ reg =readl (socfpgaclk->hw.reg +0x4 ); mdiv = (reg &SOCFPGA_PLL_MDIV_MASK ) >>SOCFPGA_PLL_MDIV_SHIFT ; - vco_freq = (unsigned long long )parent_rate * (mdiv +6 ); + vco_freq = (unsigned long long )vco_freq * (mdiv +6 );return (unsigned long )vco_freq; }
Signature · 1 line
2.20.0
Dinh Nguyen
maintainerHi Stephen,
You've already applied 2/2 of this patch series[1] to clk-fixes, but can you also apply this patch as well?
Thanks,
Dinh
[1] https://www.spinics.net/lists/linux-clk/msg33940.html
Quoted 60 lines · Dinh Nguyen
The fixed clocks in the DTS file have a hyphen, but the clock driver has the fixed clocks using underbar. Thus the clock driver cannot detect the other fixed clocks correctly. Change the fixed clock names to a hyphen.
Fixes 07afb8db7340 ("clk: socfpga: stratix10: add clock driver forStratix10 platform")
Signed-off-by Dinh Nguyen <[email protected]>--- drivers/clk/socfpga/clk-s10.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)drivers/clk/socfpga/clk-s10.c +10
-10@@ -12,17 +12,17 @@#include "stratix10-clk.h" -static const char *const pll_mux[] = {"osc1" ,"cb_intosc_hs_div2_clk" , -"f2s_free_clk" ,}; +static const char *const pll_mux[] = {"osc1" ,"cb-intosc-hs-div2-clk" , +"f2s-free-clk" ,};static const char *const cntr_mux[] = {"main_pll" ,"periph_pll" , -"osc1" ,"cb_intosc_hs_div2_clk" , -"f2s_free_clk" }; -static const char *const boot_mux[] = {"osc1" ,"cb_intosc_hs_div2_clk" ,}; +"osc1" ,"cb-intosc-hs-div2-clk" , +"f2s-free-clk" }; +static const char *const boot_mux[] = {"osc1" ,"cb-intosc-hs-div2-clk" ,};static const char *const noc_free_mux[] = {"main_noc_base_clk" ,"peri_noc_base_clk" , -"osc1" ,"cb_intosc_hs_div2_clk" , -"f2s_free_clk" }; +"osc1" ,"cb-intosc-hs-div2-clk" , +"f2s-free-clk" };static const char *const emaca_free_mux[] = {"peri_emaca_clk" ,"boot_clk" };static const char *const emacb_free_mux[] = {"peri_emacb_clk" ,"boot_clk" };@@ -33,14 +33,14 @@ static const char * const s2f_usr1_free_mux[] = {"peri_s2f_usr1_clk", "boot_clk"static const char *const psi_ref_free_mux[] = {"peri_psi_ref_clk" ,"boot_clk" };static const char *const mpu_mux[] = {"mpu_free_clk" ,"boot_clk" ,}; -static const char *const s2f_usr0_mux[] = {"f2s_free_clk" ,"boot_clk" }; +static const char *const s2f_usr0_mux[] = {"f2s-free-clk" ,"boot_clk" };static const char *const emac_mux[] = {"emaca_free_clk" ,"emacb_free_clk" };static const char *const noc_mux[] = {"noc_free_clk" ,"boot_clk" };static const char *const mpu_free_mux[] = {"main_mpu_base_clk" ,"peri_mpu_base_clk" , -"osc1" ,"cb_intosc_hs_div2_clk" , -"f2s_free_clk" }; +"osc1" ,"cb-intosc-hs-div2-clk" , +"f2s-free-clk" };/* clocks in AO (always on) controller */ static const struct stratix10_pll_clock s10_pll_clks[] = {
Stephen Boyd
maintainerQuoting Dinh Nguyen (2019-01-14 07:45:57)
Quoted 5 lines
Hi Stephen,
You've already applied 2/2 of this patch series[1] to clk-fixes, but can you also apply this patch as well?
Hmm ok.
Quoting Dinh Nguyen (2019-01-02 06:59:31)
Quoted 9 lines
The fixed clocks in the DTS file have a hyphen, but the clock driver has the fixed clocks using underbar. Thus the clock driver cannot detect the other fixed clocks correctly. Change the fixed clock names to a hyphen.
Fixes 07afb8db7340 ("clk: socfpga: stratix10: add clock driver forStratix10 platform")
Signed-off-by Dinh Nguyen <[email protected]>---
Applied to clk-fixes