boot.bin on SD Card for SAMA5D3 Xplained
Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 xplained board. All I get is RomBOOT and no other messages. I have tried throwing in a couple test pins to toggle in board_early_init_f but still not getting any debug. I can get at91bootstrap to produce a boot.bin that works on the sama5d3 xplained so I am assuming I don’t have a bad board. My boot partition is FAT16. To compile I just run the following on Debian Buster :
make mrproper
make sama5d3_xplained_mmc_defconfig
make
Cross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf
When finished compiling I just copy the boot.bin to my BOOT partition.
Has to be something obvious that I am missing. Any insight is appreciated…
Dan
Quoted 11 lines · Daniel Evans
Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 xplained board. All I get is RomBOOT and no other messages. I have tried throwing in a couple test pins to toggle in
board_early_init_fbut still not getting any debug. I can get at91bootstrap to produce a boot.bin that works on the sama5d3 xplained so I am assuming I don’t have a bad board. My boot partition is FAT16. To compile I just run the following on Debian Buster :make mrproper
makesama5d3_xplained_mmc_defconfig
makeCross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf
When finished compiling I just copy the boot.bin to my BOOT partition.
Has to be something obvious that I am missing. Any insight is appreciated…
Hello,
Check the datasheet for sama5d3 SoC section 11.4.3. - Valid code detection (my datasheet is dated 2 Feb 2016 if it helps)
Basically the vector 6 needs to have hardcoded the binary size. Are you doing that ? Otherwise the RomBOOT code will consider your binary as faulty.
PS. make sure endianess is right, use a good hexeditor...
Hope this helps,
Eugen
Quoted 7 lines
Dan
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Thanks,
That put me on the right path. For some reason the nandheader is being added to the top of the boot.bin for the mmc/SD build.
$ ls -l boot.bin -rw-r--r-- 1 nelson nelson 62686 Dec 5 12:25 boot.bin $ hexdump boot.bin | head 0000000 2405 c090 2405 c090 2405 c090 2405 c090 * 00000d0 000f ea00 f014 e59f f014 e59f f014 e59f 00000e0 f014 e59f f40e 0000 f014 e59f f014 e59f 00000f0 0040 0030 0040 0030 0040 0030 0040 0030 0000100 0040 0030 0040 0030 0040 0030 beef dead 0000110 fffe eaff 002a ea00 0000 e10f 101f e200 0000120 001a e331 001f 13c0 0013 1380 00c0 e380 0000130 f000 e129 0f10 ee11 0a02 e3c0 0f10 ee01 0000140 0078 e59f 0f10 ee0c 0006 eb00 001a eb00
So I just removed it and then you can see the size is correct once removed (0x0000F40E):
$ dd bs=208 skip=1 if=boot.bin of=bootShort.bin $ hexdump bootShort.bin | head 0000000 000f ea00 f014 e59f f014 e59f f014 e59f 0000010 f014 e59f f40e 0000 f014 e59f f014 e59f 0000020 0040 0030 0040 0030 0040 0030 0040 0030 0000030 0040 0030 0040 0030 0040 0030 beef dead 0000040 fffe eaff 002a ea00 0000 e10f 101f e200 0000050 001a e331 001f 13c0 0013 1380 00c0 e380 0000060 f000 e129 0f10 ee11 0a02 e3c0 0f10 ee01 0000070 0078 e59f 0f10 ee0c 0006 eb00 001a eb00 0000080 01b6 eb00 0f15 ee07 0f9a ee07 0f95 ee07 0000090 ff1e e12f ffeb eaff 0000 e3a0 0f17 ee08 $ ls -l bootShort.bin -rw-r--r-- 1 nelson nelson 62478 Dec 5 12:54 bootShort.bin
Any insight into why that is being added at the beginning? Is there a configuration that needs tweaking or to be removed?
Dan
Quoted 37 lines · On Dec 5, 2018, at 7:36 AM, <[email protected]>…
Quoted 11 lines · Daniel Evans
Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 xplained board. All I get is RomBOOT and no other messages. I have tried throwing in a couple test pins to toggle in
board_early_init_fbut still not getting any debug. I can get at91bootstrap to produce a boot.bin that works on the sama5d3 xplained so I am assuming I don’t have a bad board. My boot partition is FAT16. To compile I just run the following on Debian Buster :make mrproper
makesama5d3_xplained_mmc_defconfig
makeCross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf
When finished compiling I just copy the boot.bin to my BOOT partition.
Has to be something obvious that I am missing. Any insight is appreciated…
Hello,
Check the datasheet for sama5d3 SoC section 11.4.3. - Valid code detection (my datasheet is dated 2 Feb 2016 if it helps)
Basically the vector 6 needs to have hardcoded the binary size. Are you doing that ? Otherwise the RomBOOT code will consider your binary as faulty.
PS. make sure endianess is right, use a good hexeditor...
Hope this helps,
EugenQuoted 7 lines
Dan
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
https://lists.denx.de/listinfo/u-boot
Quoted 21 lines · On Wed, Dec 5, 2018 at 8:37 AM <[email protected]> wrote:
Quoted 11 lines · Daniel Evans
Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 xplained board. All I get is RomBOOT and no other messages. I have tried throwing in a couple test pins to toggle in
board_early_init_fbut still not getting any debug. I can get at91bootstrap to produce a boot.bin that works on the sama5d3 xplained so I am assuming I don’t have a bad board. My boot partition is FAT16. To compile I just run the following on Debian Buster :make mrproper
makesama5d3_xplained_mmc_defconfig
makeCross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf
When finished compiling I just copy the boot.bin to my BOOT partition.
Has to be something obvious that I am missing. Any insight is appreciated…
Hello,
Check the datasheet for sama5d3 SoC section 11.4.3. - Valid code detection (my datasheet is dated 2 Feb 2016 if it helps)
Quoted 7 lines
Basically the vector 6 needs to have hardcoded the binary size. Are you doing that ? Otherwise the RomBOOT code will consider your binary as faulty.
PS. make sure endianess is right, use a good hexeditor...
Hope this helps,
Eugen
Okay, just finished my git bisect, this turned out to be a miss-placed #endif when Wenyou did the "configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment" patch:
=> RomBOOT
<debug_uart>
U-Boot spl 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600) Trying to boot from MMC1
<debug_uart>
U-Boot 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600)
<snip>
(quoted diff) +0 -0
b/include/configs/sama5d3_xplained.h
index d0d8087ca3..f87713319d 100644
include/configs/sama5d3_xplained.h +2 -1
@@ -80,7 +80,6 @@#elif CONFIG_NAND_BOOT #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE -#endif #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x800
@@ -91,3 +90,5 @@#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif + +#endif
Before:
#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#elif CONFIG_SYS_USE_NANDFLASH
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#endif
After:
#ifdef CONFIG_SD_BOOT
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
#elif CONFIG_NAND_BOOT
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#endif <------------------------------------------------- WHY HERE???? #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
#endif
Regards,
Signature · 2 lines
Robert Nelson https://rcn-ee.com/
Quoted 27 lines · Robert Nelson
Quoted 26 lines · On Wed, Dec 5, 2018 at 8:37 AM <[email protected]> wrote:
Quoted 11 lines · Daniel Evans
Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 xplained board. All I get is RomBOOT and no other messages. I have tried throwing in a couple test pins to toggle in
board_early_init_fbut still not getting any debug. I can get at91bootstrap to produce a boot.bin that works on the sama5d3 xplained so I am assuming I don’t have a bad board. My boot partition is FAT16. To compile I just run the following on Debian Buster :make mrproper
makesama5d3_xplained_mmc_defconfig
makeCross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf
When finished compiling I just copy the boot.bin to my BOOT partition.
Has to be something obvious that I am missing. Any insight is appreciated…
Hello,
Check the datasheet for sama5d3 SoC section 11.4.3. - Valid code detection (my datasheet is dated 2 Feb 2016 if it helps)
Basically the vector 6 needs to have hardcoded the binary size. Are you doing that ? Otherwise the RomBOOT code will consider your binary as faulty.
PS. make sure endianess is right, use a good hexeditor...
Quoted 8 lines
Quoted 2 lines
Hope this helps,
EugenOkay, just finished my git bisect, this turned out to be a miss-placed #endif when Wenyou did the "configs: at91: Remove
CONFIG_SYS_EXTRA_OPTIONSassignment" patch:
Interesting find, is this wrongly done for all the boards in the commit or just sama5d3_xplained ?
Feel free to submit a patch if this fixes the issue, and we will review it.
Thanks !
Quoted 73 lines
=> RomBOOT
<debug_uart>
U-Boot spl 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600) Trying to boot from MMC1
<debug_uart>U-Boot 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600)
<snip>
include/configs/sama5d3_xplained.h +2
-1@@ -80,7 +80,6 @@#elif CONFIG_NAND_BOOT #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE -#endif #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x800@@ -91,3 +90,5 @@#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif + +#endif Before:
#ifdefCONFIG_SYS_USE_MMC
#defineCONFIG_SYS_MMCSD_FS_BOOT_PARTITION1 #defineCONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img"#elif
CONFIG_SYS_USE_NANDFLASH
#defineCONFIG_SPL_NAND_DRIVERS
#defineCONFIG_SPL_NAND_BASE
#defineCONFIG_SYS_NAND_U_BOOT_OFFS0x40000
#defineCONFIG_SYS_NAND_5_ADDR_CYCLE
#defineCONFIG_SYS_NAND_PAGE_SIZE0x800
#defineCONFIG_SYS_NAND_PAGE_COUNT64
#defineCONFIG_SYS_NAND_OOBSIZE64
#defineCONFIG_SYS_NAND_BLOCK_SIZE0x20000
#defineCONFIG_SYS_NAND_BAD_BLOCK_POS0x0
#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER#endif
After:
#ifdefCONFIG_SD_BOOT
#defineCONFIG_SYS_MMCSD_FS_BOOT_PARTITION1 #defineCONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img"#elif
CONFIG_NAND_BOOT
#defineCONFIG_SPL_NAND_DRIVERS
#defineCONFIG_SPL_NAND_BASE
#endif <------------------------------------------------- WHY HERE???? #defineCONFIG_SYS_NAND_U_BOOT_OFFS0x40000
#defineCONFIG_SYS_NAND_5_ADDR_CYCLE
#defineCONFIG_SYS_NAND_PAGE_SIZE0x800
#defineCONFIG_SYS_NAND_PAGE_COUNT64
#defineCONFIG_SYS_NAND_OOBSIZE64
#defineCONFIG_SYS_NAND_BLOCK_SIZE0x20000
#defineCONFIG_SYS_NAND_BAD_BLOCK_POS0x0
#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER#endif
Regards,
Quoted 37 lines · Eugen.Hristev at microchip.com
Quoted 34 lines · Robert Nelson
Quoted 21 lines · On Wed, Dec 5, 2018 at 8:37 AM <[email protected]> wrote:
Quoted 11 lines · Daniel Evans
Trying to get uboot SPL boot.bin to run on an SD card for the sama5d3 xplained board. All I get is RomBOOT and no other messages. I have tried throwing in a couple test pins to toggle in
board_early_init_fbut still not getting any debug. I can get at91bootstrap to produce a boot.bin that works on the sama5d3 xplained so I am assuming I don’t have a bad board. My boot partition is FAT16. To compile I just run the following on Debian Buster :make mrproper
makesama5d3_xplained_mmc_defconfig
makeCross Compiler is gcc-linaro-6.4.1-2018.05-x86_64_arm-linux-gnueabihf
When finished compiling I just copy the boot.bin to my BOOT partition.
Has to be something obvious that I am missing. Any insight is appreciated…
Hello,
Check the datasheet for sama5d3 SoC section 11.4.3. - Valid code detection (my datasheet is dated 2 Feb 2016 if it helps)
Quoted 7 lines
Basically the vector 6 needs to have hardcoded the binary size. Are you doing that ? Otherwise the RomBOOT code will consider your binary as faulty.
PS. make sure endianess is right, use a good hexeditor...
Hope this helps,
EugenOkay, just finished my git bisect, this turned out to be a miss-placed #endif when Wenyou did the "configs: at91: Remove
CONFIG_SYS_EXTRA_OPTIONSassignment" patch:
Quoted 9 lines
Interesting find, is this wrongly done for all the boards in the commit or just
sama5d3_xplained?Feel free to submit a patch if this fixes the issue, and we will review it.
Thanks !
Would this be an acceptable alternative?
---8<-------------------------------------------------------------------
scripts/Makefile.spl +2 -0
@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimage ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifneq ($(CONFIG_SD_BOOT),y) MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage)
---8<-------------------------------------------------------------------
It guards the modification of 'boot.bin'@the build location. Also, as Kconfig items are cleaned-up, the guard will still hold.
I can submit a proper patch, if this is reasonable.
Derald
Quoted 78 lines
Quoted 70 lines
=> RomBOOT
<debug_uart>
U-Boot spl 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600) Trying to boot from MMC1
<debug_uart>U-Boot 2019.01-rc1-00021-g2e2a2a5d4f-dirty (Dec 05 2018 - 14:30:22 -0600)
<snip>
include/configs/sama5d3_xplained.h +2
-1@@ -80,7 +80,6 @@#elif CONFIG_NAND_BOOT #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE -#endif #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x800@@ -91,3 +90,5 @@#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif + +#endif Before:
#ifdefCONFIG_SYS_USE_MMC
#defineCONFIG_SYS_MMCSD_FS_BOOT_PARTITION1 #defineCONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img"#elif
CONFIG_SYS_USE_NANDFLASH
#defineCONFIG_SPL_NAND_DRIVERS
#defineCONFIG_SPL_NAND_BASE
#defineCONFIG_SYS_NAND_U_BOOT_OFFS0x40000
#defineCONFIG_SYS_NAND_5_ADDR_CYCLE
#defineCONFIG_SYS_NAND_PAGE_SIZE0x800
#defineCONFIG_SYS_NAND_PAGE_COUNT64
#defineCONFIG_SYS_NAND_OOBSIZE64
#defineCONFIG_SYS_NAND_BLOCK_SIZE0x20000
#defineCONFIG_SYS_NAND_BAD_BLOCK_POS0x0
#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER#endif
After:
#ifdefCONFIG_SD_BOOT
#defineCONFIG_SYS_MMCSD_FS_BOOT_PARTITION1 #defineCONFIG_SPL_FS_LOAD_PAYLOAD_NAME"u-boot.img"#elif
CONFIG_NAND_BOOT
#defineCONFIG_SPL_NAND_DRIVERS
#defineCONFIG_SPL_NAND_BASE
#endif <------------------------------------------------- WHY HERE???? #defineCONFIG_SYS_NAND_U_BOOT_OFFS0x40000
#defineCONFIG_SYS_NAND_5_ADDR_CYCLE
#defineCONFIG_SYS_NAND_PAGE_SIZE0x800
#defineCONFIG_SYS_NAND_PAGE_COUNT64
#defineCONFIG_SYS_NAND_OOBSIZE64
#defineCONFIG_SYS_NAND_BLOCK_SIZE0x20000
#defineCONFIG_SYS_NAND_BAD_BLOCK_POS0x0
#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERQuoted 4 lines
#endif
Regards,
_______________________________________________
U-Boot mailing list
U-Boot at lists.denx.de
https://lists.denx.de/listinfo/u-boot
PATCH 1/1 ARM: at91: Fix 'boot.bin' generation when CONFIG_SD_BOOT is enabled
In reply to Daniel EvansOn AT91 platforms configured for SD_BOOT, this commit avoids the generation of the PMECC header used for booting from NAND flash. This issue was found by attempting to boot the SAMA5D3-XPLD board with the 'sama5d3_xplained_mmc_defconfig'.
[PMECC Reference]
http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html
--- scripts/Makefile.spl | 2 ++ 1 file changed, 2 insertions(+)
scripts/Makefile.spl +2 -0
@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimage ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifneq ($(CONFIG_SD_BOOT),y) MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage)
Signature · 1 line
2.19.2
PATCH 1/1 ARM: at91: Fix 'boot.bin' generation when CONFIG_SD_BOOT is enabled
Quoted 26 lines · Derald D. Woods
On AT91 platforms configured for
SD_BOOT, this commit avoids the generation of the PMECC header used for booting from NAND flash. This issue was found by attempting to boot the SAMA5D3-XPLD board with the 'sama5d3_xplained_mmc_defconfig'.[PMECC Reference]
http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")Reported-by Daniel Evans <[email protected]>Cc Robert Nelson <[email protected]>Cc Eugen Hristev <[email protected]>Cc Wenyou Yang <[email protected]>Signed-off-by Derald D. Woods <[email protected]>--- scripts/Makefile.spl | 2 ++ 1 file changed, 2 insertions(+)scripts/Makefile.spl +0
-0
scripts/Makefile.spl ifeq ($(CONFIG_SYS_SOC),"at91") · line 169
Quoted 4 lines
scripts/Makefile.spl +1
-0@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimage ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifneq ($(CONFIG_SD_BOOT),y)
Hi Derald,
Thanks for your patch, however, I don't like that we do not use the CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER anymore... isn't this config supposed to say whether we are going to generate the header or not ?
Checking if "not sd-boot" doesn't look like a good option... we may use SPI boot or QSPI or some other type at some point and the issue will still be there.
I would rather fix the original patch by Wenyou, namely move the #ifdef below to not have the GENERATE_ATMEL_PMECC enabled for SDBOOT.
Does this sound good for you?
Thanks again,
Eugen
Quoted 9 lines
scripts/Makefile.spl +1
-0MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage)
PATCH 1/1 ARM: at91: Fix 'boot.bin' generation when CONFIG_SD_BOOT is enabled
Quoted 31 lines · Eugen.Hristev at microchip.com
Quoted 28 lines · Derald D. Woods
On AT91 platforms configured for
SD_BOOT, this commit avoids the generation of the PMECC header used for booting from NAND flash. This issue was found by attempting to boot the SAMA5D3-XPLD board with the 'sama5d3_xplained_mmc_defconfig'.[PMECC Reference]
http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")Reported-by Daniel Evans <[email protected]>Cc Robert Nelson <[email protected]>Cc Eugen Hristev <[email protected]>Cc Wenyou Yang <[email protected]>Signed-off-by Derald D. Woods <[email protected]>--- scripts/Makefile.spl | 2 ++ 1 file changed, 2 insertions(+)scripts/Makefile.spl +0
-0@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimage
Quoted 9 lines
scripts/Makefile.spl ifeq ($(CONFIG_SYS_SOC),"at91") · line 169
Quoted 2 lines
scripts/Makefile.spl +1
-0ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifneq ($(CONFIG_SD_BOOT),y)Hi Derald,
Thanks for your patch, however, I don't like that we do not use the
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERanymore... isn't this config supposed to say whether we are going to generate the header or not ?
That is not what is happening with this patch. SPL_GENERATE_ATMEL_PMECC_HEADER is not removed. The config still serves its orignal intent. If SD_BOOT is configured, then NAND is not being used. In this non-NAND case, the header is not needed.
Quoted 4 lines
Checking if "not sd-boot" doesn't look like a good option... we may use SPI boot or QSPI or some other type at some point and the issue will still be there.
This location and method would work for those nod-NAND cases also. See below.
Quoted 5 lines
I would rather fix the original patch by Wenyou, namely move the #ifdef below to not have the
GENERATE_ATMEL_PMECCenabled for SDBOOT.Does this sound good for you?
If this SPL_GENERATE_ATMEL_PMECC_HEADER only needs to be there for NAND, why not guard the 'ifdef ($(CONFIG_NAND_BOOT,y))'? Would this be better? Basically we could replace the 'ifneq ($(CONFIG_SD_BOOT),y)' with the more appropriate 'ifeq ($(CONFIG_NAND_BOOT),y)'. This would actually allow the future use-cases to be added as they become available and can be shown to actually boot with the header applied.
I will put together a proper version 2 of my patch later today.
[patch v2]
------------------------------------------------------------------------
scripts/Makefile.spl +2 -0
@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimage ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifeq ($(CONFIG_NAND_BOOT),y) MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage)
------------------------------------------------------------------------
This would allow other configurations to 'opt-in' to applying the header. Which I think is the direction this is truly heading.
Also, the SPL_GENERATE_ATMEL_PMECC_HEADER needs transitioning to Kconfig. Having the logic in "Makefile.spl" would help with that work too.
Derald
Quoted 13 lines
Thanks again,
Eugen
Quoted 9 lines
scripts/Makefile.spl +1
-0MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage)
PATCH 1/1 ARM: at91: Fix 'boot.bin' generation when CONFIG_SD_BOOT is enabled
Quoted 91 lines · Derald D. Woods
Quoted 31 lines · Eugen.Hristev at microchip.com
Quoted 28 lines · Derald D. Woods
On AT91 platforms configured for
SD_BOOT, this commit avoids the generation of the PMECC header used for booting from NAND flash. This issue was found by attempting to boot the SAMA5D3-XPLD board with the 'sama5d3_xplained_mmc_defconfig'.[PMECC Reference]
http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")Reported-by Daniel Evans <[email protected]>Cc Robert Nelson <[email protected]>Cc Eugen Hristev <[email protected]>Cc Wenyou Yang <[email protected]>Signed-off-by Derald D. Woods <[email protected]>--- scripts/Makefile.spl | 2 ++ 1 file changed, 2 insertions(+)scripts/Makefile.spl +0
-0@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimageQuoted 9 lines
scripts/Makefile.spl ifeq ($(CONFIG_SYS_SOC),"at91") · line 169
Quoted 2 lines
scripts/Makefile.spl +1
-0ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifneq ($(CONFIG_SD_BOOT),y)Hi Derald,
Thanks for your patch, however, I don't like that we do not use the
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERanymore... isn't this config supposed to say whether we are going to generate the header or not ?That is not what is happening with this patch.
SPL_GENERATE_ATMEL_PMECC_HEADERis not removed. The config still serves its orignal intent. IfSD_BOOTis configured, then NAND is not being used. In this non-NAND case, the header is not needed.Quoted 4 lines
Checking if "not sd-boot" doesn't look like a good option... we may use SPI boot or QSPI or some other type at some point and the issue will still be there.
This location and method would work for those nod-NAND cases also. See below.
Quoted 5 lines
I would rather fix the original patch by Wenyou, namely move the #ifdef below to not have the
GENERATE_ATMEL_PMECCenabled for SDBOOT.Does this sound good for you?
If this
SPL_GENERATE_ATMEL_PMECC_HEADERonly needs to be there for NAND, why not guard the 'ifdef ($(CONFIG_NAND_BOOT,y))'? Would this be better? Basically we could replace the 'ifneq ($(CONFIG_SD_BOOT),y)' with the more appropriate 'ifeq ($(CONFIG_NAND_BOOT),y)'. This would actually allow the future use-cases to be added as they become available and can be shown to actually boot with the header applied.I will put together a proper version 2 of my patch later today.
[patch v2]
------------------------------------------------------------------------scripts/Makefile.spl +2
-1@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimage ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifeq ($(CONFIG_NAND_BOOT),y) MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage) ------------------------------------------------------------------------
Quoted 2 lines
This would allow other configurations to 'opt-in' to applying the header. Which I think is the direction this is truly heading.
My questions are :
If we have configured CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER, then why the header is not being applied after your patch ?
And why do we configure CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER if we do not wish the PMECC header in the image ?
With your patch, why do we generate the PMECC header w.r.t. the configuration of NAND_BOOT and not CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER ?
Or perhaps I am missing something on the purpose of CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER ?
To quote from doc/README.atmel_pmecc :
<quote>
To enable the generation of atmel PMECC header for SPL one need to defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from
board configuration and compiled into the host tools atmel_pmecc_params. This
tool will be called in build process to parametrize mkimage for atmelimage
type. The mkimage tool has intentionally _not_ compiled in those parameters. </quote>
So I would expect CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER to generate the PMECC header if configured, and if this flag is not present, the PMECC header is not generated.
I do expect that SD card booting configurations do not select this flag.
Quoted 22 lines
Also, the
SPL_GENERATE_ATMEL_PMECC_HEADERneeds transitioning toKconfig. Having the logic in "Makefile.spl" would help with that work too.Derald
Quoted 13 lines
Thanks again,
Eugen
Quoted 9 lines
scripts/Makefile.spl +1
-0MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage)
PATCH 1/1 ARM: at91: Fix 'boot.bin' generation when CONFIG_SD_BOOT is enabled
Quoted 133 lines · On Mon, Dec 10, 2018 at 8:03 AM <[email protected]> wrote:
Quoted 1 line · Derald D. Woods
On Mon, Dec 10, 2018 at 08:32:33AM +0000, Eugen.Hristev at microchip.com
Quoted 8 lines · wrote:
Quoted 8 lines · Derald D. Woods
Quoted 5 lines
On AT91 platforms configured for
SD_BOOT, this commit avoids the generation of the PMECC header used for booting from NAND flash. This issue was found by attempting to boot the SAMA5D3-XPLD board with the 'sama5d3_xplained_mmc_defconfig'.Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
[PMECC Reference]
http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONSassignment")
Quoted 21 lines
Quoted 21 lines
Quoted 14 lines
Reported-by Daniel Evans <[email protected]>Cc Robert Nelson <[email protected]>Cc Eugen Hristev <[email protected]>Cc Wenyou Yang <[email protected]>Signed-off-by Derald D. Woods <[email protected]>--- scripts/Makefile.spl | 2 ++ 1 file changed, 2 insertions(+)scripts/Makefile.spl +0
-0scripts/Makefile.spl ifeq ($(CONFIG_SYS_SOC),"at91") · line 169
Quoted 4 lines
scripts/Makefile.spl +1
-0@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimage ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifneq ($(CONFIG_SD_BOOT),y)Hi Derald,
Quoted 6 lines
Quoted 4 lines
Thanks for your patch, however, I don't like that we do not use the
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERanymore... isn't this config supposed to say whether we are going to generate the header or not ?That is not what is happening with this patch.
SPL_GENERATE_ATMEL_PMECC_HEADERQuoted 25 lines
is not removed. The config still serves its orignal intent. If
SD_BOOTis configured, then NAND is not being used. In this non-NAND case, the header is not needed.Quoted 4 lines
Checking if "not sd-boot" doesn't look like a good option... we may use SPI boot or QSPI or some other type at some point and the issue will still be there.
This location and method would work for those nod-NAND cases also. See below.
Quoted 5 lines
I would rather fix the original patch by Wenyou, namely move the #ifdef below to not have the
GENERATE_ATMEL_PMECCenabled for SDBOOT.Does this sound good for you?
If this
SPL_GENERATE_ATMEL_PMECC_HEADERonly needs to be there for NAND, why not guard the 'ifdef ($(CONFIG_NAND_BOOT,y))'? Would this be better? Basically we could replace the 'ifneq ($(CONFIG_SD_BOOT),y)' with the more appropriate 'ifeq ($(CONFIG_NAND_BOOT),y)'. This would actually allow the future use-cases to be added as they become available and can be shown to actually boot with the header applied.Quoted 4 lines
I will put together a proper version 2 of my patch later today.
[patch v2]
------------------------------------------------------------------------
Quoted 8 lines
scripts/Makefile.spl +0
-0@@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") MKIMAGEFLAGS_boot.bin = -T atmelimagescripts/Makefile.spl ifeq ($(CONFIG_SYS_SOC),"at91") · line 177
Quoted 10 lines
scripts/Makefile.spl +2
-0ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) +ifeq ($(CONFIG_NAND_BOOT),y) MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage)------------------------------------------------------------------------
Quoted 3 lines
This would allow other configurations to 'opt-in' to applying the header. Which I think is the direction this is truly heading.
My questions are :
If we have configured
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER, then why the header is not being applied after your patch ?And why do we configure
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERif we do not wish the PMECC header in the image ?With your patch, why do we generate the PMECC header w.r.t. the configuration of
NAND_BOOTand notCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER?Or perhaps I am missing something on the purpose of
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER?To quote from doc/README.atmel_pmecc :
<quote>
To enable the generation of atmel PMECC header for SPL one need to defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from
board configuration and compiled into the host toolsatmel_pmecc_params. This
tool will be called in build process to parametrize mkimage for atmelimage
type. The mkimage tool has intentionally _not_ compiled in those parameters.
</quote>
Quoted 6 lines
So I would expect
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERto generate the PMECC header if configured, and if this flag is not present, the PMECC header is not generated.
I do expect that SD card booting configurations do not select this flag.
The patch does _not_ remove CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER or change its purpose or overall role. Literally. It is a very simple patch that solves
a "no-boot" issue for at least sama5d3-xpld. I read the documents before my patch. This is a post-build tooling issue. Makefile.spl can leverage configs as they are naturally selected.
Derald
Quoted 25 lines
Quoted 14 lines
Also, the
SPL_GENERATE_ATMEL_PMECC_HEADERneeds transitioning toKconfig. Having the logic in "Makefile.spl" would help with that work too.Derald
Quoted 5 lines
Thanks again,
Eugen
Quoted 1 line
scripts/Makefile.spl +0
-0MKIMAGEFLAGS_boot.bin += -n $(shell$(obj)/../tools/atmel_pmecc_params)
Quoted 9 lines
Quoted 8 lines
Quoted 8 lines
scripts/Makefile.spl +1
-0boot.bin: $(obj)/../tools/atmel_pmecc_params endif +endif boot.bin: $(obj)/u-boot-spl.bin FORCE $(call if_changed,mkimage)
PATCH 1/1 ARM: at91: Fix 'boot.bin' generation when CONFIG_SD_BOOT is enabled
Quoted 164 lines · Derald Woods
On Mon, Dec 10, 2018 at 8:03 AM <[email protected] <mailto:[email protected]>> wrote:
On 10.12.2018 15:01, Derald D. Woods wrote: > On Mon, Dec 10, 2018 at 08:32:33AM +0000, Eugen.Hristev at microchip.com <mailto:[email protected]> wrote: >> >> >> On 08.12.2018 21:49, Derald D. Woods wrote: >>> On AT91 platforms configured for SD_BOOT, this commit avoids the >>> generation of the PMECC header used for booting from NAND flash. This >>> issue was found by attempting to boot the SAMA5D3-XPLD board with the >>> 'sama5d3_xplained_mmc_defconfig'. >>> >>> [PMECC Reference] >>> http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap >>> >>> [Mailing List Thread] >>> https://lists.denx.de/pipermail/u-boot/2018-December/350666.html >>> >>> Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") >>> Reported-by: Daniel Evans <[email protected] <mailto:[email protected]>> >>> Cc: Robert Nelson <[email protected] <mailto:[email protected]>> >>> Cc: Eugen Hristev <[email protected] <mailto:[email protected]>> >>> Cc: Wenyou Yang <[email protected] <mailto:[email protected]>> >>> Signed-off-by: Derald D. Woods <[email protected] <mailto:[email protected]>> >>> --- >>> scripts/Makefile.spl | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl >>> index 22bd8f7c27..e727cb610f 100644 >>> --- a/scripts/Makefile.spl >>> +++ b/scripts/Makefile.spl >>> @@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") >>> MKIMAGEFLAGS_boot.bin = -T atmelimage >>> >>> ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) >>> +ifneq ($(CONFIG_SD_BOOT),y) >> >> Hi Derald, >> >> Thanks for your patch, however, I don't like that we do not use the >> CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER anymore... isn't this config >> supposed to say whether we are going to generate the header or not ? >> > > That is not what is happening with this patch. SPL_GENERATE_ATMEL_PMECC_HEADER > is not removed. The config still serves its orignal intent. If SD_BOOT > is configured, then NAND is not being used. In this non-NAND case, the > header is not needed. > >> Checking if "not sd-boot" doesn't look like a good option... we may use >> SPI boot or QSPI or some other type at some point and the issue will >> still be there. >> > > This location and method would work for those nod-NAND cases also. See > below. > >> I would rather fix the original patch by Wenyou, namely move the #ifdef >> below to not have the GENERATE_ATMEL_PMECC enabled for SDBOOT. >> >> Does this sound good for you? >> > > If this SPL_GENERATE_ATMEL_PMECC_HEADER only needs to be there for NAND, > why not guard the 'ifdef ($(CONFIG_NAND_BOOT,y))'? Would this be better? > Basically we could replace the 'ifneq ($(CONFIG_SD_BOOT),y)' with the > more appropriate 'ifeq ($(CONFIG_NAND_BOOT),y)'. This would actually > allow the future use-cases to be added as they become available and can > be shown to actually boot with the header applied. > > I will put together a proper version 2 of my patch later today. > > [patch v2] > ------------------------------------------------------------------------ > diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl > index 22bd8f7..e727cb6 100644 > --- a/scripts/Makefile.spl > +++ b/scripts/Makefile.spl > @@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") > MKIMAGEFLAGS_boot.bin = -T atmelimage > > ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) > +ifeq ($(CONFIG_NAND_BOOT),y) > MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) > > boot.bin: $(obj)/../tools/atmel_pmecc_params > endif > +endif > > boot.bin: $(obj)/u-boot-spl.bin FORCE > $(call if_changed,mkimage) > ------------------------------------------------------------------------ > > This would allow other configurations to 'opt-in' to applying the > header. Which I think is the direction this is truly heading. My questions are : If we have configured CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER, then why the header is not being applied after your patch ? And why do we configure CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER if we do not wish the PMECC header in the image ? With your patch, why do we generate the PMECC header w.r.t. the configuration of NAND_BOOT and not CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER ? Or perhaps I am missing something on the purpose of CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER ? To quote from doc/README.atmel_pmecc : <quote> To enable the generation of atmel PMECC header for SPL one need to define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from board configuration and compiled into the host tools atmel_pmecc_params. This tool will be called in build process to parametrize mkimage for atmelimage type. The mkimage tool has intentionally _not_ compiled in those parameters. </quote> So I would expect CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER to generate the PMECC header if configured, and if this flag is not present, the PMECC header is not generated. I do expect that SD card booting configurations do not select this flag.
Quoted 8 lines
The patch does _not_ remove
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERor change its purpose or overall role. Literally. It is a very simple patch that solves
a "no-boot" issue for at least sama5d3-xpld. I read the documents before my patch. This is a post-build tooling issue. Makefile.spl can leverage configs as they are naturally selected.Derald
Does the following change fix your problem ?
(quoted diff) +0 -0
b/include/configs/sama5d3_xplained.h
index d0d8087..f2661c5 100644
include/configs/sama5d3_xplained.h +1 -1
@@ -80,6 +80,7 @@#elif CONFIG_NAND_BOOT #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE
@@ -88,6 +89,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
Quoted 26 lines
>
> Also, the SPL_GENERATE_ATMEL_PMECC_HEADER needs transitioning to
> Kconfig. Having the logic in "Makefile.spl" would help with that work
> too.
>
> Derald
>
>
>> Thanks again,
>>
>> Eugen
>>
>>> MKIMAGEFLAGS_boot.bin += -n $(shell
$(obj)/../tools/atmel_pmecc_params)
>>>
>>> boot.bin: $(obj)/../tools/atmel_pmecc_params
>>> endif
>>> +endif
>>>
>>> boot.bin: $(obj)/u-boot-spl.bin FORCE
>>> $(call if_changed,mkimage)
>>>
>PATCH 1/1 ARM: at91: Fix 'boot.bin' generation when CONFIG_SD_BOOT is enabled
Quoted 174 lines · Eugen.Hristev at microchip.com
Quoted 171 lines · Derald Woods
On Mon, Dec 10, 2018 at 8:03 AM <[email protected] <mailto:[email protected]>> wrote:
On 10.12.2018 15:01, Derald D. Woods wrote: > On Mon, Dec 10, 2018 at 08:32:33AM +0000, Eugen.Hristev at microchip.com <mailto:[email protected]> wrote: >> >> >> On 08.12.2018 21:49, Derald D. Woods wrote: >>> On AT91 platforms configured for SD_BOOT, this commit avoids the >>> generation of the PMECC header used for booting from NAND flash. This >>> issue was found by attempting to boot the SAMA5D3-XPLD board with the >>> 'sama5d3_xplained_mmc_defconfig'. >>> >>> [PMECC Reference] >>> http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap >>> >>> [Mailing List Thread] >>> https://lists.denx.de/pipermail/u-boot/2018-December/350666.html >>> >>> Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") >>> Reported-by: Daniel Evans <[email protected] <mailto:[email protected]>> >>> Cc: Robert Nelson <[email protected] <mailto:[email protected]>> >>> Cc: Eugen Hristev <[email protected] <mailto:[email protected]>> >>> Cc: Wenyou Yang <[email protected] <mailto:[email protected]>> >>> Signed-off-by: Derald D. Woods <[email protected] <mailto:[email protected]>> >>> --- >>> scripts/Makefile.spl | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl >>> index 22bd8f7c27..e727cb610f 100644 >>> --- a/scripts/Makefile.spl >>> +++ b/scripts/Makefile.spl >>> @@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") >>> MKIMAGEFLAGS_boot.bin = -T atmelimage >>> >>> ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) >>> +ifneq ($(CONFIG_SD_BOOT),y) >> >> Hi Derald, >> >> Thanks for your patch, however, I don't like that we do not use the >> CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER anymore... isn't this config >> supposed to say whether we are going to generate the header or not ? >> > > That is not what is happening with this patch. SPL_GENERATE_ATMEL_PMECC_HEADER > is not removed. The config still serves its orignal intent. If SD_BOOT > is configured, then NAND is not being used. In this non-NAND case, the > header is not needed. > >> Checking if "not sd-boot" doesn't look like a good option... we may use >> SPI boot or QSPI or some other type at some point and the issue will >> still be there. >> > > This location and method would work for those nod-NAND cases also. See > below. > >> I would rather fix the original patch by Wenyou, namely move the #ifdef >> below to not have the GENERATE_ATMEL_PMECC enabled for SDBOOT. >> >> Does this sound good for you? >> > > If this SPL_GENERATE_ATMEL_PMECC_HEADER only needs to be there for NAND, > why not guard the 'ifdef ($(CONFIG_NAND_BOOT,y))'? Would this be better? > Basically we could replace the 'ifneq ($(CONFIG_SD_BOOT),y)' with the > more appropriate 'ifeq ($(CONFIG_NAND_BOOT),y)'. This would actually > allow the future use-cases to be added as they become available and can > be shown to actually boot with the header applied. > > I will put together a proper version 2 of my patch later today. > > [patch v2] > ------------------------------------------------------------------------ > diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl > index 22bd8f7..e727cb6 100644 > --- a/scripts/Makefile.spl > +++ b/scripts/Makefile.spl > @@ -166,10 +166,12 @@ ifeq ($(CONFIG_SYS_SOC),"at91") > MKIMAGEFLAGS_boot.bin = -T atmelimage > > ifeq ($(CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER),y) > +ifeq ($(CONFIG_NAND_BOOT),y) > MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) > > boot.bin: $(obj)/../tools/atmel_pmecc_params > endif > +endif > > boot.bin: $(obj)/u-boot-spl.bin FORCE > $(call if_changed,mkimage) > ------------------------------------------------------------------------ > > This would allow other configurations to 'opt-in' to applying the > header. Which I think is the direction this is truly heading. My questions are : If we have configured CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER, then why the header is not being applied after your patch ? And why do we configure CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER if we do not wish the PMECC header in the image ? With your patch, why do we generate the PMECC header w.r.t. the configuration of NAND_BOOT and not CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER ? Or perhaps I am missing something on the purpose of CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER ? To quote from doc/README.atmel_pmecc : <quote> To enable the generation of atmel PMECC header for SPL one need to define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from board configuration and compiled into the host tools atmel_pmecc_params. This tool will be called in build process to parametrize mkimage for atmelimage type. The mkimage tool has intentionally _not_ compiled in those parameters. </quote> So I would expect CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER to generate the PMECC header if configured, and if this flag is not present, the PMECC header is not generated. I do expect that SD card booting configurations do not select this flag.The patch does _not_ remove
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERor change its purpose or overall role. Literally. It is a very simple patch that solves
a "no-boot" issue for at least sama5d3-xpld. I read the documents before my patch. This is a post-build tooling issue. Makefile.spl can leverage configs as they are naturally selected.
Quoted 4 lines
Quoted 1 line
Derald
Does the following change fix your problem ?
I am simply working on a proper solution. I have the SAMA5D3-XPLD board and use it occasionally. The original post to the mailing list simply peaked my interest. I had the board pinned at v2017.09 in my personal build environment for the same issue. I am just digging deeper this time around.
Quoted 15 lines
include/configs/sama5d3_xplained.h +1
-0@@ -80,6 +80,7 @@#elif CONFIG_NAND_BOOT #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE
include/configs/sama5d3_xplained.h line 93
Quoted 6 lines
include/configs/sama5d3_xplained.h +0
-1@@ -88,6 +89,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
I began looking into converting the following to Kconfig:
[scripts/config_whitelist.txt] (REMOVING ITEMS)
------------------------------------------------------------------------CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
------------------------------------------------------------------------
[arch/arm/mach-at91/Kconfig]
------------------------------------------------------------------------
config ATMEL_NAND_HWECC
bool "Atmel Hardware ECC"
default n
config ATMEL_NAND_HW_PMECC
bool "Atmel Programmable Multibit ECC (PMECC)"
select ATMEL_NAND_HWECC
default n
help
The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
config PMECC_CAP
int "PMECC Correctable ECC Bits"
depends on ATMEL_NAND_HW_PMECC
default 2
help
Correctable ECC bits, can be 2, 4, 8, 12, and 24.
config PMECC_SECTOR_SIZE
int "PMECC Sector Size"
depends on ATMEL_NAND_HW_PMECC default 512
help
Sector size, in bytes, can be 512 or 1024.
config SPL_GENERATE_ATMEL_PMECC_HEADER
bool "Atmel PMECC Header Generation"
select ATMEL_NAND_HWECC
select ATMEL_NAND_HW_PMECC
default n
help
Generate Programmable Multibit ECC (PMECC) header for SPL image.
------------------------------------------------------------------------
The issue is that the PMECC configuration items are used along with other NAND configuration items outside of a NAND_BOOT scenario. I would like to get the proper Kconfig selections up and running. This is just a start. I will not have any more time until this weekend. I will send another patch at that time.
Cheers,
Derald
Quoted 28 lines
Quoted 28 lines
> > Also, the SPL_GENERATE_ATMEL_PMECC_HEADER needs transitioning to > Kconfig. Having the logic in "Makefile.spl" would help with that work > too. > > Derald > > >> Thanks again, >> >> Eugen >> >>> MKIMAGEFLAGS_boot.bin += -n $(shell $(obj)/../tools/atmel_pmecc_params) >>> >>> boot.bin: $(obj)/../tools/atmel_pmecc_params >>> endif >>> +endif >>> >>> boot.bin: $(obj)/u-boot-spl.bin FORCE >>> $(call if_changed,mkimage) >>> >
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
This commit converts the following items to Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html
--- configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 3 ++ configs/at91sam9n12ek_spiflash_defconfig | 3 ++ configs/at91sam9x5ek_dataflash_defconfig | 3 ++ configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 3 ++ configs/at91sam9x5ek_spiflash_defconfig | 3 ++ configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 3 ++ configs/sama5d3xek_spiflash_defconfig | 3 ++ configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 3 ++ configs/sama5d4_xplained_spiflash_defconfig | 3 ++ configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 3 ++ configs/sama5d4ek_spiflash_defconfig | 3 ++ configs/wb45n_defconfig | 3 ++ configs/wb50n_defconfig | 3 ++ doc/README.atmel_pmecc | 13 ++++--- drivers/mtd/nand/raw/Kconfig | 38 ++++++++++++++++++++ include/configs/at91sam9n12ek.h | 7 ---- include/configs/at91sam9x5ek.h | 7 ---- include/configs/sama5d3_xplained.h | 7 ---- include/configs/sama5d3xek.h | 7 ---- include/configs/sama5d4_xplained.h | 6 ---- include/configs/sama5d4ek.h | 6 ---- include/configs/wb45n.h | 7 ---- include/configs/wb50n.h | 6 ---- scripts/config_whitelist.txt | 5 --- 31 files changed, 92 insertions(+), 65 deletions(-)
configs/at91sam9n12ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9n12ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9n12ek_spiflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_dataflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_spiflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/sama5d3_xplained_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3_xplained_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_spiflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_spiflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_spiflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/wb45n_defconfig +3 -0
@@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB45N=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/wb50n_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB50N=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
doc/README.atmel_pmecc +6 -7
@@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. It only can be 512 or 1024. -Take AT91SAM9X5EK as an example, the board definition file likes: +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board +configuration file has the following entries: -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 + CONFIG_PMECC_CAP=2 + CONFIG_PMECC_SECTOR_SIZE=512 + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y How to enable PMECC header for direct programmable boot.bin -----------------------------------------------------------
@@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to look like. In order to do so we have a new image type added to mkimage to generate this PMECC header and integrated this into the build process of SPL. -To enable the generation of atmel PMECC header for SPL one need to define +To enable the generation of atmel PMECC header for SPL one needs to define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from board configuration and compiled into the host tools atmel_pmecc_params. This tool will be called in build process to parametrize mkimage for atmelimage
drivers/mtd/nand/raw/Kconfig +38 -0
@@ -16,6 +16,44 @@ config NAND_ATMEL Enable this driver for NAND flash platforms using an Atmel NAND controller. +if NAND_ATMEL + +config ATMEL_NAND_HWECC + bool "Atmel Hardware ECC" + default n + +config ATMEL_NAND_HW_PMECC + bool "Atmel Programmable Multibit ECC (PMECC)" + select ATMEL_NAND_HWECC + default n + help + The Programmable Multibit ECC (PMECC) controller is a programmable + binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. + +config PMECC_CAP + int "PMECC Correctable ECC Bits" + depends on ATMEL_NAND_HW_PMECC + default 2 + help + Correctable ECC bits, can be 2, 4, 8, 12, and 24. + +config PMECC_SECTOR_SIZE + int "PMECC Sector Size" + depends on ATMEL_NAND_HW_PMECC + default 512 + help + Sector size, in bytes, can be 512 or 1024. + +config SPL_GENERATE_ATMEL_PMECC_HEADER + bool "Atmel PMECC Header Generation" + select ATMEL_NAND_HWECC + select ATMEL_NAND_HW_PMECC + default n + help + Generate Programmable Multibit ECC (PMECC) header for SPL image. + +endif + config NAND_DAVINCI bool "Support TI Davinci NAND controller" help
include/configs/at91sam9n12ek.h +0 -7
@@ -59,12 +59,6 @@#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
@@ -177,6 +171,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/at91sam9x5ek.h +0 -7
@@ -55,12 +55,6 @@#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -/* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD
@@ -151,6 +145,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d3_xplained.h +0 -7
@@ -43,14 +43,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
@@ -88,6 +82,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d3xek.h +0 -7
@@ -62,14 +62,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW
@@ -109,6 +103,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d4_xplained.h +0 -6
@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */
@@ -64,8 +61,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
@@ -73,6 +68,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d4ek.h +0 -6
@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */
@@ -63,8 +60,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
@@ -72,6 +67,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/wb45n.h +0 -7
@@ -48,12 +48,6 @@#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_RBTREE #define CONFIG_LZO
@@ -141,6 +135,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif /* __CONFIG_H__ */
include/configs/wb50n.h +0 -6
@@ -57,11 +57,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512/* Ethernet Hardware */ #define CONFIG_MACB
@@ -118,6 +113,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
scripts/config_whitelist.txt +0 -5
@@ -97,8 +97,6 @@ CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_ATMEL_LEGACY CONFIG_ATMEL_MCI_8BIT -CONFIG_ATMEL_NAND_HWECC -CONFIG_ATMEL_NAND_HW_PMECC CONFIG_ATMEL_SPI0 CONFIG_AT_TRANS CONFIG_AUTO_ZRELADDR
@@ -1509,8 +1507,6 @@ CONFIG_PLATINUM_PROJECT CONFIG_PM CONFIG_PMC_BR_PRELIM CONFIG_PMC_OR_PRELIM -CONFIG_PMECC_CAP -CONFIG_PMECC_SECTOR_SIZE CONFIG_PME_PLAT_CLK_DIV CONFIG_PMU CONFIG_PMW_BASE
@@ -1875,7 +1871,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_JR0_LIODN_NS CONFIG_SPL_JR0_LIODN_S
Signature · 1 line
2.20.0
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 12 lines · Derald D. Woods
This commit converts the following items to
Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
Quoted 9 lines
[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONSassignment")
Reported-by Daniel Evans <[email protected]>Cc Eugen Hristev <[email protected]>Signed-off-by Derald D. Woods <[email protected]>
Any concerns about this Kconfig conversion?
Derald
Quoted 652 lines
--- configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 3 ++ configs/at91sam9n12ek_spiflash_defconfig | 3 ++ configs/at91sam9x5ek_dataflash_defconfig | 3 ++ configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 3 ++ configs/at91sam9x5ek_spiflash_defconfig | 3 ++ configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 3 ++ configs/sama5d3xek_spiflash_defconfig | 3 ++ configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 3 ++ configs/sama5d4_xplained_spiflash_defconfig | 3 ++ configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 3 ++ configs/sama5d4ek_spiflash_defconfig | 3 ++ configs/wb45n_defconfig | 3 ++ configs/wb50n_defconfig | 3 ++ doc/README.atmel_pmecc | 13 ++++--- drivers/mtd/nand/raw/Kconfig | 38 ++++++++++++++++++++ include/configs/at91sam9n12ek.h | 7 ---- include/configs/at91sam9x5ek.h | 7 ---- include/configs/sama5d3_xplained.h | 7 ---- include/configs/sama5d3xek.h | 7 ---- include/configs/sama5d4_xplained.h | 6 ---- include/configs/sama5d4ek.h | 6 ---- include/configs/wb45n.h | 7 ---- include/configs/wb50n.h | 6 ---- scripts/config_whitelist.txt | 5 --- 31 files changed, 92 insertions(+), 65 deletions(-)configs/at91sam9n12ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9n12ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9n12ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9x5ek_dataflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9x5ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9x5ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9x5ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/sama5d3_xplained_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d3_xplained_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d3xek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d3xek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d3xek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4_xplained_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4_xplained_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4_xplained_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/wb45n_defconfig +3
-0@@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB45N=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/wb50n_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB50N=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=ydoc/README.atmel_pmecc +5
-6@@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. It only can be 512 or 1024. -Take AT91SAM9X5EK as an example, the board definition file likes: +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board +configuration file has the following entries: -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 + CONFIG_PMECC_CAP=2 + CONFIG_PMECC_SECTOR_SIZE=512 + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y How to enable PMECC header for direct programmable boot.bin -----------------------------------------------------------@@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how thisPMECC header has to
look like. In order to do so we have a new image type added to mkimage to generate this PMECC header and integrated this into the build process of
SPL.doc/README.atmel_pmecc +1
-1-To enable the generation of atmel PMECC header for SPL one need to define +To enable the generation of atmel PMECC header for SPL one needs to define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are takenfrom
board configuration and compiled into the host toolsatmel_pmecc_params.
This
tool will be called in build process to parametrize mkimage for atmelimagedrivers/mtd/nand/raw/Kconfig +12
-0@@ -16,6 +16,44 @@ config NAND_ATMEL Enable this driver for NAND flash platforms using an Atmel NAND controller. +if NAND_ATMEL + +config ATMEL_NAND_HWECC + bool "Atmel Hardware ECC" + default n + +config ATMEL_NAND_HW_PMECC + bool "Atmel Programmable Multibit ECC (PMECC)" + select ATMEL_NAND_HWECC + default n + help + The Programmable Multibit ECC (PMECC) controller is aprogrammable
drivers/mtd/nand/raw/Kconfig +26
-0+ binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. + +config PMECC_CAP + int "PMECC Correctable ECC Bits" + depends on ATMEL_NAND_HW_PMECC + default 2 + help + Correctable ECC bits, can be 2, 4, 8, 12, and 24. + +config PMECC_SECTOR_SIZE + int "PMECC Sector Size" + depends on ATMEL_NAND_HW_PMECC + default 512 + help + Sector size, in bytes, can be 512 or 1024. + +config SPL_GENERATE_ATMEL_PMECC_HEADER + bool "Atmel PMECC Header Generation" + select ATMEL_NAND_HWECC + select ATMEL_NAND_HW_PMECC + default n + help + Generate Programmable Multibit ECC (PMECC) header for SPL image. + +endif + config NAND_DAVINCI bool "Support TI Davinci NAND controller" helpinclude/configs/at91sam9n12ek.h +0
-6@@ -59,12 +59,6 @@#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"\include/configs/at91sam9n12ek.h +0
-1@@ -177,6 +171,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/at91sam9x5ek.h +0
-7@@ -55,12 +55,6 @@#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -/* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD @@ -151,6 +145,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d3_xplained.h +0
-7@@ -43,14 +43,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_UPLL @@ -88,6 +82,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d3xek.h +0
-7@@ -62,14 +62,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW @@ -109,6 +103,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d4_xplained.h +0
-6@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */ @@ -64,8 +61,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000@@ -73,6 +68,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d4ek.h +0
-6@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */ @@ -63,8 +60,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000@@ -72,6 +67,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/wb45n.h +0
-7@@ -48,12 +48,6 @@#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_RBTREE #define CONFIG_LZO @@ -141,6 +135,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif /* __CONFIG_H__ */ include/configs/wb50n.h +0
-6@@ -57,11 +57,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512/* Ethernet Hardware */ #define CONFIG_MACB @@ -118,6 +113,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif scripts/config_whitelist.txt +0
-6@@ -97,8 +97,6 @@ CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_ATMEL_LEGACY CONFIG_ATMEL_MCI_8BIT -CONFIG_ATMEL_NAND_HWECC -CONFIG_ATMEL_NAND_HW_PMECC CONFIG_ATMEL_SPI0 CONFIG_AT_TRANS CONFIG_AUTO_ZRELADDR@@ -1509,8 +1507,6 @@ CONFIG_PLATINUM_PROJECT CONFIG_PM CONFIG_PMC_BR_PRELIM CONFIG_PMC_OR_PRELIM -CONFIG_PMECC_CAP -CONFIG_PMECC_SECTOR_SIZE CONFIG_PME_PLAT_CLK_DIV CONFIG_PMU CONFIG_PMW_BASE@@ -1875,7 +1871,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_JR0_LIODN_NS CONFIG_SPL_JR0_LIODN_S --2.20.0
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
In reply to Derald D. WoodsHi Derald,
Thank you for the patch,
Some minor questions inline.
Quoted 84 lines · Derald D. Woods
This commit converts the following items to
Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")Reported-by Daniel Evans <[email protected]>Cc Eugen Hristev <[email protected]>Signed-off-by Derald D. Woods <[email protected]>--- configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 3 ++ configs/at91sam9n12ek_spiflash_defconfig | 3 ++ configs/at91sam9x5ek_dataflash_defconfig | 3 ++ configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 3 ++ configs/at91sam9x5ek_spiflash_defconfig | 3 ++ configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 3 ++ configs/sama5d3xek_spiflash_defconfig | 3 ++ configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 3 ++ configs/sama5d4_xplained_spiflash_defconfig | 3 ++ configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 3 ++ configs/sama5d4ek_spiflash_defconfig | 3 ++ configs/wb45n_defconfig | 3 ++ configs/wb50n_defconfig | 3 ++ doc/README.atmel_pmecc | 13 ++++--- drivers/mtd/nand/raw/Kconfig | 38 ++++++++++++++++++++ include/configs/at91sam9n12ek.h | 7 ---- include/configs/at91sam9x5ek.h | 7 ---- include/configs/sama5d3_xplained.h | 7 ---- include/configs/sama5d3xek.h | 7 ---- include/configs/sama5d4_xplained.h | 6 ---- include/configs/sama5d4ek.h | 6 ---- include/configs/wb45n.h | 7 ---- include/configs/wb50n.h | 6 ---- scripts/config_whitelist.txt | 5 --- 31 files changed, 92 insertions(+), 65 deletions(-)configs/at91sam9n12ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9n12ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9n12ek_spiflash_defconfig +0
-0
configs/at91sam9n12ek_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 6 lines
configs/at91sam9n12ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
Do we need to generate the PMECC header for SPI_BOOT configurations ? I would say this would be required only for NAND_BOOT
Quoted 48 lines
configs/at91sam9n12ek_spiflash_defconfig +0
-0CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9x5ek_dataflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9x5ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9x5ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/at91sam9x5ek_spiflash_defconfig +0
-0
configs/at91sam9x5ek_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 6 lines
configs/at91sam9x5ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
Ditto.
Quoted 60 lines
configs/at91sam9x5ek_spiflash_defconfig +0
-0CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200configs/sama5d3_xplained_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d3_xplained_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d3xek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d3xek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d3xek_spiflash_defconfig +0
-0
configs/sama5d3xek_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 6 lines
configs/sama5d3xek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
Ditto
Quoted 34 lines
configs/sama5d3xek_spiflash_defconfig +0
-0CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4_xplained_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4_xplained_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4_xplained_spiflash_defconfig +0
-0
configs/sama5d4_xplained_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 6 lines
configs/sama5d4_xplained_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
Ditto
Quoted 34 lines
configs/sama5d4_xplained_spiflash_defconfig +0
-0CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/sama5d4ek_spiflash_defconfig +0
-0
configs/sama5d4ek_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 6 lines
configs/sama5d4ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
Ditto
Quoted 192 lines
configs/sama5d4ek_spiflash_defconfig +0
-0CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/wb45n_defconfig +3
-0@@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB45N=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/wb50n_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB50N=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=ydoc/README.atmel_pmecc +6
-7@@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. It only can be 512 or 1024. -Take AT91SAM9X5EK as an example, the board definition file likes: +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board +configuration file has the following entries: -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 + CONFIG_PMECC_CAP=2 + CONFIG_PMECC_SECTOR_SIZE=512 + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y How to enable PMECC header for direct programmable boot.bin -----------------------------------------------------------@@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to look like. In order to do so we have a new image type added to mkimage to generate this PMECC header and integrated this into the build process of SPL. -To enable the generation of atmel PMECC header for SPL one need to define +To enable the generation of atmel PMECC header for SPL one needs to define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from board configuration and compiled into the host tools atmel_pmecc_params. This tool will be called in build process to parametrize mkimage for atmelimagedrivers/mtd/nand/raw/Kconfig +38
-0@@ -16,6 +16,44 @@ config NAND_ATMEL Enable this driver for NAND flash platforms using an Atmel NAND controller. +if NAND_ATMEL + +config ATMEL_NAND_HWECC + bool "Atmel Hardware ECC" + default n + +config ATMEL_NAND_HW_PMECC + bool "Atmel Programmable Multibit ECC (PMECC)" + select ATMEL_NAND_HWECC + default n + help + The Programmable Multibit ECC (PMECC) controller is a programmable + binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. + +config PMECC_CAP + int "PMECC Correctable ECC Bits" + depends on ATMEL_NAND_HW_PMECC + default 2 + help + Correctable ECC bits, can be 2, 4, 8, 12, and 24. + +config PMECC_SECTOR_SIZE + int "PMECC Sector Size" + depends on ATMEL_NAND_HW_PMECC + default 512 + help + Sector size, in bytes, can be 512 or 1024. + +config SPL_GENERATE_ATMEL_PMECC_HEADER + bool "Atmel PMECC Header Generation" + select ATMEL_NAND_HWECC + select ATMEL_NAND_HW_PMECC + default n + help + Generate Programmable Multibit ECC (PMECC) header for SPL image. + +endif + config NAND_DAVINCI bool "Support TI Davinci NAND controller" helpinclude/configs/at91sam9n12ek.h +0
-7@@ -59,12 +59,6 @@#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \@@ -177,6 +171,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/at91sam9x5ek.h +0
-7@@ -55,12 +55,6 @@#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -/* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD @@ -151,6 +145,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d3_xplained.h +0
-7@@ -43,14 +43,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_UPLL @@ -88,6 +82,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d3xek.h +0
-0@@ -62,14 +62,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
include/configs/sama5d3xek.h line 72
Quoted 10 lines
include/configs/sama5d3xek.h +0
-6#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -
Unrelated change ?
Quoted 148 lines
include/configs/sama5d3xek.h +0
-1#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW @@ -109,6 +103,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d4_xplained.h +0
-6@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */ @@ -64,8 +61,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000@@ -73,6 +68,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d4ek.h +0
-6@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */ @@ -63,8 +60,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000@@ -72,6 +67,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/wb45n.h +0
-7@@ -48,12 +48,6 @@#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_RBTREE #define CONFIG_LZO @@ -141,6 +135,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif /* __CONFIG_H__ */ include/configs/wb50n.h +0
-6@@ -57,11 +57,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512/* Ethernet Hardware */ #define CONFIG_MACB @@ -118,6 +113,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif scripts/config_whitelist.txt +0
-5@@ -97,8 +97,6 @@ CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_ATMEL_LEGACY CONFIG_ATMEL_MCI_8BIT -CONFIG_ATMEL_NAND_HWECC -CONFIG_ATMEL_NAND_HW_PMECC CONFIG_ATMEL_SPI0 CONFIG_AT_TRANS CONFIG_AUTO_ZRELADDR@@ -1509,8 +1507,6 @@ CONFIG_PLATINUM_PROJECT CONFIG_PM CONFIG_PMC_BR_PRELIM CONFIG_PMC_OR_PRELIM -CONFIG_PMECC_CAP -CONFIG_PMECC_SECTOR_SIZE CONFIG_PME_PLAT_CLK_DIV CONFIG_PMU CONFIG_PMW_BASE@@ -1875,7 +1871,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_JR0_LIODN_NS CONFIG_SPL_JR0_LIODN_S
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 6 lines · On Mon, Jan 7, 2019 at 3:40 AM <[email protected]> wrote:
Hi Derald,
Thank you for the patch,
Some minor questions inline.
Sorry for the late response. Family and day job take priority.
The patch is the simplest technical conversion that I could produce with my board (SAMA5D3-XPLD) as the test platform. I was very careful not to touch anything unrelated. It is not intended to address permutations outside of the PMECC Kconfig scope. I have submitted these type of conversions to U-Boot in the past. Adding speculative things is risky when you only have one development board. The patch works well, for me, and addresses the original need. All items, in the patch, are currently in scope. If there are additions and/or modifications, feel free to modify the patch. It is complete from my perspective. I do not have any additional time to chase this any further. I have been developing for some time now and can handle an 'out of tree' patch, in my environment, until something better comes along. This patch is just my contribution to the process.
Cheers,
Derald
Quoted 695 lines · Derald D. Woods
Quoted 8 lines
This commit converts the following items to
Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERQuoted 8 lines
[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONSassignment")
Quoted 37 lines
Reported-by Daniel Evans <[email protected]>Cc Eugen Hristev <[email protected]>Signed-off-by Derald D. Woods <[email protected]>--- configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 3 ++ configs/at91sam9n12ek_spiflash_defconfig | 3 ++ configs/at91sam9x5ek_dataflash_defconfig | 3 ++ configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 3 ++ configs/at91sam9x5ek_spiflash_defconfig | 3 ++ configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 3 ++ configs/sama5d3xek_spiflash_defconfig | 3 ++ configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 3 ++ configs/sama5d4_xplained_spiflash_defconfig | 3 ++ configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 3 ++ configs/sama5d4ek_spiflash_defconfig | 3 ++ configs/wb45n_defconfig | 3 ++ configs/wb50n_defconfig | 3 ++ doc/README.atmel_pmecc | 13 ++++--- drivers/mtd/nand/raw/Kconfig | 38 ++++++++++++++++++++ include/configs/at91sam9n12ek.h | 7 ---- include/configs/at91sam9x5ek.h | 7 ---- include/configs/sama5d3_xplained.h | 7 ---- include/configs/sama5d3xek.h | 7 ---- include/configs/sama5d4_xplained.h | 6 ---- include/configs/sama5d4ek.h | 6 ---- include/configs/wb45n.h | 7 ---- include/configs/wb50n.h | 6 ---- scripts/config_whitelist.txt | 5 --- 31 files changed, 92 insertions(+), 65 deletions(-)Review
Quoted 1 line
(quoted diff) +0
-0b/configs/at91sam9n12ek_mmc_defconfig
Review
Quoted 12 lines
index
6b2cfe9c42..7b46eb498d100644configs/at91sam9n12ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200(quoted diff) +0
-0b/configs/at91sam9n12ek_nandflash_defconfig
Review
Quoted 14 lines
index
354c24ff16..4e34a517fd100644configs/at91sam9n12ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200(quoted diff) +0
-0b/configs/at91sam9n12ek_spiflash_defconfig
configs/at91sam9n12ek_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 10 lines
index
63889355bf..500c3ab088100644configs/at91sam9n12ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=yDo we need to generate the PMECC header for
SPI_BOOTconfigurations ? I would say this would be required only forNAND_BOOTReview
Quoted 4 lines
configs/at91sam9n12ek_spiflash_defconfig +0
-0CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200(quoted diff) +0
-0b/configs/at91sam9x5ek_dataflash_defconfig
Review
Quoted 14 lines
index
dc13509715..60d865cc23100644configs/at91sam9x5ek_dataflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200(quoted diff) +0
-0b/configs/at91sam9x5ek_mmc_defconfig
Review
Quoted 12 lines
index
ff86f93e61..75f7fbd199100644configs/at91sam9x5ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200(quoted diff) +0
-0b/configs/at91sam9x5ek_nandflash_defconfig
Review
Quoted 14 lines
index
b2b3ddb6d9..dd6bdee7f9100644configs/at91sam9x5ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200(quoted diff) +0
-0b/configs/at91sam9x5ek_spiflash_defconfig
configs/at91sam9x5ek_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 10 lines
index
d0eebcdc75..8d8108888c100644configs/at91sam9x5ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=yDitto.
Review
Quoted 4 lines
configs/at91sam9x5ek_spiflash_defconfig +0
-0CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200(quoted diff) +0
-0b/configs/sama5d3_xplained_mmc_defconfig
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Quoted 12 lines
index
eab38ec366..51d5aeaf0e100644configs/sama5d3_xplained_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d3_xplained_nandflash_defconfig
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Quoted 14 lines
index
ff7d2bffdd..ce1f28607e100644configs/sama5d3_xplained_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d3xek_mmc_defconfig
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Quoted 12 lines
index
6faea0ec3f..49d4334213100644configs/sama5d3xek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d3xek_nandflash_defconfig
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Quoted 14 lines
index
e641279ee1..b0d56e0e3e100644configs/sama5d3xek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d3xek_spiflash_defconfig
configs/sama5d3xek_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 10 lines
index
37f603d528..cf2fb9e65b100644configs/sama5d3xek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=yDitto
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Quoted 4 lines
configs/sama5d3xek_spiflash_defconfig +0
-0CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d4_xplained_mmc_defconfig
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Quoted 12 lines
index
bfcea3f519..35b8302b60100644configs/sama5d4_xplained_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d4_xplained_nandflash_defconfig
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Quoted 14 lines
index
2c1b7f17c0..93714ed0c7100644configs/sama5d4_xplained_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d4_xplained_spiflash_defconfig
configs/sama5d4_xplained_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 10 lines
index
a89dd11a8c..e1eb0c72cd100644configs/sama5d4_xplained_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=yDitto
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Quoted 4 lines
configs/sama5d4_xplained_spiflash_defconfig +0
-0CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d4ek_mmc_defconfig
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Quoted 12 lines
index
45e6539913..bd238f7f14100644configs/sama5d4ek_mmc_defconfig +1
-0@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d4ek_nandflash_defconfig
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Quoted 14 lines
index 1497110452..3816bfb273 100644
configs/sama5d4ek_nandflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y(quoted diff) +0
-0b/configs/sama5d4ek_spiflash_defconfig
configs/sama5d4ek_spiflash_defconfig CONFIG_ARM=y · line 7
Quoted 10 lines
index
dad32b5711..242081e6a1100644configs/sama5d4ek_spiflash_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=yDitto
doc/README.atmel_pmecc sama5d3 SoC spec (as of 03. April 2014) defines how
Quoted 55 lines
configs/sama5d4ek_spiflash_defconfig +0
-0CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/wb45n_defconfig +3
-0@@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB45N=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=yconfigs/wb50n_defconfig +3
-0@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB50N=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=ydoc/README.atmel_pmecc +5
-6@@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. It only can be 512 or 1024. -Take AT91SAM9X5EK as an example, the board definition file likes: +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board +configuration file has the following entries: -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 + CONFIG_PMECC_CAP=2 + CONFIG_PMECC_SECTOR_SIZE=512 + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y How to enable PMECC header for direct programmable boot.bin -----------------------------------------------------------@@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines howthis PMECC header has to
doc/README.atmel_pmecc sama5d3 SoC spec (as of 03. April 2014) defines how · line 39
Quoted 1 line
doc/README.atmel_pmecc +0
-0look like. In order to do so we have a new image type added to mkimageto
doc/README.atmel_pmecc sama5d3 SoC spec (as of 03. April 2014) defines how · line 40
Quoted 1 line
doc/README.atmel_pmecc +0
-0generate this PMECC header and integrated this into the build processof SPL.
doc/README.atmel_pmecc sama5d3 SoC spec (as of 03. April 2014) defines how · line 42
Quoted 2 lines
doc/README.atmel_pmecc +0
-1-To enable the generation of atmel PMECC header for SPL one need todefine
doc/README.atmel_pmecc sama5d3 SoC spec (as of 03. April 2014) defines how · line 41
Quoted 1 line
doc/README.atmel_pmecc +1
-0+To enable the generation of atmel PMECC header for SPL one needs todefine
doc/README.atmel_pmecc sama5d3 SoC spec (as of 03. April 2014) defines how · line 42
Quoted 1 line
doc/README.atmel_pmecc +0
-0CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters aretaken from
doc/README.atmel_pmecc sama5d3 SoC spec (as of 03. April 2014) defines how · line 43
Quoted 1 line
doc/README.atmel_pmecc +0
-0board configuration and compiled into the host tools
atmel_pmecc_params. Thisdoc/README.atmel_pmecc sama5d3 SoC spec (as of 03. April 2014) defines how · line 44
Quoted 1 line
doc/README.atmel_pmecc +0
-0tool will be called in build process to parametrize mkimage foratmelimage
Quoted 10 lines
drivers/mtd/nand/raw/Kconfig +2
-0@@ -16,6 +16,44 @@ config NAND_ATMEL Enable this driver for NAND flash platforms using an Atmel NAND controller. +if NAND_ATMEL +drivers/mtd/nand/raw/Kconfig config NAND_ATMEL · line 30
Quoted 10 lines
drivers/mtd/nand/raw/Kconfig +10
-0+config ATMEL_NAND_HWECC + bool "Atmel Hardware ECC" + default n + +config ATMEL_NAND_HW_PMECC + bool "Atmel Programmable Multibit ECC (PMECC)" + select ATMEL_NAND_HWECC + default n + help + The Programmable Multibit ECC (PMECC) controller is aprogrammable
Review
Quoted 30 lines
drivers/mtd/nand/raw/Kconfig +26
-0+ binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. + +config PMECC_CAP + int "PMECC Correctable ECC Bits" + depends on ATMEL_NAND_HW_PMECC + default 2 + help + Correctable ECC bits, can be 2, 4, 8, 12, and 24. + +config PMECC_SECTOR_SIZE + int "PMECC Sector Size" + depends on ATMEL_NAND_HW_PMECC + default 512 + help + Sector size, in bytes, can be 512 or 1024. + +config SPL_GENERATE_ATMEL_PMECC_HEADER + bool "Atmel PMECC Header Generation" + select ATMEL_NAND_HWECC + select ATMEL_NAND_HW_PMECC + default n + help + Generate Programmable Multibit ECC (PMECC) header for SPL image. + +endif + config NAND_DAVINCI bool "Support TI Davinci NAND controller" help(quoted diff) +0
-0
b/include/configs/at91sam9n12ek.hQuoted 4 lines
index
6cd267eee6..777a99b730100644include/configs/at91sam9n12ek.h line 62
Quoted 10 lines
include/configs/at91sam9n12ek.h +0
-6@@ -59,12 +59,6 @@#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_EXTRA_ENV_SETTINGS \
include/configs/at91sam9n12ek.h line 64
Quoted 2 lines
include/configs/at91sam9n12ek.h +0
-0"console=console=ttyS0,115200\0" \"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \Review
Quoted 8 lines
include/configs/at91sam9n12ek.h +0
-1@@ -177,6 +171,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif (quoted diff) +0
-0
b/include/configs/at91sam9x5ek.hReview
Quoted 24 lines
index
63305a7cdd..6adb965c3c100644include/configs/at91sam9x5ek.h +0
-7@@ -55,12 +55,6 @@#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -/* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD @@ -151,6 +145,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif (quoted diff) +0
-0
b/include/configs/sama5d3_xplained.hQuoted 31 lines
index
d0d8087ca3..8a9a19d38e100644include/configs/sama5d3_xplained.h +0
-7@@ -43,14 +43,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_UPLL @@ -88,6 +82,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d3xek.h +0
-0@@ -62,14 +62,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)include/configs/sama5d3xek.h line 72
Quoted 10 lines
include/configs/sama5d3xek.h +0
-6#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -Unrelated change ?
Review
Quoted 11 lines
include/configs/sama5d3xek.h +0
-1#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW @@ -109,6 +103,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif (quoted diff) +0
-0
b/include/configs/sama5d4_xplained.hQuoted 137 lines
index
7f8ac178f3..bbb16993ec100644include/configs/sama5d4_xplained.h +0
-6@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */ @@ -64,8 +61,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000@@ -73,6 +68,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/sama5d4ek.h +0
-6@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */ @@ -63,8 +60,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000@@ -72,6 +67,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif include/configs/wb45n.h +0
-7@@ -48,12 +48,6 @@#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_RBTREE #define CONFIG_LZO @@ -141,6 +135,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif /* __CONFIG_H__ */ include/configs/wb50n.h +0
-6@@ -57,11 +57,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512/* Ethernet Hardware */ #define CONFIG_MACB @@ -118,6 +113,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif scripts/config_whitelist.txt +0
-5@@ -97,8 +97,6 @@ CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_ATMEL_LEGACY CONFIG_ATMEL_MCI_8BIT -CONFIG_ATMEL_NAND_HWECC -CONFIG_ATMEL_NAND_HW_PMECC CONFIG_ATMEL_SPI0 CONFIG_AT_TRANS CONFIG_AUTO_ZRELADDR@@ -1509,8 +1507,6 @@ CONFIG_PLATINUM_PROJECT CONFIG_PM CONFIG_PMC_BR_PRELIM CONFIG_PMC_OR_PRELIM -CONFIG_PMECC_CAP -CONFIG_PMECC_SECTOR_SIZE CONFIG_PME_PLAT_CLK_DIV CONFIG_PMU CONFIG_PMW_BASE@@ -1875,7 +1871,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_JR0_LIODN_NS CONFIG_SPL_JR0_LIODN_S
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 13 lines · Derald Woods
On Mon, Jan 7, 2019 at 3:40 AM <[email protected] <mailto:[email protected]>> wrote:
Hi Derald,
Thank you for the patch,
Some minor questions inline.
Sorry for the late response. Family and day job take priority.
Quoted 13 lines
The patch is the simplest technical conversion that I could produce with my board (SAMA5D3-XPLD) as the test platform. I was very careful not to touch anything unrelated. It is not intended to address permutations outside of the PMECC
Kconfigscope. I have submitted these type of conversions to U-Boot in the past. Adding speculative things is risky when you only have one development board. The patch works well, for me, and addresses the original need. All items, in the patch, are currently in scope. If there are additions and/or modifications, feel free to modify the patch. It is complete from my perspective. I do not have any additional time to chase this any further. I have been developing for some time now and can handle an 'out of tree' patch, in my environment, until something better comes along. This patch is just my contribution to the process.
Hello Derald,
From my point of view the PMECC header generation for SPL should be
done if and only if the SPL is being placed in NAND flash namely defconfigs having *nandflash* in the name.
Thus I disagree with enabling it on spiflash configurations (like you did for the *mmc* configurations looks OK)
If you have any reasons or arguments , or anyone else does, please correct me.
If you do not have time to change the patch, that is OK, I can take over at some point when I have the time or someone else can pick and rework a little bit on that specific point and make a v2.
Thanks again,
Eugen
Quoted 714 lines
Cheers,
Derald
On 15.12.2018 09:36, Derald D. Woods wrote: > This commit converts the following items to Kconfig: > > CONFIG_ATMEL_NAND_HWECC > CONFIG_ATMEL_NAND_HW_PMECC > CONFIG_PMECC_CAP > CONFIG_PMECC_SECTOR_SIZE > CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > [PMECC References] > https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure > https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap > > [Mailing List Thread] > https://lists.denx.de/pipermail/u-boot/2018-December/350666.html > > Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") > Reported-by: Daniel Evans <[email protected] <mailto:[email protected]>> > Cc: Eugen Hristev <[email protected] <mailto:[email protected]>> > Signed-off-by: Derald D. Woods <[email protected] <mailto:[email protected]>> > --- > configs/at91sam9n12ek_mmc_defconfig | 1 + > configs/at91sam9n12ek_nandflash_defconfig | 3 ++ > configs/at91sam9n12ek_spiflash_defconfig | 3 ++ > configs/at91sam9x5ek_dataflash_defconfig | 3 ++ > configs/at91sam9x5ek_mmc_defconfig | 1 + > configs/at91sam9x5ek_nandflash_defconfig | 3 ++ > configs/at91sam9x5ek_spiflash_defconfig | 3 ++ > configs/sama5d3_xplained_mmc_defconfig | 1 + > configs/sama5d3_xplained_nandflash_defconfig | 3 ++ > configs/sama5d3xek_mmc_defconfig | 1 + > configs/sama5d3xek_nandflash_defconfig | 3 ++ > configs/sama5d3xek_spiflash_defconfig | 3 ++ > configs/sama5d4_xplained_mmc_defconfig | 1 + > configs/sama5d4_xplained_nandflash_defconfig | 3 ++ > configs/sama5d4_xplained_spiflash_defconfig | 3 ++ > configs/sama5d4ek_mmc_defconfig | 1 + > configs/sama5d4ek_nandflash_defconfig | 3 ++ > configs/sama5d4ek_spiflash_defconfig | 3 ++ > configs/wb45n_defconfig | 3 ++ > configs/wb50n_defconfig | 3 ++ > doc/README.atmel_pmecc | 13 ++++--- > drivers/mtd/nand/raw/Kconfig | 38 ++++++++++++++++++++ > include/configs/at91sam9n12ek.h | 7 ---- > include/configs/at91sam9x5ek.h | 7 ---- > include/configs/sama5d3_xplained.h | 7 ---- > include/configs/sama5d3xek.h | 7 ---- > include/configs/sama5d4_xplained.h | 6 ---- > include/configs/sama5d4ek.h | 6 ---- > include/configs/wb45n.h | 7 ---- > include/configs/wb50n.h | 6 ---- > scripts/config_whitelist.txt | 5 --- > 31 files changed, 92 insertions(+), 65 deletions(-) > > diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig > index 6b2cfe9c42..7b46eb498d 100644 > --- a/configs/at91sam9n12ek_mmc_defconfig > +++ b/configs/at91sam9n12ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig > index 354c24ff16..4e34a517fd 100644 > --- a/configs/at91sam9n12ek_nandflash_defconfig > +++ b/configs/at91sam9n12ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig > index 63889355bf..500c3ab088 100644 > --- a/configs/at91sam9n12ek_spiflash_defconfig > +++ b/configs/at91sam9n12ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Do we need to generate the PMECC header for SPI_BOOT configurations ? I would say this would be required only for NAND_BOOT > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig > index dc13509715..60d865cc23 100644 > --- a/configs/at91sam9x5ek_dataflash_defconfig > +++ b/configs/at91sam9x5ek_dataflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig > index ff86f93e61..75f7fbd199 100644 > --- a/configs/at91sam9x5ek_mmc_defconfig > +++ b/configs/at91sam9x5ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig > index b2b3ddb6d9..dd6bdee7f9 100644 > --- a/configs/at91sam9x5ek_nandflash_defconfig > +++ b/configs/at91sam9x5ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig > index d0eebcdc75..8d8108888c 100644 > --- a/configs/at91sam9x5ek_spiflash_defconfig > +++ b/configs/at91sam9x5ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto. > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig > index eab38ec366..51d5aeaf0e 100644 > --- a/configs/sama5d3_xplained_mmc_defconfig > +++ b/configs/sama5d3_xplained_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3_XPLAINED=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig > index ff7d2bffdd..ce1f28607e 100644 > --- a/configs/sama5d3_xplained_nandflash_defconfig > +++ b/configs/sama5d3_xplained_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3_XPLAINED=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig > index 6faea0ec3f..49d4334213 100644 > --- a/configs/sama5d3xek_mmc_defconfig > +++ b/configs/sama5d3xek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig > index e641279ee1..b0d56e0e3e 100644 > --- a/configs/sama5d3xek_nandflash_defconfig > +++ b/configs/sama5d3xek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig > index 37f603d528..cf2fb9e65b 100644 > --- a/configs/sama5d3xek_spiflash_defconfig > +++ b/configs/sama5d3xek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig > index bfcea3f519..35b8302b60 100644 > --- a/configs/sama5d4_xplained_mmc_defconfig > +++ b/configs/sama5d4_xplained_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig > index 2c1b7f17c0..93714ed0c7 100644 > --- a/configs/sama5d4_xplained_nandflash_defconfig > +++ b/configs/sama5d4_xplained_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig > index a89dd11a8c..e1eb0c72cd 100644 > --- a/configs/sama5d4_xplained_spiflash_defconfig > +++ b/configs/sama5d4_xplained_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig > index 45e6539913..bd238f7f14 100644 > --- a/configs/sama5d4ek_mmc_defconfig > +++ b/configs/sama5d4ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig > index 1497110452..3816bfb273 100644 > --- a/configs/sama5d4ek_nandflash_defconfig > +++ b/configs/sama5d4ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig > index dad32b5711..242081e6a1 100644 > --- a/configs/sama5d4ek_spiflash_defconfig > +++ b/configs/sama5d4ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig > index 9d881e5d41..15fc17ac00 100644 > --- a/configs/wb45n_defconfig > +++ b/configs/wb45n_defconfig > @@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x23f00000 > CONFIG_TARGET_WB45N=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig > index c74eba1012..a7e9a53448 100644 > --- a/configs/wb50n_defconfig > +++ b/configs/wb50n_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x23f00000 > CONFIG_TARGET_WB50N=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc > index 274d860f06..c86d085779 100644 > --- a/doc/README.atmel_pmecc > +++ b/doc/README.atmel_pmecc > @@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: > 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. > It only can be 512 or 1024. > > -Take AT91SAM9X5EK as an example, the board definition file likes: > +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board > +configuration file has the following entries: > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > + CONFIG_PMECC_CAP=2 > + CONFIG_PMECC_SECTOR_SIZE=512 > + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > > How to enable PMECC header for direct programmable boot.bin > ----------------------------------------------------------- > @@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to > look like. In order to do so we have a new image type added to mkimage to > generate this PMECC header and integrated this into the build process of SPL. > > -To enable the generation of atmel PMECC header for SPL one need to define > +To enable the generation of atmel PMECC header for SPL one needs to define > CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from > board configuration and compiled into the host tools atmel_pmecc_params. This > tool will be called in build process to parametrize mkimage for atmelimage > diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig > index 008f7b4b4b..b99732736a 100644 > --- a/drivers/mtd/nand/raw/Kconfig > +++ b/drivers/mtd/nand/raw/Kconfig > @@ -16,6 +16,44 @@ config NAND_ATMEL > Enable this driver for NAND flash platforms using an Atmel NAND > controller. > > +if NAND_ATMEL > + > +config ATMEL_NAND_HWECC > + bool "Atmel Hardware ECC" > + default n > + > +config ATMEL_NAND_HW_PMECC > + bool "Atmel Programmable Multibit ECC (PMECC)" > + select ATMEL_NAND_HWECC > + default n > + help > + The Programmable Multibit ECC (PMECC) controller is a programmable > + binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. > + > +config PMECC_CAP > + int "PMECC Correctable ECC Bits" > + depends on ATMEL_NAND_HW_PMECC > + default 2 > + help > + Correctable ECC bits, can be 2, 4, 8, 12, and 24. > + > +config PMECC_SECTOR_SIZE > + int "PMECC Sector Size" > + depends on ATMEL_NAND_HW_PMECC > + default 512 > + help > + Sector size, in bytes, can be 512 or 1024. > + > +config SPL_GENERATE_ATMEL_PMECC_HEADER > + bool "Atmel PMECC Header Generation" > + select ATMEL_NAND_HWECC > + select ATMEL_NAND_HW_PMECC > + default n > + help > + Generate Programmable Multibit ECC (PMECC) header for SPL image. > + > +endif > + > config NAND_DAVINCI > bool "Support TI Davinci NAND controller" > help > diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h > index 6cd267eee6..777a99b730 100644 > --- a/include/configs/at91sam9n12ek.h > +++ b/include/configs/at91sam9n12ek.h > @@ -59,12 +59,6 @@ > #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) > #endif > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > #define CONFIG_EXTRA_ENV_SETTINGS \ > "console=console=ttyS0,115200\0" \ > "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ > @@ -177,6 +171,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h > index 63305a7cdd..6adb965c3c 100644 > --- a/include/configs/at91sam9x5ek.h > +++ b/include/configs/at91sam9x5ek.h > @@ -55,12 +55,6 @@ > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > #endif > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > /* USB */ > #ifdef CONFIG_CMD_USB > #ifndef CONFIG_USB_EHCI_HCD > @@ -151,6 +145,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h > index d0d8087ca3..8a9a19d38e 100644 > --- a/include/configs/sama5d3_xplained.h > +++ b/include/configs/sama5d3_xplained.h > @@ -43,14 +43,8 @@ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > #endif > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* USB */ > - > #ifdef CONFIG_CMD_USB > #define CONFIG_USB_ATMEL > #define CONFIG_USB_ATMEL_CLK_SEL_UPLL > @@ -88,6 +82,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h > index 4d3c3b8314..ca1c2b0861 100644 > --- a/include/configs/sama5d3xek.h > +++ b/include/configs/sama5d3xek.h > @@ -62,14 +62,8 @@ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > #endif > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* USB */ > - Unrelated change ? > #ifdef CONFIG_CMD_USB > #define CONFIG_USB_ATMEL_CLK_SEL_UPLL > #define CONFIG_USB_OHCI_NEW > @@ -109,6 +103,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h > index 7f8ac178f3..bbb16993ec 100644 > --- a/include/configs/sama5d4_xplained.h > +++ b/include/configs/sama5d4_xplained.h > @@ -37,9 +37,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > #endif > > /* SPL */ > @@ -64,8 +61,6 @@ > #define CONFIG_SPL_NAND_DRIVERS > #define CONFIG_SPL_NAND_BASE > #endif > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > @@ -73,6 +68,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 224 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h > index aa8573d8ba..d58041650c 100644 > --- a/include/configs/sama5d4ek.h > +++ b/include/configs/sama5d4ek.h > @@ -37,9 +37,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > #endif > > /* SPL */ > @@ -63,8 +60,6 @@ > #define CONFIG_SPL_NAND_DRIVERS > #define CONFIG_SPL_NAND_BASE > #endif > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > @@ -72,6 +67,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 224 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h > index b516b66c35..add4019b31 100644 > --- a/include/configs/wb45n.h > +++ b/include/configs/wb45n.h > @@ -48,12 +48,6 @@ > #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > #define CONFIG_RBTREE > #define CONFIG_LZO > > @@ -141,6 +135,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif /* __CONFIG_H__ */ > diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h > index 40ca9d602b..2684b6c16c 100644 > --- a/include/configs/wb50n.h > +++ b/include/configs/wb50n.h > @@ -57,11 +57,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* Ethernet Hardware */ > #define CONFIG_MACB > @@ -118,6 +113,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt > index b8addeaf69..f798c6542a 100644 > --- a/scripts/config_whitelist.txt > +++ b/scripts/config_whitelist.txt > @@ -97,8 +97,6 @@ CONFIG_ATMEL_LCD_BGR555 > CONFIG_ATMEL_LCD_RGB565 > CONFIG_ATMEL_LEGACY > CONFIG_ATMEL_MCI_8BIT > -CONFIG_ATMEL_NAND_HWECC > -CONFIG_ATMEL_NAND_HW_PMECC > CONFIG_ATMEL_SPI0 > CONFIG_AT_TRANS > CONFIG_AUTO_ZRELADDR > @@ -1509,8 +1507,6 @@ CONFIG_PLATINUM_PROJECT > CONFIG_PM > CONFIG_PMC_BR_PRELIM > CONFIG_PMC_OR_PRELIM > -CONFIG_PMECC_CAP > -CONFIG_PMECC_SECTOR_SIZE > CONFIG_PME_PLAT_CLK_DIV > CONFIG_PMU > CONFIG_PMW_BASE > @@ -1875,7 +1871,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME > CONFIG_SPL_FS_LOAD_KERNEL_NAME > CONFIG_SPL_FS_LOAD_PAYLOAD_NAME > CONFIG_SPL_GD_ADDR > -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > CONFIG_SPL_INIT_MINIMAL > CONFIG_SPL_JR0_LIODN_NS > CONFIG_SPL_JR0_LIODN_S >
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 30 lines · On Fri, Jan 11, 2019, 5:27 AM <[email protected] wrote:
Quoted 13 lines · Derald Woods
On Mon, Jan 7, 2019 at 3:40 AM <[email protected] <mailto:[email protected]>> wrote:
Hi Derald,
Thank you for the patch,
Some minor questions inline.
Sorry for the late response. Family and day job take priority.
Quoted 13 lines
The patch is the simplest technical conversion that I could produce with my board (SAMA5D3-XPLD) as the test platform. I was very careful not to touch anything unrelated. It is not intended to address permutations outside of the PMECC
Kconfigscope. I have submitted these type of conversions to U-Boot in the past. Adding speculative things is risky when you only have one development board. The patch works well, for me, and addresses the original need. All items, in the patch, are currently in scope. If there are additions and/or modifications, feel free to modify the patch. It is complete from my perspective. I do not have any additional time to chase this any further. I have been developing for some time now and can handle an 'out of tree' patch, in my environment, until something better comes along. This patch is just my contribution to the process.
Quoted 9 lines
Hello Derald,
From my point of view the PMECC header generation for SPL should be
done if and only if the SPL is being placed in NAND flash namely defconfigs having *nandflash* in the name.Thus I disagree with enabling it on spiflash configurations (like you did for the *mmc* configurations looks OK)
The patch is about 'one' thing. Kconfig conversion. Things that you are mentioning do not invalidate my patch. I tried not to add things that were not there originally. That is generally discouraged scope creep. The patch does its job in a provable manner with changing existing usage.
Derald
If you have any reasons or arguments , or anyone else does, please
Quoted 725 lines
correct me.
If you do not have time to change the patch, that is OK, I can take over at some point when I have the time or someone else can pick and rework a little bit on that specific point and make a v2.
Thanks again,
Eugen
Quoted 714 lines
Cheers,
Derald
On 15.12.2018 09:36, Derald D. Woods wrote: > This commit converts the following items to Kconfig: > > CONFIG_ATMEL_NAND_HWECC > CONFIG_ATMEL_NAND_HW_PMECC > CONFIG_PMECC_CAP > CONFIG_PMECC_SECTOR_SIZE > CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > [PMECC References] > https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure > https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap > > [Mailing List Thread] > https://lists.denx.de/pipermail/u-boot/2018-December/350666.html > > Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") > Reported-by: Daniel Evans <[email protected] <mailto:[email protected]>> > Cc: Eugen Hristev <[email protected] <mailto:[email protected]>> > Signed-off-by: Derald D. Woods <[email protected] <mailto:[email protected]>> > --- > configs/at91sam9n12ek_mmc_defconfig | 1 + > configs/at91sam9n12ek_nandflash_defconfig | 3 ++ > configs/at91sam9n12ek_spiflash_defconfig | 3 ++ > configs/at91sam9x5ek_dataflash_defconfig | 3 ++ > configs/at91sam9x5ek_mmc_defconfig | 1 + > configs/at91sam9x5ek_nandflash_defconfig | 3 ++ > configs/at91sam9x5ek_spiflash_defconfig | 3 ++ > configs/sama5d3_xplained_mmc_defconfig | 1 + > configs/sama5d3_xplained_nandflash_defconfig | 3 ++ > configs/sama5d3xek_mmc_defconfig | 1 + > configs/sama5d3xek_nandflash_defconfig | 3 ++ > configs/sama5d3xek_spiflash_defconfig | 3 ++ > configs/sama5d4_xplained_mmc_defconfig | 1 + > configs/sama5d4_xplained_nandflash_defconfig | 3 ++ > configs/sama5d4_xplained_spiflash_defconfig | 3 ++ > configs/sama5d4ek_mmc_defconfig | 1 + > configs/sama5d4ek_nandflash_defconfig | 3 ++ > configs/sama5d4ek_spiflash_defconfig | 3 ++ > configs/wb45n_defconfig | 3 ++ > configs/wb50n_defconfig | 3 ++ > doc/README.atmel_pmecc | 13 ++++--- > drivers/mtd/nand/raw/Kconfig | 38 ++++++++++++++++++++ > include/configs/at91sam9n12ek.h | 7 ---- > include/configs/at91sam9x5ek.h | 7 ---- > include/configs/sama5d3_xplained.h | 7 ---- > include/configs/sama5d3xek.h | 7 ---- > include/configs/sama5d4_xplained.h | 6 ---- > include/configs/sama5d4ek.h | 6 ---- > include/configs/wb45n.h | 7 ---- > include/configs/wb50n.h | 6 ---- > scripts/config_whitelist.txt | 5 --- > 31 files changed, 92 insertions(+), 65 deletions(-) > > diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig > index 6b2cfe9c42..7b46eb498d 100644 > --- a/configs/at91sam9n12ek_mmc_defconfig > +++ b/configs/at91sam9n12ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig > index 354c24ff16..4e34a517fd 100644 > --- a/configs/at91sam9n12ek_nandflash_defconfig > +++ b/configs/at91sam9n12ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig > index 63889355bf..500c3ab088 100644 > --- a/configs/at91sam9n12ek_spiflash_defconfig > +++ b/configs/at91sam9n12ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Do we need to generate the PMECC header for SPI_BOOT configurations ? I would say this would be required only for NAND_BOOT > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig > index dc13509715..60d865cc23 100644 > --- a/configs/at91sam9x5ek_dataflash_defconfig > +++ b/configs/at91sam9x5ek_dataflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig > index ff86f93e61..75f7fbd199 100644 > --- a/configs/at91sam9x5ek_mmc_defconfig > +++ b/configs/at91sam9x5ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig > index b2b3ddb6d9..dd6bdee7f9 100644 > --- a/configs/at91sam9x5ek_nandflash_defconfig > +++ b/configs/at91sam9x5ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig > index d0eebcdc75..8d8108888c 100644 > --- a/configs/at91sam9x5ek_spiflash_defconfig > +++ b/configs/at91sam9x5ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto. > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig > index eab38ec366..51d5aeaf0e 100644 > --- a/configs/sama5d3_xplained_mmc_defconfig > +++ b/configs/sama5d3_xplained_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3_XPLAINED=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig > index ff7d2bffdd..ce1f28607e 100644 > --- a/configs/sama5d3_xplained_nandflash_defconfig > +++ b/configs/sama5d3_xplained_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3_XPLAINED=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig > index 6faea0ec3f..49d4334213 100644 > --- a/configs/sama5d3xek_mmc_defconfig > +++ b/configs/sama5d3xek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig > index e641279ee1..b0d56e0e3e 100644 > --- a/configs/sama5d3xek_nandflash_defconfig > +++ b/configs/sama5d3xek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig > index 37f603d528..cf2fb9e65b 100644 > --- a/configs/sama5d3xek_spiflash_defconfig > +++ b/configs/sama5d3xek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig > index bfcea3f519..35b8302b60 100644 > --- a/configs/sama5d4_xplained_mmc_defconfig > +++ b/configs/sama5d4_xplained_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig > index 2c1b7f17c0..93714ed0c7 100644 > --- a/configs/sama5d4_xplained_nandflash_defconfig > +++ b/configs/sama5d4_xplained_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig > index a89dd11a8c..e1eb0c72cd 100644 > --- a/configs/sama5d4_xplained_spiflash_defconfig > +++ b/configs/sama5d4_xplained_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig > index 45e6539913..bd238f7f14 100644 > --- a/configs/sama5d4ek_mmc_defconfig > +++ b/configs/sama5d4ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig > index 1497110452..3816bfb273 100644 > --- a/configs/sama5d4ek_nandflash_defconfig > +++ b/configs/sama5d4ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig > index dad32b5711..242081e6a1 100644 > --- a/configs/sama5d4ek_spiflash_defconfig > +++ b/configs/sama5d4ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig > index 9d881e5d41..15fc17ac00 100644 > --- a/configs/wb45n_defconfig > +++ b/configs/wb45n_defconfig > @@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x23f00000 > CONFIG_TARGET_WB45N=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig > index c74eba1012..a7e9a53448 100644 > --- a/configs/wb50n_defconfig > +++ b/configs/wb50n_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x23f00000 > CONFIG_TARGET_WB50N=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc > index 274d860f06..c86d085779 100644 > --- a/doc/README.atmel_pmecc > +++ b/doc/README.atmel_pmecc > @@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: > 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. > It only can be 512 or 1024. > > -Take AT91SAM9X5EK as an example, the board definition file likes: > +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board > +configuration file has the following entries: > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > + CONFIG_PMECC_CAP=2 > + CONFIG_PMECC_SECTOR_SIZE=512 > + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > > How to enable PMECC header for direct programmable boot.bin > ----------------------------------------------------------- > @@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to > look like. In order to do so we have a new image type added to mkimage to > generate this PMECC header and integrated this into the build process of SPL. > > -To enable the generation of atmel PMECC header for SPL one need to define > +To enable the generation of atmel PMECC header for SPL one needs to define > CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from > board configuration and compiled into the host tools atmel_pmecc_params. This > tool will be called in build process to parametrize mkimage for atmelimage > diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig > index 008f7b4b4b..b99732736a 100644 > --- a/drivers/mtd/nand/raw/Kconfig > +++ b/drivers/mtd/nand/raw/Kconfig > @@ -16,6 +16,44 @@ config NAND_ATMEL > Enable this driver for NAND flash platforms using an Atmel NAND > controller. > > +if NAND_ATMEL > + > +config ATMEL_NAND_HWECC > + bool "Atmel Hardware ECC" > + default n > + > +config ATMEL_NAND_HW_PMECC > + bool "Atmel Programmable Multibit ECC (PMECC)" > + select ATMEL_NAND_HWECC > + default n > + help > + The Programmable Multibit ECC (PMECC) controller is a programmable > + binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. > + > +config PMECC_CAP > + int "PMECC Correctable ECC Bits" > + depends on ATMEL_NAND_HW_PMECC > + default 2 > + help > + Correctable ECC bits, can be 2, 4, 8, 12, and 24. > + > +config PMECC_SECTOR_SIZE > + int "PMECC Sector Size" > + depends on ATMEL_NAND_HW_PMECC > + default 512 > + help > + Sector size, in bytes, can be 512 or 1024. > + > +config SPL_GENERATE_ATMEL_PMECC_HEADER > + bool "Atmel PMECC Header Generation" > + select ATMEL_NAND_HWECC > + select ATMEL_NAND_HW_PMECC > + default n > + help > + Generate Programmable Multibit ECC (PMECC) header for SPL image. > + > +endif > + > config NAND_DAVINCI > bool "Support TI Davinci NAND controller" > help > diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h > index 6cd267eee6..777a99b730 100644 > --- a/include/configs/at91sam9n12ek.h > +++ b/include/configs/at91sam9n12ek.h > @@ -59,12 +59,6 @@ > #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) > #endif > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > #define CONFIG_EXTRA_ENV_SETTINGS \ > "console=console=ttyS0,115200\0" \ > "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ > @@ -177,6 +171,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h > index 63305a7cdd..6adb965c3c 100644 > --- a/include/configs/at91sam9x5ek.h > +++ b/include/configs/at91sam9x5ek.h > @@ -55,12 +55,6 @@ > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > #endif > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > /* USB */ > #ifdef CONFIG_CMD_USB > #ifndef CONFIG_USB_EHCI_HCD > @@ -151,6 +145,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h > index d0d8087ca3..8a9a19d38e 100644 > --- a/include/configs/sama5d3_xplained.h > +++ b/include/configs/sama5d3_xplained.h > @@ -43,14 +43,8 @@ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > #endif > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* USB */ > - > #ifdef CONFIG_CMD_USB > #define CONFIG_USB_ATMEL > #define CONFIG_USB_ATMEL_CLK_SEL_UPLL > @@ -88,6 +82,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h > index 4d3c3b8314..ca1c2b0861 100644 > --- a/include/configs/sama5d3xek.h > +++ b/include/configs/sama5d3xek.h > @@ -62,14 +62,8 @@ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > #endif > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* USB */ > - Unrelated change ? > #ifdef CONFIG_CMD_USB > #define CONFIG_USB_ATMEL_CLK_SEL_UPLL > #define CONFIG_USB_OHCI_NEW > @@ -109,6 +103,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h > index 7f8ac178f3..bbb16993ec 100644 > --- a/include/configs/sama5d4_xplained.h > +++ b/include/configs/sama5d4_xplained.h > @@ -37,9 +37,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > #endif > > /* SPL */ > @@ -64,8 +61,6 @@ > #define CONFIG_SPL_NAND_DRIVERS > #define CONFIG_SPL_NAND_BASE > #endif > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > @@ -73,6 +68,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 224 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h > index aa8573d8ba..d58041650c 100644 > --- a/include/configs/sama5d4ek.h > +++ b/include/configs/sama5d4ek.h > @@ -37,9 +37,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > #endif > > /* SPL */ > @@ -63,8 +60,6 @@ > #define CONFIG_SPL_NAND_DRIVERS > #define CONFIG_SPL_NAND_BASE > #endif > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > @@ -72,6 +67,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 224 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h > index b516b66c35..add4019b31 100644 > --- a/include/configs/wb45n.h > +++ b/include/configs/wb45n.h > @@ -48,12 +48,6 @@ > #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > #define CONFIG_RBTREE > #define CONFIG_LZO > > @@ -141,6 +135,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif /* __CONFIG_H__ */ > diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h > index 40ca9d602b..2684b6c16c 100644 > --- a/include/configs/wb50n.h > +++ b/include/configs/wb50n.h > @@ -57,11 +57,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* Ethernet Hardware */ > #define CONFIG_MACB > @@ -118,6 +113,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt > index b8addeaf69..f798c6542a 100644 > --- a/scripts/config_whitelist.txt > +++ b/scripts/config_whitelist.txt > @@ -97,8 +97,6 @@ CONFIG_ATMEL_LCD_BGR555 > CONFIG_ATMEL_LCD_RGB565 > CONFIG_ATMEL_LEGACY > CONFIG_ATMEL_MCI_8BIT > -CONFIG_ATMEL_NAND_HWECC > -CONFIG_ATMEL_NAND_HW_PMECC > CONFIG_ATMEL_SPI0 > CONFIG_AT_TRANS > CONFIG_AUTO_ZRELADDR > @@ -1509,8 +1507,6 @@ CONFIG_PLATINUM_PROJECT > CONFIG_PM > CONFIG_PMC_BR_PRELIM > CONFIG_PMC_OR_PRELIM > -CONFIG_PMECC_CAP > -CONFIG_PMECC_SECTOR_SIZE > CONFIG_PME_PLAT_CLK_DIV > CONFIG_PMU > CONFIG_PMW_BASE > @@ -1875,7 +1871,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME > CONFIG_SPL_FS_LOAD_KERNEL_NAME > CONFIG_SPL_FS_LOAD_PAYLOAD_NAME > CONFIG_SPL_GD_ADDR > -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > CONFIG_SPL_INIT_MINIMAL > CONFIG_SPL_JR0_LIODN_NS > CONFIG_SPL_JR0_LIODN_S >
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 40 lines · On Fri, Jan 11, 2019, 10:51 AM Derald Woods <[email protected] wrote:
Quoted 37 lines · On Fri, Jan 11, 2019, 5:27 AM <[email protected] wrote:
Quoted 7 lines · Derald Woods
On Mon, Jan 7, 2019 at 3:40 AM <[email protected] <mailto:[email protected]>> wrote:
Hi Derald,
Thank you for the patch,
Quoted 7 lines
Some minor questions inline.
Sorry for the late response. Family and day job take priority.
The patch is the simplest technical conversion that I could produce
with
Quoted 4 lines
my board (SAMA5D3-XPLD) as the test platform. I was very careful not to touch anything unrelated. It is not intended to address permutations outside of the PMECC
Kconfigscope. I have submitted these type of conversions to U-Boot in the past. Adding speculative things is riskyQuoted 8 lines
when you only have one development board. The patch works well, for me, and addresses the original need. All items, in the patch, are currently in scope. If there are additions and/or modifications, feel free to modify the patch. It is complete from my perspective. I do not have any additional time to chase this any further. I have been developing for some time now and can handle an 'out of tree' patch, in my environment, until something better comes along. This patch is just my contribution to the process.
Hello Derald,
From my point of view the PMECC header generation for SPL should be
done if and only if the SPL is being placed in NAND flash namely defconfigs having *nandflash* in the name.
Quoted 9 lines
Quoted 3 lines
Thus I disagree with enabling it on spiflash configurations (like you did for the *mmc* configurations looks OK)
The patch is about 'one' thing.
Kconfigconversion. Things that you are mentioning do not invalidate my patch. I tried not to add things that were not there originally. That is generally discouraged scope creep. The patch does its job in a provable manner with
'without'
changing existing usage.
Quoted 733 lines
Derald
If you have any reasons or arguments , or anyone else does, please
Quoted 727 lines
correct me.
If you do not have time to change the patch, that is OK, I can take over at some point when I have the time or someone else can pick and rework a little bit on that specific point and make a v2.
Thanks again,
Eugen
Quoted 99 lines
Cheers,
Derald
On 15.12.2018 09:36, Derald D. Woods wrote: > This commit converts the following items to Kconfig: > > CONFIG_ATMEL_NAND_HWECC > CONFIG_ATMEL_NAND_HW_PMECC > CONFIG_PMECC_CAP > CONFIG_PMECC_SECTOR_SIZE > CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > [PMECC References] > https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure > https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap > > [Mailing List Thread] > https://lists.denx.de/pipermail/u-boot/2018-December/350666.html > > Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment") > Reported-by: Daniel Evans <[email protected] <mailto:[email protected]>> > Cc: Eugen Hristev <[email protected] <mailto:[email protected]>> > Signed-off-by: Derald D. Woods <[email protected] <mailto:[email protected]>> > --- > configs/at91sam9n12ek_mmc_defconfig | 1 + > configs/at91sam9n12ek_nandflash_defconfig | 3 ++ > configs/at91sam9n12ek_spiflash_defconfig | 3 ++ > configs/at91sam9x5ek_dataflash_defconfig | 3 ++ > configs/at91sam9x5ek_mmc_defconfig | 1 + > configs/at91sam9x5ek_nandflash_defconfig | 3 ++ > configs/at91sam9x5ek_spiflash_defconfig | 3 ++ > configs/sama5d3_xplained_mmc_defconfig | 1 + > configs/sama5d3_xplained_nandflash_defconfig | 3 ++ > configs/sama5d3xek_mmc_defconfig | 1 + > configs/sama5d3xek_nandflash_defconfig | 3 ++ > configs/sama5d3xek_spiflash_defconfig | 3 ++ > configs/sama5d4_xplained_mmc_defconfig | 1 + > configs/sama5d4_xplained_nandflash_defconfig | 3 ++ > configs/sama5d4_xplained_spiflash_defconfig | 3 ++ > configs/sama5d4ek_mmc_defconfig | 1 + > configs/sama5d4ek_nandflash_defconfig | 3 ++ > configs/sama5d4ek_spiflash_defconfig | 3 ++ > configs/wb45n_defconfig | 3 ++ > configs/wb50n_defconfig | 3 ++ > doc/README.atmel_pmecc | 13 ++++--- > drivers/mtd/nand/raw/Kconfig | 38 ++++++++++++++++++++ > include/configs/at91sam9n12ek.h | 7 ---- > include/configs/at91sam9x5ek.h | 7 ---- > include/configs/sama5d3_xplained.h | 7 ---- > include/configs/sama5d3xek.h | 7 ---- > include/configs/sama5d4_xplained.h | 6 ---- > include/configs/sama5d4ek.h | 6 ---- > include/configs/wb45n.h | 7 ---- > include/configs/wb50n.h | 6 ---- > scripts/config_whitelist.txt | 5 --- > 31 files changed, 92 insertions(+), 65 deletions(-) > > diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig > index 6b2cfe9c42..7b46eb498d 100644 > --- a/configs/at91sam9n12ek_mmc_defconfig > +++ b/configs/at91sam9n12ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig > index 354c24ff16..4e34a517fd 100644 > --- a/configs/at91sam9n12ek_nandflash_defconfig > +++ b/configs/at91sam9n12ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig > index 63889355bf..500c3ab088 100644 > --- a/configs/at91sam9n12ek_spiflash_defconfig > +++ b/configs/at91sam9n12ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=yQuoted 8 lines
> CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9N12EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Do we need to generate the PMECC header for SPI_BOOT configurations?
Quoted 262 lines
I would say this would be required only for NAND_BOOT > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig > index dc13509715..60d865cc23 100644 > --- a/configs/at91sam9x5ek_dataflash_defconfig > +++ b/configs/at91sam9x5ek_dataflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig > index ff86f93e61..75f7fbd199 100644 > --- a/configs/at91sam9x5ek_mmc_defconfig > +++ b/configs/at91sam9x5ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig > index b2b3ddb6d9..dd6bdee7f9 100644 > --- a/configs/at91sam9x5ek_nandflash_defconfig > +++ b/configs/at91sam9x5ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig > index d0eebcdc75..8d8108888c 100644 > --- a/configs/at91sam9x5ek_spiflash_defconfig > +++ b/configs/at91sam9x5ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_AT91SAM9X5EK=y > +CONFIG_PMECC_CAP=2 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto. > CONFIG_SYS_MALLOC_F_LEN=0x2000 > CONFIG_DEBUG_UART_BOARD_INIT=y > CONFIG_DEBUG_UART_BASE=0xfffff200 > diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig > index eab38ec366..51d5aeaf0e 100644 > --- a/configs/sama5d3_xplained_mmc_defconfig > +++ b/configs/sama5d3_xplained_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3_XPLAINED=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig > index ff7d2bffdd..ce1f28607e 100644 > --- a/configs/sama5d3_xplained_nandflash_defconfig > +++ b/configs/sama5d3_xplained_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3_XPLAINED=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig > index 6faea0ec3f..49d4334213 100644 > --- a/configs/sama5d3xek_mmc_defconfig > +++ b/configs/sama5d3xek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig > index e641279ee1..b0d56e0e3e 100644 > --- a/configs/sama5d3xek_nandflash_defconfig > +++ b/configs/sama5d3xek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig > index 37f603d528..cf2fb9e65b 100644 > --- a/configs/sama5d3xek_spiflash_defconfig > +++ b/configs/sama5d3xek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D3XEK=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig > index bfcea3f519..35b8302b60 100644 > --- a/configs/sama5d4_xplained_mmc_defconfig > +++ b/configs/sama5d4_xplained_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig > index 2c1b7f17c0..93714ed0c7 100644 > --- a/configs/sama5d4_xplained_nandflash_defconfig > +++ b/configs/sama5d4_xplained_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig > index a89dd11a8c..e1eb0c72cd 100644 > --- a/configs/sama5d4_xplained_spiflash_defconfig > +++ b/configs/sama5d4_xplained_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4_XPLAINED=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig > index 45e6539913..bd238f7f14 100644 > --- a/configs/sama5d4ek_mmc_defconfig > +++ b/configs/sama5d4ek_mmc_defconfig > @@ -2,6 +2,7 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig > index 1497110452..3816bfb273 100644 > --- a/configs/sama5d4ek_nandflash_defconfig > +++ b/configs/sama5d4ek_nandflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig > index dad32b5711..242081e6a1 100644 > --- a/configs/sama5d4ek_spiflash_defconfig > +++ b/configs/sama5d4ek_spiflash_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x26f00000 > CONFIG_TARGET_SAMA5D4EK=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y Ditto > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig > index 9d881e5d41..15fc17ac00 100644 > --- a/configs/wb45n_defconfig > +++ b/configs/wb45n_defconfig > @@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x23f00000 > CONFIG_TARGET_WB45N=y > +CONFIG_PMECC_CAP=4 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig > index c74eba1012..a7e9a53448 100644 > --- a/configs/wb50n_defconfig > +++ b/configs/wb50n_defconfig > @@ -2,6 +2,9 @@ CONFIG_ARM=y > CONFIG_ARCH_AT91=y > CONFIG_SYS_TEXT_BASE=0x23f00000 > CONFIG_TARGET_WB50N=y > +CONFIG_PMECC_CAP=8 > +CONFIG_PMECC_SECTOR_SIZE=512 > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > CONFIG_SPL_GPIO_SUPPORT=y > CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc > index 274d860f06..c86d085779 100644Quoted 8 lines
> --- a/doc/README.atmel_pmecc > +++ b/doc/README.atmel_pmecc > @@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: > 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. > It only can be 512 or 1024. > > -Take AT91SAM9X5EK as an example, the board definition filelikes:
Quoted 337 lines
> +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board > +configuration file has the following entries: > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > + CONFIG_PMECC_CAP=2 > + CONFIG_PMECC_SECTOR_SIZE=512 > + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > > How to enable PMECC header for direct programmable boot.bin > ----------------------------------------------------------- > @@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to > look like. In order to do so we have a new image type added to mkimage to > generate this PMECC header and integrated this into the build process of SPL. > > -To enable the generation of atmel PMECC header for SPL one need to define > +To enable the generation of atmel PMECC header for SPL one needs to define > CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from > board configuration and compiled into the host tools atmel_pmecc_params. This > tool will be called in build process to parametrize mkimage for atmelimage > diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig > index 008f7b4b4b..b99732736a 100644 > --- a/drivers/mtd/nand/raw/Kconfig > +++ b/drivers/mtd/nand/raw/Kconfig > @@ -16,6 +16,44 @@ config NAND_ATMEL > Enable this driver for NAND flash platforms using an Atmel NAND > controller. > > +if NAND_ATMEL > + > +config ATMEL_NAND_HWECC > + bool "Atmel Hardware ECC" > + default n > + > +config ATMEL_NAND_HW_PMECC > + bool "Atmel Programmable Multibit ECC (PMECC)" > + select ATMEL_NAND_HWECC > + default n > + help > + The Programmable Multibit ECC (PMECC) controller is a programmable > + binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. > + > +config PMECC_CAP > + int "PMECC Correctable ECC Bits" > + depends on ATMEL_NAND_HW_PMECC > + default 2 > + help > + Correctable ECC bits, can be 2, 4, 8, 12, and 24. > + > +config PMECC_SECTOR_SIZE > + int "PMECC Sector Size" > + depends on ATMEL_NAND_HW_PMECC > + default 512 > + help > + Sector size, in bytes, can be 512 or 1024. > + > +config SPL_GENERATE_ATMEL_PMECC_HEADER > + bool "Atmel PMECC Header Generation" > + select ATMEL_NAND_HWECC > + select ATMEL_NAND_HW_PMECC > + default n > + help > + Generate Programmable Multibit ECC (PMECC) header for SPL image. > + > +endif > + > config NAND_DAVINCI > bool "Support TI Davinci NAND controller" > help > diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h > index 6cd267eee6..777a99b730 100644 > --- a/include/configs/at91sam9n12ek.h > +++ b/include/configs/at91sam9n12ek.h > @@ -59,12 +59,6 @@ > #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) > #endif > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > #define CONFIG_EXTRA_ENV_SETTINGS \ > "console=console=ttyS0,115200\0" \ > "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ > @@ -177,6 +171,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h > index 63305a7cdd..6adb965c3c 100644 > --- a/include/configs/at91sam9x5ek.h > +++ b/include/configs/at91sam9x5ek.h > @@ -55,12 +55,6 @@ > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > #endif > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 2 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > /* USB */ > #ifdef CONFIG_CMD_USB > #ifndef CONFIG_USB_EHCI_HCD > @@ -151,6 +145,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h > index d0d8087ca3..8a9a19d38e 100644 > --- a/include/configs/sama5d3_xplained.h > +++ b/include/configs/sama5d3_xplained.h > @@ -43,14 +43,8 @@ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > #endif > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* USB */ > - > #ifdef CONFIG_CMD_USB > #define CONFIG_USB_ATMEL > #define CONFIG_USB_ATMEL_CLK_SEL_UPLL > @@ -88,6 +82,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h > index 4d3c3b8314..ca1c2b0861 100644 > --- a/include/configs/sama5d3xek.h > +++ b/include/configs/sama5d3xek.h > @@ -62,14 +62,8 @@ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > #endif > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* USB */ > - Unrelated change ? > #ifdef CONFIG_CMD_USB > #define CONFIG_USB_ATMEL_CLK_SEL_UPLL > #define CONFIG_USB_OHCI_NEW > @@ -109,6 +103,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h > index 7f8ac178f3..bbb16993ec 100644 > --- a/include/configs/sama5d4_xplained.h > +++ b/include/configs/sama5d4_xplained.h > @@ -37,9 +37,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > #endif > > /* SPL */ > @@ -64,8 +61,6 @@ > #define CONFIG_SPL_NAND_DRIVERS > #define CONFIG_SPL_NAND_BASE > #endif > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > @@ -73,6 +68,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 224 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h > index aa8573d8ba..d58041650c 100644 > --- a/include/configs/sama5d4ek.h > +++ b/include/configs/sama5d4ek.h > @@ -37,9 +37,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > #endif > > /* SPL */ > @@ -63,8 +60,6 @@ > #define CONFIG_SPL_NAND_DRIVERS > #define CONFIG_SPL_NAND_BASE > #endif > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 > #define CONFIG_SYS_NAND_5_ADDR_CYCLE > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > @@ -72,6 +67,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 224 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h > index b516b66c35..add4019b31 100644 > --- a/include/configs/wb45n.h > +++ b/include/configs/wb45n.h > @@ -48,12 +48,6 @@ > #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC 1 > -#define CONFIG_ATMEL_NAND_HW_PMECC 1 > -#define CONFIG_PMECC_CAP 4 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > - > #define CONFIG_RBTREE > #define CONFIG_LZO > > @@ -141,6 +135,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif /* __CONFIG_H__ */ > diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h > index 40ca9d602b..2684b6c16c 100644 > --- a/include/configs/wb50n.h > +++ b/include/configs/wb50n.h > @@ -57,11 +57,6 @@ > /* our CLE is AD22 */ > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > #define CONFIG_SYS_NAND_ONFI_DETECTION > -/* PMECC & PMERRLOC */ > -#define CONFIG_ATMEL_NAND_HWECC > -#define CONFIG_ATMEL_NAND_HW_PMECC > -#define CONFIG_PMECC_CAP 8 > -#define CONFIG_PMECC_SECTOR_SIZE 512 > > /* Ethernet Hardware */ > #define CONFIG_MACB > @@ -118,6 +113,5 @@ > #define CONFIG_SYS_NAND_OOBSIZE 64 > #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > > #endif > diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt > index b8addeaf69..f798c6542a 100644 > --- a/scripts/config_whitelist.txt > +++ b/scripts/config_whitelist.txt > @@ -97,8 +97,6 @@ CONFIG_ATMEL_LCD_BGR555 > CONFIG_ATMEL_LCD_RGB565 > CONFIG_ATMEL_LEGACY > CONFIG_ATMEL_MCI_8BIT > -CONFIG_ATMEL_NAND_HWECC > -CONFIG_ATMEL_NAND_HW_PMECC > CONFIG_ATMEL_SPI0 > CONFIG_AT_TRANS > CONFIG_AUTO_ZRELADDR > @@ -1509,8 +1507,6 @@ CONFIG_PLATINUM_PROJECT > CONFIG_PM > CONFIG_PMC_BR_PRELIM > CONFIG_PMC_OR_PRELIM > -CONFIG_PMECC_CAP > -CONFIG_PMECC_SECTOR_SIZE > CONFIG_PME_PLAT_CLK_DIV > CONFIG_PMU > CONFIG_PMW_BASE > @@ -1875,7 +1871,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME > CONFIG_SPL_FS_LOAD_KERNEL_NAME > CONFIG_SPL_FS_LOAD_PAYLOAD_NAME > CONFIG_SPL_GD_ADDR > -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER > CONFIG_SPL_INIT_MINIMAL > CONFIG_SPL_JR0_LIODN_NS > CONFIG_SPL_JR0_LIODN_S >
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 71 lines · Derald Woods
On Fri, Jan 11, 2019, 10:51 AM Derald Woods <[email protected] <mailto:[email protected]> wrote:
On Fri, Jan 11, 2019, 5:27 AM <[email protected] <mailto:[email protected]> wrote:
On 10.01.2019 03:00, Derald Woods wrote:
> On Mon, Jan 7, 2019 at 3:40 AM <[email protected]
<mailto:[email protected]>
> <mailto:[email protected]
<mailto:[email protected]>>> wrote:
>
> Hi Derald,
>
> Thank you for the patch,
>
> Some minor questions inline.
>
>
>
> Sorry for the late response. Family and day job take priority. >
> The patch is the simplest technical conversion that I could
produce with
> my board (SAMA5D3-XPLD) as the test platform. I was very
careful not to
> touch anything unrelated. It is not intended to address
permutations
> outside of the PMECCKconfigscope. I have submitted these
type of
> conversions to U-Boot in the past. Adding speculative things
is risky
> when you only have one development board. The patch works
well, for me,
> and addresses the original need. All items, in the patch, are
currently
> in scope. If there are additions and/or modifications, feel
free to
> modify the patch. It is complete from my perspective. I do
not have any
> additional time to chase this any further. I have been
developing for
> some time now and can handle an 'out of tree' patch, in my
environment,
> until something better comes along. This patch is just my
contribution
> to the process.Hello Derald,
From my point of view the PMECC header generation for SPL
should be
done if and only if the SPL is being placed in NAND flash namely defconfigs having *nandflash* in the name.Thus I disagree with enabling it on spiflash configurations (like you
did for the *mmc* configurations looks OK)The patch is about 'one' thing.
Kconfigconversion. Things that you are mentioning do not invalidate my patch. I tried not to add things that were not there originally. That is generally discouraged scope creep. The patch does its job in a provable manner with
Quoted 3 lines
'without'
changing existing usage.
Ok, I understand your point.
Can you make the CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER depend on NAND_BOOT though ? This way the errors cannot happen again.
Also the other defconfigs need to depend on NAND if they are strict NAND related.
Maybe we can get more opinions from someone more familiar with the NAND subsystem ? Adding Miquel and Boris.
Thanks,
Eugen
Quoted 765 lines
Derald
If you have any reasons or arguments , or anyone else does, please correct me.
If you do not have time to change the patch, that is OK, I can take over
at some point when I have the time or someone else can pick and rework a
little bit on that specific point and make a v2.Thanks again,
Eugen
>
> Cheers,
>
> Derald
>
>
> On 15.12.2018 09:36, Derald D. Woods wrote:
> > This commit converts the following items toKconfig:
> >
> >CONFIG_ATMEL_NAND_HWECC
> >CONFIG_ATMEL_NAND_HW_PMECC
> >CONFIG_PMECC_CAP
> >CONFIG_PMECC_SECTOR_SIZE
> >CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
> >
> > [PMECC References]
> >
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
> >
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
> >
> > [Mailing List Thread]
> >
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html
> >
> > Fixes:5541543f("configs: at91: Remove
CONFIG_SYS_EXTRA_OPTIONS
> assignment")
> > Reported-by: Daniel Evans <[email protected]
<mailto:[email protected]>
> <mailto:[email protected]
<mailto:[email protected]>>>
> > Cc: Eugen Hristev <[email protected]
<mailto:[email protected]>
> <mailto:[email protected]
<mailto:[email protected]>>>
> > Signed-off-by: Derald D. Woods
<woods.technical at gmail.com <mailto:[email protected]>
> <mailto:[email protected]
<mailto:[email protected]>>>
> > ---
> > configs/at91sam9n12ek_mmc_defconfig | 1 + > > configs/at91sam9n12ek_nandflash_defconfig | 3 ++ > > configs/at91sam9n12ek_spiflash_defconfig | 3 ++ > > configs/at91sam9x5ek_dataflash_defconfig | 3 ++ > > configs/at91sam9x5ek_mmc_defconfig | 1 + > > configs/at91sam9x5ek_nandflash_defconfig | 3 ++ > > configs/at91sam9x5ek_spiflash_defconfig | 3 ++ > > configs/sama5d3_xplained_mmc_defconfig | 1 + > > configs/sama5d3_xplained_nandflash_defconfig | 3 ++ > > configs/sama5d3xek_mmc_defconfig | 1 + > > configs/sama5d3xek_nandflash_defconfig | 3 ++ > > configs/sama5d3xek_spiflash_defconfig | 3 ++ > > configs/sama5d4_xplained_mmc_defconfig | 1 + > > configs/sama5d4_xplained_nandflash_defconfig | 3 ++ > > configs/sama5d4_xplained_spiflash_defconfig | 3 ++ > > configs/sama5d4ek_mmc_defconfig | 1 + > > configs/sama5d4ek_nandflash_defconfig | 3 ++ > > configs/sama5d4ek_spiflash_defconfig | 3 ++ > > configs/wb45n_defconfig | 3 ++ > > configs/wb50n_defconfig | 3 ++ > > doc/README.atmel_pmecc | 13
++++---
> > drivers/mtd/nand/raw/Kconfig | 38 > ++++++++++++++++++++
> > include/configs/at91sam9n12ek.h | 7 ---- > > include/configs/at91sam9x5ek.h | 7 ---- > > include/configs/sama5d3_xplained.h | 7 ---- > > include/configs/sama5d3xek.h | 7 ---- > > include/configs/sama5d4_xplained.h | 6 ---- > > include/configs/sama5d4ek.h | 6 ---- > > include/configs/wb45n.h | 7 ---- > > include/configs/wb50n.h | 6 ---- > > scripts/config_whitelist.txt | 5 --- > > 31 files changed, 92 insertions(+), 65 deletions(-) > >
> > diff --git a/configs/at91sam9n12ek_mmc_defconfig > b/configs/at91sam9n12ek_mmc_defconfig
> > index6b2cfe9c42..7b46eb498d100644
> > --- a/configs/at91sam9n12ek_mmc_defconfig
> > +++ b/configs/at91sam9n12ek_mmc_defconfig
> > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9N12EK=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9n12ek_nandflash_defconfig > b/configs/at91sam9n12ek_nandflash_defconfig
> > index354c24ff16..4e34a517fd100644
> > --- a/configs/at91sam9n12ek_nandflash_defconfig > > +++ b/configs/at91sam9n12ek_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9N12EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9n12ek_spiflash_defconfig > b/configs/at91sam9n12ek_spiflash_defconfig
> > index63889355bf..500c3ab088100644
> > --- a/configs/at91sam9n12ek_spiflash_defconfig > > +++ b/configs/at91sam9n12ek_spiflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9N12EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Do we need to generate the PMECC header forSPI_BOOT
configurations ?
> I would say this would be required only forNAND_BOOT>
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9x5ek_dataflash_defconfig > b/configs/at91sam9x5ek_dataflash_defconfig
> > indexdc13509715..60d865cc23100644
> > --- a/configs/at91sam9x5ek_dataflash_defconfig > > +++ b/configs/at91sam9x5ek_dataflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9X5EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9x5ek_mmc_defconfig > b/configs/at91sam9x5ek_mmc_defconfig
> > indexff86f93e61..75f7fbd199100644
> > --- a/configs/at91sam9x5ek_mmc_defconfig
> > +++ b/configs/at91sam9x5ek_mmc_defconfig
> > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9X5EK=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9x5ek_nandflash_defconfig > b/configs/at91sam9x5ek_nandflash_defconfig
> > indexb2b3ddb6d9..dd6bdee7f9100644
> > --- a/configs/at91sam9x5ek_nandflash_defconfig > > +++ b/configs/at91sam9x5ek_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9X5EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9x5ek_spiflash_defconfig > b/configs/at91sam9x5ek_spiflash_defconfig
> > indexd0eebcdc75..8d8108888c100644
> > --- a/configs/at91sam9x5ek_spiflash_defconfig > > +++ b/configs/at91sam9x5ek_spiflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9X5EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Ditto.
>
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/sama5d3_xplained_mmc_defconfig > b/configs/sama5d3_xplained_mmc_defconfig
> > indexeab38ec366..51d5aeaf0e100644
> > --- a/configs/sama5d3_xplained_mmc_defconfig > > +++ b/configs/sama5d3_xplained_mmc_defconfig > > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3_XPLAINED=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d3_xplained_nandflash_defconfig > b/configs/sama5d3_xplained_nandflash_defconfig
> > indexff7d2bffdd..ce1f28607e100644
> > --- a/configs/sama5d3_xplained_nandflash_defconfig > > +++ b/configs/sama5d3_xplained_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3_XPLAINED=y
> > +CONFIG_PMECC_CAP=4
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d3xek_mmc_defconfig > b/configs/sama5d3xek_mmc_defconfig
> > index6faea0ec3f..49d4334213100644
> > --- a/configs/sama5d3xek_mmc_defconfig
> > +++ b/configs/sama5d3xek_mmc_defconfig
> > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3XEK=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d3xek_nandflash_defconfig > b/configs/sama5d3xek_nandflash_defconfig
> > indexe641279ee1..b0d56e0e3e100644
> > --- a/configs/sama5d3xek_nandflash_defconfig > > +++ b/configs/sama5d3xek_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3XEK=y
> > +CONFIG_PMECC_CAP=4
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d3xek_spiflash_defconfig > b/configs/sama5d3xek_spiflash_defconfig
> > index37f603d528..cf2fb9e65b100644
> > --- a/configs/sama5d3xek_spiflash_defconfig
> > +++ b/configs/sama5d3xek_spiflash_defconfig
> > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3XEK=y
> > +CONFIG_PMECC_CAP=4
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Ditto
>
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4_xplained_mmc_defconfig > b/configs/sama5d4_xplained_mmc_defconfig
> > indexbfcea3f519..35b8302b60100644
> > --- a/configs/sama5d4_xplained_mmc_defconfig > > +++ b/configs/sama5d4_xplained_mmc_defconfig > > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4_XPLAINED=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4_xplained_nandflash_defconfig > b/configs/sama5d4_xplained_nandflash_defconfig
> > index2c1b7f17c0..93714ed0c7100644
> > --- a/configs/sama5d4_xplained_nandflash_defconfig > > +++ b/configs/sama5d4_xplained_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4_XPLAINED=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4_xplained_spiflash_defconfig > b/configs/sama5d4_xplained_spiflash_defconfig
> > indexa89dd11a8c..e1eb0c72cd100644
> > --- a/configs/sama5d4_xplained_spiflash_defconfig > > +++ b/configs/sama5d4_xplained_spiflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4_XPLAINED=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Ditto
>
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4ek_mmc_defconfig > b/configs/sama5d4ek_mmc_defconfig
> > index45e6539913..bd238f7f14100644
> > --- a/configs/sama5d4ek_mmc_defconfig
> > +++ b/configs/sama5d4ek_mmc_defconfig
> > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4EK=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4ek_nandflash_defconfig > b/configs/sama5d4ek_nandflash_defconfig
> > index 1497110452..3816bfb273 100644
> > --- a/configs/sama5d4ek_nandflash_defconfig
> > +++ b/configs/sama5d4ek_nandflash_defconfig
> > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4EK=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4ek_spiflash_defconfig > b/configs/sama5d4ek_spiflash_defconfig
> > indexdad32b5711..242081e6a1100644
> > --- a/configs/sama5d4ek_spiflash_defconfig
> > +++ b/configs/sama5d4ek_spiflash_defconfig
> > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4EK=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Ditto
>
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/wb45n_defconfig
b/configs/wb45n_defconfig
> > index9d881e5d41..15fc17ac00100644
> > --- a/configs/wb45n_defconfig
> > +++ b/configs/wb45n_defconfig
> > @@ -3,6 +3,9 @@CONFIG_SYS_THUMB_BUILD=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x23f00000
> > CONFIG_TARGET_WB45N=y
> > +CONFIG_PMECC_CAP=4
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/wb50n_defconfig
b/configs/wb50n_defconfig
> > indexc74eba1012..a7e9a53448100644
> > --- a/configs/wb50n_defconfig
> > +++ b/configs/wb50n_defconfig
> > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x23f00000
> > CONFIG_TARGET_WB50N=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/doc/README.atmel_pmecc
b/doc/README.atmel_pmecc
> > index274d860f06..c86d085779100644
> > --- a/doc/README.atmel_pmecc
> > +++ b/doc/README.atmel_pmecc
> > @@ -20,13 +20,12 @@ To use PMECC in this driver, the
user needs
> to set:
> > 2. The PMECC sector size:CONFIG_PMECC_SECTOR_SIZE. > > It only can be 512 or 1024.
> >
> > -Take AT91SAM9X5EK as an example, the board definition
file likes:
> > +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an
example,
> the board
> > +configuration file has the following entries:
> >
> > -/* PMECC & PMERRLOC */
> > -#define CONFIG_ATMEL_NAND_HWECC 1 > > -#define CONFIG_ATMEL_NAND_HW_PMECC 1
> > -#define CONFIG_PMECC_CAP 2
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > + CONFIG_PMECC_CAP=2
> > + CONFIG_PMECC_SECTOR_SIZE=512
> > + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > >
> > How to enable PMECC header for direct programmable
boot.bin
> >
-----------------------------------------------------------
> > @@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April
2014) defines
> how this PMECC header has to
> > look like. In order to do so we have a new image
type added to
> mkimage to
> > generate this PMECC header and integrated this into
the build
> process of SPL.
> >
> > -To enable the generation of atmel PMECC header for
SPL one need
> to define
> > +To enable the generation of atmel PMECC header for
SPL one needs
> to define
> > CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required
parameters
> are taken from
> > board configuration and compiled into the host tools > atmel_pmecc_params. This
> > tool will be called in build process to parametrize
mkimage for
> atmelimage
> > diff --git a/drivers/mtd/nand/raw/Kconfig
> b/drivers/mtd/nand/raw/Kconfig
> > index008f7b4b4b..b99732736a100644
> > --- a/drivers/mtd/nand/raw/Kconfig
> > +++ b/drivers/mtd/nand/raw/Kconfig
> > @@ -16,6 +16,44 @@ configNAND_ATMEL
> > Enable this driver for NAND flash platforms
using an
> Atmel NAND
> > controller.
> >
> > +ifNAND_ATMEL
> > +
> > +configATMEL_NAND_HWECC
> > + bool "Atmel Hardware ECC"
> > + default n
> > +
> > +configATMEL_NAND_HW_PMECC
> > + bool "Atmel Programmable Multibit ECC (PMECC)" > > + selectATMEL_NAND_HWECC
> > + default n
> > + help
> > + The Programmable Multibit ECC (PMECC)
controller is a
> programmable
> > + binaryBCH(Bose, Chaudhuri and Hocquenghem)
encoder and
> decoder.
> > +
> > +configPMECC_CAP
> > + int "PMECC Correctable ECC Bits"
> > + depends onATMEL_NAND_HW_PMECC
> > + default 2
> > + help
> > + Correctable ECC bits, can be 2, 4, 8, 12, and 24. > > +
> > +configPMECC_SECTOR_SIZE
> > + int "PMECC Sector Size"
> > + depends onATMEL_NAND_HW_PMECC
> > + default 512
> > + help
> > + Sector size, in bytes, can be 512 or 1024. > > +
> > +configSPL_GENERATE_ATMEL_PMECC_HEADER
> > + bool "Atmel PMECC Header Generation"
> > + selectATMEL_NAND_HWECC
> > + selectATMEL_NAND_HW_PMECC
> > + default n
> > + help
> > + Generate Programmable Multibit ECC (PMECC)
header for SPL
> image.
> > +
> > +endif
> > +
> > configNAND_DAVINCI
> > bool "Support TI Davinci NAND controller" > > help
> > diff --gita/include/configs/at91sam9n12ek.h> b/include/configs/at91sam9n12ek.h
> > index6cd267eee6..777a99b730100644
> > ---a/include/configs/at91sam9n12ek.h
> > +++b/include/configs/at91sam9n12ek.h
> > @@ -59,12 +59,6 @@
> > #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) > > #endif
> >
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > -#define CONFIG_PMECC_CAP 2
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > -
> > #defineCONFIG_EXTRA_ENV_SETTINGS
> \
> > "console=console=ttyS0,115200\0"
> \
> > "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" > \
> > @@ -177,6 +171,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/at91sam9x5ek.h
> b/include/configs/at91sam9x5ek.h
> > index63305a7cdd..6adb965c3c100644
> > ---a/include/configs/at91sam9x5ek.h
> > +++b/include/configs/at91sam9x5ek.h
> > @@ -55,12 +55,6 @@
> > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > > #endif
> >
> > -/* PMECC & PMERRLOC */
> > -#define CONFIG_ATMEL_NAND_HWECC 1 > > -#define CONFIG_ATMEL_NAND_HW_PMECC 1
> > -#define CONFIG_PMECC_CAP 2
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > -
> > /* USB */
> > #ifdefCONFIG_CMD_USB
> > #ifndefCONFIG_USB_EHCI_HCD
> > @@ -151,6 +145,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/sama5d3_xplained.h> b/include/configs/sama5d3_xplained.h
> > indexd0d8087ca3..8a9a19d38e100644
> > ---a/include/configs/sama5d3_xplained.h
> > +++b/include/configs/sama5d3_xplained.h
> > @@ -43,14 +43,8 @@
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > #endif
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > -#define CONFIG_PMECC_CAP 4
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> >
> > /* USB */
> > -
> > #ifdefCONFIG_CMD_USB
> > #defineCONFIG_USB_ATMEL
> > #defineCONFIG_USB_ATMEL_CLK_SEL_UPLL
> > @@ -88,6 +82,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/sama5d3xek.h
> b/include/configs/sama5d3xek.h
> > index4d3c3b8314..ca1c2b0861100644
> > ---a/include/configs/sama5d3xek.h
> > +++b/include/configs/sama5d3xek.h
> > @@ -62,14 +62,8 @@
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > #endif
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > -#define CONFIG_PMECC_CAP 4
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> >
> > /* USB */
> > -
> Unrelated change ?
>
> > #ifdefCONFIG_CMD_USB
> > #defineCONFIG_USB_ATMEL_CLK_SEL_UPLL
> > #defineCONFIG_USB_OHCI_NEW
> > @@ -109,6 +103,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/sama5d4_xplained.h> b/include/configs/sama5d4_xplained.h
> > index7f8ac178f3..bbb16993ec100644
> > ---a/include/configs/sama5d4_xplained.h
> > +++b/include/configs/sama5d4_xplained.h
> > @@ -37,9 +37,6 @@
> > /* our CLE is AD22 */
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > #endif
> >
> > /* SPL */
> > @@ -64,8 +61,6 @@
> > #defineCONFIG_SPL_NAND_DRIVERS
> > #defineCONFIG_SPL_NAND_BASE
> > #endif
> > -#define CONFIG_PMECC_CAP 8
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > #defineCONFIG_SYS_NAND_U_BOOT_OFFS0x40000> > #defineCONFIG_SYS_NAND_5_ADDR_CYCLE
> > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > > @@ -73,6 +68,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 224 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x40000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/sama5d4ek.h
> b/include/configs/sama5d4ek.h
> > indexaa8573d8ba..d58041650c100644
> > ---a/include/configs/sama5d4ek.h
> > +++b/include/configs/sama5d4ek.h
> > @@ -37,9 +37,6 @@
> > /* our CLE is AD22 */
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > #endif
> >
> > /* SPL */
> > @@ -63,8 +60,6 @@
> > #defineCONFIG_SPL_NAND_DRIVERS
> > #defineCONFIG_SPL_NAND_BASE
> > #endif
> > -#define CONFIG_PMECC_CAP 8
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > #defineCONFIG_SYS_NAND_U_BOOT_OFFS0x40000> > #defineCONFIG_SYS_NAND_5_ADDR_CYCLE
> > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > > @@ -72,6 +67,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 224 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x40000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/wb45n.h
b/include/configs/wb45n.h
> > indexb516b66c35..add4019b31100644
> > ---a/include/configs/wb45n.h
> > +++b/include/configs/wb45n.h
> > @@ -48,12 +48,6 @@
> > #define CONFIG_SYS_NAND_ENABLE_PINAT91_PIN_PD4> > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > >
> > -/* PMECC & PMERRLOC */
> > -#define CONFIG_ATMEL_NAND_HWECC 1
> > -#define CONFIG_ATMEL_NAND_HW_PMECC 1
> > -#define CONFIG_PMECC_CAP 4
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > -
> > #defineCONFIG_RBTREE
> > #defineCONFIG_LZO
> >
> > @@ -141,6 +135,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64
> > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif /*__CONFIG_H__*/ > > diff --gita/include/configs/wb50n.h
b/include/configs/wb50n.h
> > index40ca9d602b..2684b6c16c100644
> > ---a/include/configs/wb50n.h
> > +++b/include/configs/wb50n.h
> > @@ -57,11 +57,6 @@
> > /* our CLE is AD22 */
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > -#define CONFIG_PMECC_CAP 8
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> >
> > /* Ethernet Hardware */
> > #defineCONFIG_MACB
> > @@ -118,6 +113,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64
> > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/scripts/config_whitelist.txt
> b/scripts/config_whitelist.txt
> > indexb8addeaf69..f798c6542a100644
> > ---a/scripts/config_whitelist.txt
> > +++b/scripts/config_whitelist.txt
> > @@ -97,8 +97,6 @@CONFIG_ATMEL_LCD_BGR555
> > CONFIG_ATMEL_LCD_RGB565
> > CONFIG_ATMEL_LEGACY
> > CONFIG_ATMEL_MCI_8BIT
> > -CONFIG_ATMEL_NAND_HWECC
> > -CONFIG_ATMEL_NAND_HW_PMECC
> > CONFIG_ATMEL_SPI0
> > CONFIG_AT_TRANS
> > CONFIG_AUTO_ZRELADDR
> > @@ -1509,8 +1507,6 @@CONFIG_PLATINUM_PROJECT> > CONFIG_PM
> > CONFIG_PMC_BR_PRELIM
> > CONFIG_PMC_OR_PRELIM
> > -CONFIG_PMECC_CAP
> > -CONFIG_PMECC_SECTOR_SIZE
> > CONFIG_PME_PLAT_CLK_DIV
> > CONFIG_PMU
> > CONFIG_PMW_BASE
> > @@ -1875,7 +1871,6 @@CONFIG_SPL_FS_LOAD_ARGS_NAME> > CONFIG_SPL_FS_LOAD_KERNEL_NAME
> > CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
> > CONFIG_SPL_GD_ADDR
> > -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
> > CONFIG_SPL_INIT_MINIMAL
> > CONFIG_SPL_JR0_LIODN_NS
> > CONFIG_SPL_JR0_LIODN_S
> >
>
PATCH 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 74 lines · Eugen.Hristev at microchip.com
Quoted 71 lines · Derald Woods
On Fri, Jan 11, 2019, 10:51 AM Derald Woods <[email protected] <mailto:[email protected]> wrote:
On Fri, Jan 11, 2019, 5:27 AM <[email protected] <mailto:[email protected]> wrote:
On 10.01.2019 03:00, Derald Woods wrote:
> On Mon, Jan 7, 2019 at 3:40 AM <[email protected]
<mailto:[email protected]>
> <mailto:[email protected]
<mailto:[email protected]>>> wrote:
>
> Hi Derald,
>
> Thank you for the patch,
>
> Some minor questions inline.
>
>
>
> Sorry for the late response. Family and day job take priority. >
> The patch is the simplest technical conversion that I could
produce with
> my board (SAMA5D3-XPLD) as the test platform. I was very
careful not to
> touch anything unrelated. It is not intended to address
permutations
> outside of the PMECCKconfigscope. I have submitted these
type of
> conversions to U-Boot in the past. Adding speculative things
is risky
> when you only have one development board. The patch works
well, for me,
> and addresses the original need. All items, in the patch, are
currently
> in scope. If there are additions and/or modifications, feel
free to
> modify the patch. It is complete from my perspective. I do
not have any
> additional time to chase this any further. I have been
developing for
> some time now and can handle an 'out of tree' patch, in my
environment,
> until something better comes along. This patch is just my
contribution
> to the process.Hello Derald,
From my point of view the PMECC header generation for SPL
should be
done if and only if the SPL is being placed in NAND flash namely defconfigs having *nandflash* in the name.Thus I disagree with enabling it on spiflash configurations (like you
did for the *mmc* configurations looks OK)The patch is about 'one' thing.
Kconfigconversion. Things that you are mentioning do not invalidate my patch. I tried not to add things that were not there originally. That is generally discouraged scope creep. The patch does its job in a provable manner with
Quoted 9 lines
Quoted 3 lines
'without'
changing existing usage.
Ok, I understand your point.
Can you make theCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERdepend onNAND_BOOTthough ? This way the errors cannot happen again.
I agree.
Quoted 3 lines
Also the other defconfigs need to depend on NAND if they are strict NAND related.
But are the existing configs that enable both SPL_GENERATE_ATMEL_PMECC_HEADER and SPI_BOOT really valid?
It would appear that those entries may just be placeholders in the event that an end-user enabled PMECC and NAND_BOOT for that particular board.
I could rework the patch to remove PMECC items from non-NAND_BOOT configs. Comments could be used to preserve previous values. Does this sound reasonable?
Additionally, I would make ATMEL_NAND_HW_PMECC dependent on ATMEL_NAND_HWECC as it should be.
I can only test on the SAMA5D3-XPLD board.
Derald
Quoted 772 lines
Maybe we can get more opinions from someone more familiar with the NAND subsystem ? Adding Miquel and Boris.
Thanks,
Eugen
Quoted 765 lines
Derald
If you have any reasons or arguments , or anyone else does, please correct me.
If you do not have time to change the patch, that is OK, I can take over
at some point when I have the time or someone else can pick and rework a
little bit on that specific point and make a v2.Thanks again,
Eugen
>
> Cheers,
>
> Derald
>
>
> On 15.12.2018 09:36, Derald D. Woods wrote:
> > This commit converts the following items toKconfig:
> >
> >CONFIG_ATMEL_NAND_HWECC
> >CONFIG_ATMEL_NAND_HW_PMECC
> >CONFIG_PMECC_CAP
> >CONFIG_PMECC_SECTOR_SIZE
> >CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
> >
> > [PMECC References]
> >
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
> >
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
> >
> > [Mailing List Thread]
> >
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html
> >
> > Fixes:5541543f("configs: at91: Remove
CONFIG_SYS_EXTRA_OPTIONS
> assignment")
> > Reported-by: Daniel Evans <[email protected]
<mailto:[email protected]>
> <mailto:[email protected]
<mailto:[email protected]>>>
> > Cc: Eugen Hristev <[email protected]
<mailto:[email protected]>
> <mailto:[email protected]
<mailto:[email protected]>>>
> > Signed-off-by: Derald D. Woods
<woods.technical at gmail.com <mailto:[email protected]>
> <mailto:[email protected]
<mailto:[email protected]>>>
> > ---
> > configs/at91sam9n12ek_mmc_defconfig | 1 + > > configs/at91sam9n12ek_nandflash_defconfig | 3 ++ > > configs/at91sam9n12ek_spiflash_defconfig | 3 ++ > > configs/at91sam9x5ek_dataflash_defconfig | 3 ++ > > configs/at91sam9x5ek_mmc_defconfig | 1 + > > configs/at91sam9x5ek_nandflash_defconfig | 3 ++ > > configs/at91sam9x5ek_spiflash_defconfig | 3 ++ > > configs/sama5d3_xplained_mmc_defconfig | 1 + > > configs/sama5d3_xplained_nandflash_defconfig | 3 ++ > > configs/sama5d3xek_mmc_defconfig | 1 + > > configs/sama5d3xek_nandflash_defconfig | 3 ++ > > configs/sama5d3xek_spiflash_defconfig | 3 ++ > > configs/sama5d4_xplained_mmc_defconfig | 1 + > > configs/sama5d4_xplained_nandflash_defconfig | 3 ++ > > configs/sama5d4_xplained_spiflash_defconfig | 3 ++ > > configs/sama5d4ek_mmc_defconfig | 1 + > > configs/sama5d4ek_nandflash_defconfig | 3 ++ > > configs/sama5d4ek_spiflash_defconfig | 3 ++ > > configs/wb45n_defconfig | 3 ++ > > configs/wb50n_defconfig | 3 ++ > > doc/README.atmel_pmecc | 13
++++---
> > drivers/mtd/nand/raw/Kconfig | 38 > ++++++++++++++++++++
> > include/configs/at91sam9n12ek.h | 7 ---- > > include/configs/at91sam9x5ek.h | 7 ---- > > include/configs/sama5d3_xplained.h | 7 ---- > > include/configs/sama5d3xek.h | 7 ---- > > include/configs/sama5d4_xplained.h | 6 ---- > > include/configs/sama5d4ek.h | 6 ---- > > include/configs/wb45n.h | 7 ---- > > include/configs/wb50n.h | 6 ---- > > scripts/config_whitelist.txt | 5 --- > > 31 files changed, 92 insertions(+), 65 deletions(-) > >
> > diff --git a/configs/at91sam9n12ek_mmc_defconfig > b/configs/at91sam9n12ek_mmc_defconfig
> > index6b2cfe9c42..7b46eb498d100644
> > --- a/configs/at91sam9n12ek_mmc_defconfig
> > +++ b/configs/at91sam9n12ek_mmc_defconfig
> > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9N12EK=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9n12ek_nandflash_defconfig > b/configs/at91sam9n12ek_nandflash_defconfig
> > index354c24ff16..4e34a517fd100644
> > --- a/configs/at91sam9n12ek_nandflash_defconfig > > +++ b/configs/at91sam9n12ek_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9N12EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9n12ek_spiflash_defconfig > b/configs/at91sam9n12ek_spiflash_defconfig
> > index63889355bf..500c3ab088100644
> > --- a/configs/at91sam9n12ek_spiflash_defconfig > > +++ b/configs/at91sam9n12ek_spiflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9N12EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Do we need to generate the PMECC header forSPI_BOOT
configurations ?
> I would say this would be required only forNAND_BOOT>
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9x5ek_dataflash_defconfig > b/configs/at91sam9x5ek_dataflash_defconfig
> > indexdc13509715..60d865cc23100644
> > --- a/configs/at91sam9x5ek_dataflash_defconfig > > +++ b/configs/at91sam9x5ek_dataflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9X5EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9x5ek_mmc_defconfig > b/configs/at91sam9x5ek_mmc_defconfig
> > indexff86f93e61..75f7fbd199100644
> > --- a/configs/at91sam9x5ek_mmc_defconfig
> > +++ b/configs/at91sam9x5ek_mmc_defconfig
> > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9X5EK=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9x5ek_nandflash_defconfig > b/configs/at91sam9x5ek_nandflash_defconfig
> > indexb2b3ddb6d9..dd6bdee7f9100644
> > --- a/configs/at91sam9x5ek_nandflash_defconfig > > +++ b/configs/at91sam9x5ek_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9X5EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/at91sam9x5ek_spiflash_defconfig > b/configs/at91sam9x5ek_spiflash_defconfig
> > indexd0eebcdc75..8d8108888c100644
> > --- a/configs/at91sam9x5ek_spiflash_defconfig > > +++ b/configs/at91sam9x5ek_spiflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_AT91SAM9X5EK=y
> > +CONFIG_PMECC_CAP=2
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Ditto.
>
> > CONFIG_SYS_MALLOC_F_LEN=0x2000
> > CONFIG_DEBUG_UART_BOARD_INIT=y
> > CONFIG_DEBUG_UART_BASE=0xfffff200
> > diff --git a/configs/sama5d3_xplained_mmc_defconfig > b/configs/sama5d3_xplained_mmc_defconfig
> > indexeab38ec366..51d5aeaf0e100644
> > --- a/configs/sama5d3_xplained_mmc_defconfig > > +++ b/configs/sama5d3_xplained_mmc_defconfig > > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3_XPLAINED=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d3_xplained_nandflash_defconfig > b/configs/sama5d3_xplained_nandflash_defconfig
> > indexff7d2bffdd..ce1f28607e100644
> > --- a/configs/sama5d3_xplained_nandflash_defconfig > > +++ b/configs/sama5d3_xplained_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3_XPLAINED=y
> > +CONFIG_PMECC_CAP=4
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d3xek_mmc_defconfig > b/configs/sama5d3xek_mmc_defconfig
> > index6faea0ec3f..49d4334213100644
> > --- a/configs/sama5d3xek_mmc_defconfig
> > +++ b/configs/sama5d3xek_mmc_defconfig
> > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3XEK=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d3xek_nandflash_defconfig > b/configs/sama5d3xek_nandflash_defconfig
> > indexe641279ee1..b0d56e0e3e100644
> > --- a/configs/sama5d3xek_nandflash_defconfig > > +++ b/configs/sama5d3xek_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3XEK=y
> > +CONFIG_PMECC_CAP=4
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d3xek_spiflash_defconfig > b/configs/sama5d3xek_spiflash_defconfig
> > index37f603d528..cf2fb9e65b100644
> > --- a/configs/sama5d3xek_spiflash_defconfig
> > +++ b/configs/sama5d3xek_spiflash_defconfig
> > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D3XEK=y
> > +CONFIG_PMECC_CAP=4
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Ditto
>
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4_xplained_mmc_defconfig > b/configs/sama5d4_xplained_mmc_defconfig
> > indexbfcea3f519..35b8302b60100644
> > --- a/configs/sama5d4_xplained_mmc_defconfig > > +++ b/configs/sama5d4_xplained_mmc_defconfig > > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4_XPLAINED=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4_xplained_nandflash_defconfig > b/configs/sama5d4_xplained_nandflash_defconfig
> > index2c1b7f17c0..93714ed0c7100644
> > --- a/configs/sama5d4_xplained_nandflash_defconfig > > +++ b/configs/sama5d4_xplained_nandflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4_XPLAINED=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4_xplained_spiflash_defconfig > b/configs/sama5d4_xplained_spiflash_defconfig
> > indexa89dd11a8c..e1eb0c72cd100644
> > --- a/configs/sama5d4_xplained_spiflash_defconfig > > +++ b/configs/sama5d4_xplained_spiflash_defconfig > > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4_XPLAINED=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Ditto
>
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4ek_mmc_defconfig > b/configs/sama5d4ek_mmc_defconfig
> > index45e6539913..bd238f7f14100644
> > --- a/configs/sama5d4ek_mmc_defconfig
> > +++ b/configs/sama5d4ek_mmc_defconfig
> > @@ -2,6 +2,7 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4EK=y
> > +#CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERis not set > > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4ek_nandflash_defconfig > b/configs/sama5d4ek_nandflash_defconfig
> > index 1497110452..3816bfb273 100644
> > --- a/configs/sama5d4ek_nandflash_defconfig
> > +++ b/configs/sama5d4ek_nandflash_defconfig
> > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4EK=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/sama5d4ek_spiflash_defconfig > b/configs/sama5d4ek_spiflash_defconfig
> > indexdad32b5711..242081e6a1100644
> > --- a/configs/sama5d4ek_spiflash_defconfig
> > +++ b/configs/sama5d4ek_spiflash_defconfig
> > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x26f00000
> > CONFIG_TARGET_SAMA5D4EK=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
>
> Ditto
>
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/wb45n_defconfig
b/configs/wb45n_defconfig
> > index9d881e5d41..15fc17ac00100644
> > --- a/configs/wb45n_defconfig
> > +++ b/configs/wb45n_defconfig
> > @@ -3,6 +3,9 @@CONFIG_SYS_THUMB_BUILD=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x23f00000
> > CONFIG_TARGET_WB45N=y
> > +CONFIG_PMECC_CAP=4
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/configs/wb50n_defconfig
b/configs/wb50n_defconfig
> > indexc74eba1012..a7e9a53448100644
> > --- a/configs/wb50n_defconfig
> > +++ b/configs/wb50n_defconfig
> > @@ -2,6 +2,9 @@CONFIG_ARM=y
> > CONFIG_ARCH_AT91=y
> > CONFIG_SYS_TEXT_BASE=0x23f00000
> > CONFIG_TARGET_WB50N=y
> > +CONFIG_PMECC_CAP=8
> > +CONFIG_PMECC_SECTOR_SIZE=512
> > +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
> > CONFIG_SPL_GPIO_SUPPORT=y
> > CONFIG_SPL_LIBCOMMON_SUPPORT=y
> > CONFIG_SPL_LIBGENERIC_SUPPORT=y
> > diff --git a/doc/README.atmel_pmecc
b/doc/README.atmel_pmecc
> > index274d860f06..c86d085779100644
> > --- a/doc/README.atmel_pmecc
> > +++ b/doc/README.atmel_pmecc
> > @@ -20,13 +20,12 @@ To use PMECC in this driver, the
user needs
> to set:
> > 2. The PMECC sector size:CONFIG_PMECC_SECTOR_SIZE. > > It only can be 512 or 1024.
> >
> > -Take AT91SAM9X5EK as an example, the board definition
file likes:
> > +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an
example,
> the board
> > +configuration file has the following entries:
> >
> > -/* PMECC & PMERRLOC */
> > -#define CONFIG_ATMEL_NAND_HWECC 1 > > -#define CONFIG_ATMEL_NAND_HW_PMECC 1
> > -#define CONFIG_PMECC_CAP 2
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > + CONFIG_PMECC_CAP=2
> > + CONFIG_PMECC_SECTOR_SIZE=512
> > + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y > >
> > How to enable PMECC header for direct programmable
boot.bin
> >
-----------------------------------------------------------
> > @@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April
2014) defines
> how this PMECC header has to
> > look like. In order to do so we have a new image
type added to
> mkimage to
> > generate this PMECC header and integrated this into
the build
> process of SPL.
> >
> > -To enable the generation of atmel PMECC header for
SPL one need
> to define
> > +To enable the generation of atmel PMECC header for
SPL one needs
> to define
> > CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required
parameters
> are taken from
> > board configuration and compiled into the host tools > atmel_pmecc_params. This
> > tool will be called in build process to parametrize
mkimage for
> atmelimage
> > diff --git a/drivers/mtd/nand/raw/Kconfig
> b/drivers/mtd/nand/raw/Kconfig
> > index008f7b4b4b..b99732736a100644
> > --- a/drivers/mtd/nand/raw/Kconfig
> > +++ b/drivers/mtd/nand/raw/Kconfig
> > @@ -16,6 +16,44 @@ configNAND_ATMEL
> > Enable this driver for NAND flash platforms
using an
> Atmel NAND
> > controller.
> >
> > +ifNAND_ATMEL
> > +
> > +configATMEL_NAND_HWECC
> > + bool "Atmel Hardware ECC"
> > + default n
> > +
> > +configATMEL_NAND_HW_PMECC
> > + bool "Atmel Programmable Multibit ECC (PMECC)" > > + selectATMEL_NAND_HWECC
> > + default n
> > + help
> > + The Programmable Multibit ECC (PMECC)
controller is a
> programmable
> > + binaryBCH(Bose, Chaudhuri and Hocquenghem)
encoder and
> decoder.
> > +
> > +configPMECC_CAP
> > + int "PMECC Correctable ECC Bits"
> > + depends onATMEL_NAND_HW_PMECC
> > + default 2
> > + help
> > + Correctable ECC bits, can be 2, 4, 8, 12, and 24. > > +
> > +configPMECC_SECTOR_SIZE
> > + int "PMECC Sector Size"
> > + depends onATMEL_NAND_HW_PMECC
> > + default 512
> > + help
> > + Sector size, in bytes, can be 512 or 1024. > > +
> > +configSPL_GENERATE_ATMEL_PMECC_HEADER
> > + bool "Atmel PMECC Header Generation"
> > + selectATMEL_NAND_HWECC
> > + selectATMEL_NAND_HW_PMECC
> > + default n
> > + help
> > + Generate Programmable Multibit ECC (PMECC)
header for SPL
> image.
> > +
> > +endif
> > +
> > configNAND_DAVINCI
> > bool "Support TI Davinci NAND controller" > > help
> > diff --gita/include/configs/at91sam9n12ek.h> b/include/configs/at91sam9n12ek.h
> > index6cd267eee6..777a99b730100644
> > ---a/include/configs/at91sam9n12ek.h
> > +++b/include/configs/at91sam9n12ek.h
> > @@ -59,12 +59,6 @@
> > #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) > > #endif
> >
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > -#define CONFIG_PMECC_CAP 2
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > -
> > #defineCONFIG_EXTRA_ENV_SETTINGS
> \
> > "console=console=ttyS0,115200\0"
> \
> > "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" > \
> > @@ -177,6 +171,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/at91sam9x5ek.h
> b/include/configs/at91sam9x5ek.h
> > index63305a7cdd..6adb965c3c100644
> > ---a/include/configs/at91sam9x5ek.h
> > +++b/include/configs/at91sam9x5ek.h
> > @@ -55,12 +55,6 @@
> > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > > #endif
> >
> > -/* PMECC & PMERRLOC */
> > -#define CONFIG_ATMEL_NAND_HWECC 1 > > -#define CONFIG_ATMEL_NAND_HW_PMECC 1
> > -#define CONFIG_PMECC_CAP 2
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > -
> > /* USB */
> > #ifdefCONFIG_CMD_USB
> > #ifndefCONFIG_USB_EHCI_HCD
> > @@ -151,6 +145,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/sama5d3_xplained.h> b/include/configs/sama5d3_xplained.h
> > indexd0d8087ca3..8a9a19d38e100644
> > ---a/include/configs/sama5d3_xplained.h
> > +++b/include/configs/sama5d3_xplained.h
> > @@ -43,14 +43,8 @@
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > #endif
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > -#define CONFIG_PMECC_CAP 4
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> >
> > /* USB */
> > -
> > #ifdefCONFIG_CMD_USB
> > #defineCONFIG_USB_ATMEL
> > #defineCONFIG_USB_ATMEL_CLK_SEL_UPLL
> > @@ -88,6 +82,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/sama5d3xek.h
> b/include/configs/sama5d3xek.h
> > index4d3c3b8314..ca1c2b0861100644
> > ---a/include/configs/sama5d3xek.h
> > +++b/include/configs/sama5d3xek.h
> > @@ -62,14 +62,8 @@
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > #endif
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > -#define CONFIG_PMECC_CAP 4
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> >
> > /* USB */
> > -
> Unrelated change ?
>
> > #ifdefCONFIG_CMD_USB
> > #defineCONFIG_USB_ATMEL_CLK_SEL_UPLL
> > #defineCONFIG_USB_OHCI_NEW
> > @@ -109,6 +103,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/sama5d4_xplained.h> b/include/configs/sama5d4_xplained.h
> > index7f8ac178f3..bbb16993ec100644
> > ---a/include/configs/sama5d4_xplained.h
> > +++b/include/configs/sama5d4_xplained.h
> > @@ -37,9 +37,6 @@
> > /* our CLE is AD22 */
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > #endif
> >
> > /* SPL */
> > @@ -64,8 +61,6 @@
> > #defineCONFIG_SPL_NAND_DRIVERS
> > #defineCONFIG_SPL_NAND_BASE
> > #endif
> > -#define CONFIG_PMECC_CAP 8
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > #defineCONFIG_SYS_NAND_U_BOOT_OFFS0x40000> > #defineCONFIG_SYS_NAND_5_ADDR_CYCLE
> > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > > @@ -73,6 +68,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 224 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x40000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/sama5d4ek.h
> b/include/configs/sama5d4ek.h
> > indexaa8573d8ba..d58041650c100644
> > ---a/include/configs/sama5d4ek.h
> > +++b/include/configs/sama5d4ek.h
> > @@ -37,9 +37,6 @@
> > /* our CLE is AD22 */
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > #endif
> >
> > /* SPL */
> > @@ -63,8 +60,6 @@
> > #defineCONFIG_SPL_NAND_DRIVERS
> > #defineCONFIG_SPL_NAND_BASE
> > #endif
> > -#define CONFIG_PMECC_CAP 8
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > #defineCONFIG_SYS_NAND_U_BOOT_OFFS0x40000> > #defineCONFIG_SYS_NAND_5_ADDR_CYCLE
> > #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000 > > @@ -72,6 +67,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 224 > > #define CONFIG_SYS_NAND_BLOCK_SIZE0x40000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/include/configs/wb45n.h
b/include/configs/wb45n.h
> > indexb516b66c35..add4019b31100644
> > ---a/include/configs/wb45n.h
> > +++b/include/configs/wb45n.h
> > @@ -48,12 +48,6 @@
> > #define CONFIG_SYS_NAND_ENABLE_PINAT91_PIN_PD4> > #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 > >
> > -/* PMECC & PMERRLOC */
> > -#define CONFIG_ATMEL_NAND_HWECC 1
> > -#define CONFIG_ATMEL_NAND_HW_PMECC 1
> > -#define CONFIG_PMECC_CAP 4
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> > -
> > #defineCONFIG_RBTREE
> > #defineCONFIG_LZO
> >
> > @@ -141,6 +135,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64
> > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif /*__CONFIG_H__*/ > > diff --gita/include/configs/wb50n.h
b/include/configs/wb50n.h
> > index40ca9d602b..2684b6c16c100644
> > ---a/include/configs/wb50n.h
> > +++b/include/configs/wb50n.h
> > @@ -57,11 +57,6 @@
> > /* our CLE is AD22 */
> > #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) > > #defineCONFIG_SYS_NAND_ONFI_DETECTION
> > -/* PMECC & PMERRLOC */
> > -#defineCONFIG_ATMEL_NAND_HWECC
> > -#defineCONFIG_ATMEL_NAND_HW_PMECC
> > -#define CONFIG_PMECC_CAP 8
> > -#define CONFIG_PMECC_SECTOR_SIZE 512
> >
> > /* Ethernet Hardware */
> > #defineCONFIG_MACB
> > @@ -118,6 +113,5 @@
> > #define CONFIG_SYS_NAND_OOBSIZE 64
> > #define CONFIG_SYS_NAND_BLOCK_SIZE0x20000> > #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 > > -#defineCONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER> >
> > #endif
> > diff --gita/scripts/config_whitelist.txt
> b/scripts/config_whitelist.txt
> > indexb8addeaf69..f798c6542a100644
> > ---a/scripts/config_whitelist.txt
> > +++b/scripts/config_whitelist.txt
> > @@ -97,8 +97,6 @@CONFIG_ATMEL_LCD_BGR555
> > CONFIG_ATMEL_LCD_RGB565
> > CONFIG_ATMEL_LEGACY
> > CONFIG_ATMEL_MCI_8BIT
> > -CONFIG_ATMEL_NAND_HWECC
> > -CONFIG_ATMEL_NAND_HW_PMECC
> > CONFIG_ATMEL_SPI0
> > CONFIG_AT_TRANS
> > CONFIG_AUTO_ZRELADDR
> > @@ -1509,8 +1507,6 @@CONFIG_PLATINUM_PROJECT> > CONFIG_PM
> > CONFIG_PMC_BR_PRELIM
> > CONFIG_PMC_OR_PRELIM
> > -CONFIG_PMECC_CAP
> > -CONFIG_PMECC_SECTOR_SIZE
> > CONFIG_PME_PLAT_CLK_DIV
> > CONFIG_PMU
> > CONFIG_PMW_BASE
> > @@ -1875,7 +1871,6 @@CONFIG_SPL_FS_LOAD_ARGS_NAME> > CONFIG_SPL_FS_LOAD_KERNEL_NAME
> > CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
> > CONFIG_SPL_GD_ADDR
> > -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
> > CONFIG_SPL_INIT_MINIMAL
> > CONFIG_SPL_JR0_LIODN_NS
> > CONFIG_SPL_JR0_LIODN_S
> >
>
cover ARM: at91: NAND PMECC Kconfig conversion
In reply to Derald D. WoodsThis series converts to SPL_GENERATE_ATMEL_PMECC_HEADER Kconfig. The focus is Kconfig conversion and clean build for the affected boards.
Derald D. Woods (2):
nand: atmel: Replace SYS_NAND_ECC_BASE with ATMEL_BASE_ECC
ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 3 ++ configs/at91sam9n12ek_spiflash_defconfig | 1 + configs/at91sam9x5ek_dataflash_defconfig | 1 + configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 3 ++ configs/at91sam9x5ek_spiflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 3 ++ configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 3 ++ configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 3 ++ configs/sama5d4ek_spiflash_defconfig | 1 + configs/wb45n_defconfig | 3 ++ configs/wb50n_defconfig | 3 ++ doc/README.atmel_pmecc | 13 +++---- drivers/mtd/nand/raw/Kconfig | 39 ++++++++++++++++++++ drivers/mtd/nand/raw/atmel_nand.c | 19 +++++----- include/configs/at91sam9n12ek.h | 7 ---- include/configs/at91sam9x5ek.h | 7 ---- include/configs/sama5d3_xplained.h | 7 ---- include/configs/sama5d3xek.h | 7 ---- include/configs/sama5d4_xplained.h | 6 --- include/configs/sama5d4ek.h | 6 --- include/configs/snapper9g45.h | 1 - include/configs/wb45n.h | 7 ---- include/configs/wb50n.h | 6 --- scripts/config_whitelist.txt | 6 --- 33 files changed, 91 insertions(+), 76 deletions(-)
Signature · 1 line
2.20.1
PATCH 1/2 nand: atmel: Replace SYS_NAND_ECC_BASE with ATMEL_BASE_ECC
This commit removes remaining uses of SYS_NAND_ECC_BASE. Including "<asm/arch/hardware.h>" in "drivers/mtd/nand/raw/atmel_nand.c" provides access to ATMEL_BASE_ECC.
--- drivers/mtd/nand/raw/atmel_nand.c | 19 ++++++++++--------- include/configs/snapper9g45.h | 1 - scripts/config_whitelist.txt | 1 - 3 files changed, 10 insertions(+), 11 deletions(-)
drivers/mtd/nand/raw/atmel_nand.c +10 -9
@@ -13,6 +13,7 @@#include <common.h> #include <asm/gpio.h> #include <asm/arch/gpio.h> +#include <asm/arch/hardware.h> #include <malloc.h> #include <nand.h>
@@ -995,13 +996,13 @@ static int atmel_nand_calculate(struct mtd_info *mtd,unsigned int ecc_value;/* get the first 2 ECC bytes */ - ecc_value =ecc_readl (CONFIG_SYS_NAND_ECC_BASE ,PR ); + ecc_value =ecc_readl (ATMEL_BASE_ECC ,PR ); ecc_code[0 ] = ecc_value &0xFF ; ecc_code[1 ] = (ecc_value >>8 ) &0xFF ;/* get the last 2 ECC bytes */ - ecc_value =ecc_readl (CONFIG_SYS_NAND_ECC_BASE ,NPR ) &ATMEL_ECC_NPARITY ; + ecc_value =ecc_readl (ATMEL_BASE_ECC ,NPR ) &ATMEL_ECC_NPARITY ; ecc_code[2 ] = ecc_value &0xFF ; ecc_code[3 ] = (ecc_value >>8 ) &0xFF ;
@@ -1084,16 +1085,16 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,unsigned int ecc_word, ecc_bit;/* get the status from the Status Register */ - ecc_status =ecc_readl (CONFIG_SYS_NAND_ECC_BASE ,SR ); + ecc_status =ecc_readl (ATMEL_BASE_ECC ,SR );/* if there's no error */ if (likely (!(ecc_status &ATMEL_ECC_RECERR )))return 0 ;/* get error bit offset (4 bits) */ - ecc_bit =ecc_readl (CONFIG_SYS_NAND_ECC_BASE ,PR ) &ATMEL_ECC_BITADDR ; + ecc_bit =ecc_readl (ATMEL_BASE_ECC ,PR ) &ATMEL_ECC_BITADDR ;/* get word address (12 bits) */ - ecc_word =ecc_readl (CONFIG_SYS_NAND_ECC_BASE ,PR ) &ATMEL_ECC_WORDADDR ; + ecc_word =ecc_readl (ATMEL_BASE_ECC ,PR ) &ATMEL_ECC_WORDADDR ; ecc_word >>=4 ;/* if there are multiple errors */
@@ -1164,22 +1165,22 @@ int atmel_hwecc_nand_init_param(struct nand_chip *nand, struct mtd_info *mtd)switch (mtd->writesize) {case 512 : nand->ecc.layout = &atmel_oobinfo_small; -ecc_writel (CONFIG_SYS_NAND_ECC_BASE ,MR , +ecc_writel (ATMEL_BASE_ECC ,MR ,ATMEL_ECC_PAGESIZE_528 );break ;case 1024 : nand->ecc.layout = &atmel_oobinfo_large; -ecc_writel (CONFIG_SYS_NAND_ECC_BASE ,MR , +ecc_writel (ATMEL_BASE_ECC ,MR ,ATMEL_ECC_PAGESIZE_1056 );break ;case 2048 : nand->ecc.layout = &atmel_oobinfo_large; -ecc_writel (CONFIG_SYS_NAND_ECC_BASE ,MR , +ecc_writel (ATMEL_BASE_ECC ,MR ,ATMEL_ECC_PAGESIZE_2112 );break ;case 4096 : nand->ecc.layout = &atmel_oobinfo_large; -ecc_writel (CONFIG_SYS_NAND_ECC_BASE ,MR , +ecc_writel (ATMEL_BASE_ECC ,MR ,ATMEL_ECC_PAGESIZE_4224 );break ;default :
include/configs/snapper9g45.h +0 -1
@@ -36,7 +36,6 @@/* NAND Flash */ #define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC#define CONFIG_SYS_MAX_NAND_DEVICE 1#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3#define CONFIG_SYS_NAND_DBW_8
scripts/config_whitelist.txt +0 -1
@@ -3543,7 +3543,6 @@ CONFIG_SYS_NAND_ECCPOS CONFIG_SYS_NAND_ECCSIZE CONFIG_SYS_NAND_ECCSTEPS CONFIG_SYS_NAND_ECCTOTAL -CONFIG_SYS_NAND_ECC_BASE CONFIG_SYS_NAND_ENABLE_PIN CONFIG_SYS_NAND_ENABLE_PIN_SPL CONFIG_SYS_NAND_FTIM0
Signature · 1 line
2.20.1
PATCH 2/2 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
In reply to Derald D. WoodsThis commit converts the following items to Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
Config files not explicitly containing the name *nandflash* will have PMECC disabled. PMECC support requires that a header be applied to "boot.bin". The generated PMECC "boot.bin" is intended for NAND media.
[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html
---
v2:
- Make ATMEL_NAND_HW_PMECC dependent on ATMEL_NAND_HWECC
- Make SPL_GENERATE_ATMEL_PMECC_HEADER dependent on NAND_BOOT
- Remove PMECC from non-NAND_BOOT configs
--- configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 3 ++ configs/at91sam9n12ek_spiflash_defconfig | 1 + configs/at91sam9x5ek_dataflash_defconfig | 1 + configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 3 ++ configs/at91sam9x5ek_spiflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 3 ++ configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 3 ++ configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 3 ++ configs/sama5d4ek_spiflash_defconfig | 1 + configs/wb45n_defconfig | 3 ++ configs/wb50n_defconfig | 3 ++ doc/README.atmel_pmecc | 13 +++---- drivers/mtd/nand/raw/Kconfig | 39 ++++++++++++++++++++ include/configs/at91sam9n12ek.h | 7 ---- include/configs/at91sam9x5ek.h | 7 ---- include/configs/sama5d3_xplained.h | 7 ---- include/configs/sama5d3xek.h | 7 ---- include/configs/sama5d4_xplained.h | 6 --- include/configs/sama5d4ek.h | 6 --- include/configs/wb45n.h | 7 ---- include/configs/wb50n.h | 6 --- scripts/config_whitelist.txt | 5 --- 31 files changed, 81 insertions(+), 65 deletions(-)
configs/at91sam9n12ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9n12ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9n12ek_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_dataflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/sama5d3_xplained_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3_xplained_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/wb45n_defconfig +3 -0
@@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB45N=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/wb50n_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB50N=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
doc/README.atmel_pmecc +6 -7
@@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. It only can be 512 or 1024. -Take AT91SAM9X5EK as an example, the board definition file likes: +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board +configuration file has the following entries: -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 + CONFIG_PMECC_CAP=2 + CONFIG_PMECC_SECTOR_SIZE=512 + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y How to enable PMECC header for direct programmable boot.bin -----------------------------------------------------------
@@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to look like. In order to do so we have a new image type added to mkimage to generate this PMECC header and integrated this into the build process of SPL. -To enable the generation of atmel PMECC header for SPL one need to define +To enable the generation of atmel PMECC header for SPL one needs to define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from board configuration and compiled into the host tools atmel_pmecc_params. This tool will be called in build process to parametrize mkimage for atmelimage
drivers/mtd/nand/raw/Kconfig +39 -0
@@ -18,10 +18,49 @@ config SYS_NAND_DRIVER_ECC_LAYOUT config NAND_ATMEL bool "Support Atmel NAND controller" imply SYS_NAND_USE_FLASH_BBT + select SYS_NAND_DRIVER_ECC_LAYOUT help Enable this driver for NAND flash platforms using an Atmel NAND controller. +if NAND_ATMEL + +config ATMEL_NAND_HWECC + bool "Atmel Hardware ECC" + default n + +config ATMEL_NAND_HW_PMECC + bool "Atmel Programmable Multibit ECC (PMECC)" + depends on NAND_BOOT + select ATMEL_NAND_HWECC + default n + help + The Programmable Multibit ECC (PMECC) controller is a programmable + binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. + +config PMECC_CAP + int "PMECC Correctable ECC Bits" + depends on ATMEL_NAND_HW_PMECC + default 2 + help + Correctable ECC bits, can be 2, 4, 8, 12, and 24. + +config PMECC_SECTOR_SIZE + int "PMECC Sector Size" + depends on ATMEL_NAND_HW_PMECC + default 512 + help + Sector size, in bytes, can be 512 or 1024. + +config SPL_GENERATE_ATMEL_PMECC_HEADER + bool "Atmel PMECC Header Generation" + select ATMEL_NAND_HW_PMECC + default y + help + Generate Programmable Multibit ECC (PMECC) header for SPL image. + +endif + config NAND_DAVINCI bool "Support TI Davinci NAND controller" help
include/configs/at91sam9n12ek.h +0 -7
@@ -59,12 +59,6 @@#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
@@ -177,6 +171,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/at91sam9x5ek.h +0 -7
@@ -55,12 +55,6 @@#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -/* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD
@@ -151,6 +145,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d3_xplained.h +0 -7
@@ -43,14 +43,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
@@ -88,6 +82,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d3xek.h +0 -7
@@ -62,14 +62,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW
@@ -109,6 +103,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d4_xplained.h +0 -6
@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */
@@ -64,8 +61,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
@@ -73,6 +68,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d4ek.h +0 -6
@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */
@@ -63,8 +60,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
@@ -72,6 +67,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/wb45n.h +0 -7
@@ -48,12 +48,6 @@#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_RBTREE #define CONFIG_LZO
@@ -141,6 +135,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif /* __CONFIG_H__ */
include/configs/wb50n.h +0 -6
@@ -57,11 +57,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512/* Ethernet Hardware */ #define CONFIG_MACB
@@ -118,6 +113,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
scripts/config_whitelist.txt +0 -5
@@ -96,8 +96,6 @@ CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_ATMEL_LEGACY CONFIG_ATMEL_MCI_8BIT -CONFIG_ATMEL_NAND_HWECC -CONFIG_ATMEL_NAND_HW_PMECC CONFIG_ATMEL_SPI0 CONFIG_AT_TRANS CONFIG_AUTO_ZRELADDR
@@ -1502,8 +1500,6 @@ CONFIG_PLATINUM_PROJECT CONFIG_PM CONFIG_PMC_BR_PRELIM CONFIG_PMC_OR_PRELIM -CONFIG_PMECC_CAP -CONFIG_PMECC_SECTOR_SIZE CONFIG_PME_PLAT_CLK_DIV CONFIG_PMU CONFIG_PMW_BASE
@@ -1868,7 +1864,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_JR0_LIODN_NS CONFIG_SPL_JR0_LIODN_S
Signature · 1 line
2.20.1
cover ARM: at91: NAND PMECC Kconfig conversion
In reply to Derald D. WoodsQuoted 6 lines · Derald D. Woods
This series converts to
SPL_GENERATE_ATMEL_PMECC_HEADERKconfig. The focus isKconfigconversion and clean build for the affected boards.Derald D. Woods (2):
nand: atmel: ReplaceSYS_NAND_ECC_BASEwithATMEL_BASE_ECC
ARM: at91: ConvertSPL_GENERATE_ATMEL_PMECC_HEADERtoKconfig
This series causes a ton of problems now on:
pm9g45 at91sam9261ek_dataflash_cs3 at91sam9261ek_dataflash_cs0 at91sam9xeek_dataflash_cs1 at91sam9260ek_dataflash_cs0 at91sam9260ek_dataflash_cs1 at91sam9260ek_nandflash at91sam9263ek_dataflash_cs0 ethernut5 sama5d2_ptc_ek_mmc at91sam9g20ek_dataflash_cs1 at91sam9g20ek_dataflash_cs0 sama5d2_ptc_ek_nandflash at91sam9xeek_nandflash at91sam9m10g45ek_nandflash snapper9g20 at91sam9rlek_mmc at91sam9xeek_dataflash_cs0 at91sam9g10ek_nandflash at91sam9g10ek_dataflash_cs3 at91sam9g10ek_dataflash_cs0 at91sam9g20ek_2mmc_nandflash at91sam9263ek_norflash_boot at91sam9g20ek_nandflash snapper9260 at91sam9g20ek_2mmc at91sam9263ek_norflash at91sam9261ek_nandflash meesc pm9261 pm9263 at91sam9m10g45ek_mmc gurnard usb_a9263_dataflash at91sam9rlek_nandflash at91sam9263ek_dataflash at91sam9263ek_nandflash at91sam9rlek_dataflash
Signature · 8 lines
Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: not available URL: <http://lists.denx.de/pipermail/u-boot/attachments/20190119/36862b7d/attachment.sig>
cover ARM: at91: NAND PMECC Kconfig conversion
Quoted 9 lines · On Sat, Jan 19, 2019, 5:29 PM Tom Rini <[email protected] wrote:
Quoted 6 lines · Derald D. Woods
This series converts to
SPL_GENERATE_ATMEL_PMECC_HEADERKconfig. The focus isKconfigconversion and clean build for the affected boards.Derald D. Woods (2):
nand: atmel: ReplaceSYS_NAND_ECC_BASEwithATMEL_BASE_ECC
ARM: at91: ConvertSPL_GENERATE_ATMEL_PMECC_HEADERtoKconfig
Quoted 16 lines
This series causes a ton of problems now on:
pm9g45at91sam9261ek_dataflash_cs3at91sam9261ek_dataflash_cs0at91sam9xeek_dataflash_cs1at91sam9260ek_dataflash_cs0at91sam9260ek_dataflash_cs1at91sam9260ek_nandflashat91sam9263ek_dataflash_cs0ethernut5sama5d2_ptc_ek_mmcat91sam9g20ek_dataflash_cs1at91sam9g20ek_dataflash_cs0sama5d2_ptc_ek_nandflashat91sam9xeek_nandflashat91sam9m10g45ek_nandflashsnapper9g20at91sam9rlek_mmcat91sam9xeek_dataflash_cs0at91sam9g10ek_nandflashat91sam9g10ek_dataflash_cs3at91sam9g10ek_dataflash_cs0at91sam9g20ek_2mmc_nandflashat91sam9263ek_norflash_bootat91sam9g20ek_nandflashsnapper9260at91sam9g20ek_2mmcat91sam9263ek_norflashat91sam9261ek_nandflashmeesc pm9261 pm9263at91sam9m10g45ek_mmcgurnardusb_a9263_dataflashat91sam9rlek_nandflashat91sam9263ek_dataflashat91sam9263ek_nandflashat91sam9rlek_dataflash
OK. So this is likely due to patch 0001 only. I will drop it. And try a few of these configs.
Derald
Quoted 3 lines
--
Tom
v2 cover ARM: at91: NAND PMECC Kconfig conversion
In reply to Derald D. WoodsThis series converts to SPL_GENERATE_ATMEL_PMECC_HEADER Kconfig. The focus is Kconfig conversion and clean build for the affected boards.
Derald D. Woods (1):
ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 3 ++ configs/at91sam9n12ek_spiflash_defconfig | 1 + configs/at91sam9x5ek_dataflash_defconfig | 1 + configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 3 ++ configs/at91sam9x5ek_spiflash_defconfig | 1 + configs/sama5d2_ptc_ek_mmc_defconfig | 1 + configs/sama5d2_ptc_ek_nandflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 3 ++ configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 3 ++ configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 3 ++ configs/sama5d4ek_spiflash_defconfig | 1 + configs/wb45n_defconfig | 3 ++ configs/wb50n_defconfig | 3 ++ doc/README.atmel_pmecc | 13 +++---- drivers/mtd/nand/raw/Kconfig | 39 ++++++++++++++++++++ include/configs/at91sam9n12ek.h | 7 ---- include/configs/at91sam9x5ek.h | 7 ---- include/configs/sama5d2_ptc_ek.h | 15 ++++++-- include/configs/sama5d3_xplained.h | 7 ---- include/configs/sama5d3xek.h | 7 ---- include/configs/sama5d4_xplained.h | 6 --- include/configs/sama5d4ek.h | 6 --- include/configs/wb45n.h | 7 ---- include/configs/wb50n.h | 6 --- scripts/config_whitelist.txt | 5 --- 34 files changed, 95 insertions(+), 68 deletions(-)
---
v2:
- Dropped SYS_NAND_ECC_BASE patch due to multiple config failures
- Added sama5d2_ptc_ek board which also defines ATMEL_NAND_HW_PMECC
Signature · 1 line
2.20.1
PATCH v3 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
This commit converts the following items to Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
Config files not explicitly containing the name *nandflash* will have PMECC disabled. PMECC support requires that a header be applied to "boot.bin". The generated PMECC "boot.bin" is intended for NAND media.
[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html
--- configs/at91sam9n12ek_mmc_defconfig | 1 + configs/at91sam9n12ek_nandflash_defconfig | 3 ++ configs/at91sam9n12ek_spiflash_defconfig | 1 + configs/at91sam9x5ek_dataflash_defconfig | 1 + configs/at91sam9x5ek_mmc_defconfig | 1 + configs/at91sam9x5ek_nandflash_defconfig | 3 ++ configs/at91sam9x5ek_spiflash_defconfig | 1 + configs/sama5d2_ptc_ek_mmc_defconfig | 1 + configs/sama5d2_ptc_ek_nandflash_defconfig | 1 + configs/sama5d3_xplained_mmc_defconfig | 1 + configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sama5d3xek_mmc_defconfig | 1 + configs/sama5d3xek_nandflash_defconfig | 3 ++ configs/sama5d3xek_spiflash_defconfig | 1 + configs/sama5d4_xplained_mmc_defconfig | 1 + configs/sama5d4_xplained_nandflash_defconfig | 3 ++ configs/sama5d4_xplained_spiflash_defconfig | 1 + configs/sama5d4ek_mmc_defconfig | 1 + configs/sama5d4ek_nandflash_defconfig | 3 ++ configs/sama5d4ek_spiflash_defconfig | 1 + configs/wb45n_defconfig | 3 ++ configs/wb50n_defconfig | 3 ++ doc/README.atmel_pmecc | 13 +++---- drivers/mtd/nand/raw/Kconfig | 39 ++++++++++++++++++++ include/configs/at91sam9n12ek.h | 7 ---- include/configs/at91sam9x5ek.h | 7 ---- include/configs/sama5d2_ptc_ek.h | 15 ++++++-- include/configs/sama5d3_xplained.h | 7 ---- include/configs/sama5d3xek.h | 7 ---- include/configs/sama5d4_xplained.h | 6 --- include/configs/sama5d4ek.h | 6 --- include/configs/wb45n.h | 7 ---- include/configs/wb50n.h | 6 --- scripts/config_whitelist.txt | 5 --- 34 files changed, 95 insertions(+), 68 deletions(-)
---
v3:
- Added sama5d2_ptc_ek board which also defines ATMEL_NAND_HW_PMECC
v2:
- Make ATMEL_NAND_HW_PMECC dependent on ATMEL_NAND_HWECC
- Make SPL_GENERATE_ATMEL_PMECC_HEADER dependent on NAND_BOOT
- Remove PMECC from non-NAND_BOOT configs
configs/at91sam9n12ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9n12ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9n12ek_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_dataflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_PMECC_CAP=2 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/at91sam9x5ek_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9X5EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xfffff200
configs/sama5d2_ptc_ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D2_PTC_EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000
configs/sama5d2_ptc_ek_nandflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D2_PTC_EK=y +CONFIG_ATMEL_NAND_HW_PMECC=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000
configs/sama5d3_xplained_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3_xplained_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3_XPLAINED=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d3xek_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4_xplained_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4_XPLAINED=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_mmc_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_nandflash_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/sama5d4ek_spiflash_defconfig +1 -0
@@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D4EK=y +# CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER is not set CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/wb45n_defconfig +3 -0
@@ -3,6 +3,9 @@ CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB45N=y +CONFIG_PMECC_CAP=4 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
configs/wb50n_defconfig +3 -0
@@ -2,6 +2,9 @@ CONFIG_ARM=y CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_TARGET_WB50N=y +CONFIG_PMECC_CAP=8 +CONFIG_PMECC_SECTOR_SIZE=512 +CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
doc/README.atmel_pmecc +6 -7
@@ -20,13 +20,12 @@ To use PMECC in this driver, the user needs to set: 2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE. It only can be 512 or 1024. -Take AT91SAM9X5EK as an example, the board definition file likes: +Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board +configuration file has the following entries: -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 + CONFIG_PMECC_CAP=2 + CONFIG_PMECC_SECTOR_SIZE=512 + CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y How to enable PMECC header for direct programmable boot.bin -----------------------------------------------------------
@@ -40,7 +39,7 @@ sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to look like. In order to do so we have a new image type added to mkimage to generate this PMECC header and integrated this into the build process of SPL. -To enable the generation of atmel PMECC header for SPL one need to define +To enable the generation of atmel PMECC header for SPL one needs to define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from board configuration and compiled into the host tools atmel_pmecc_params. This tool will be called in build process to parametrize mkimage for atmelimage
drivers/mtd/nand/raw/Kconfig +39 -0
@@ -18,10 +18,49 @@ config SYS_NAND_DRIVER_ECC_LAYOUT config NAND_ATMEL bool "Support Atmel NAND controller" imply SYS_NAND_USE_FLASH_BBT + select SYS_NAND_DRIVER_ECC_LAYOUT help Enable this driver for NAND flash platforms using an Atmel NAND controller. +if NAND_ATMEL + +config ATMEL_NAND_HWECC + bool "Atmel Hardware ECC" + default n + +config ATMEL_NAND_HW_PMECC + bool "Atmel Programmable Multibit ECC (PMECC)" + depends on NAND_BOOT + select ATMEL_NAND_HWECC + default n + help + The Programmable Multibit ECC (PMECC) controller is a programmable + binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. + +config PMECC_CAP + int "PMECC Correctable ECC Bits" + depends on ATMEL_NAND_HW_PMECC + default 2 + help + Correctable ECC bits, can be 2, 4, 8, 12, and 24. + +config PMECC_SECTOR_SIZE + int "PMECC Sector Size" + depends on ATMEL_NAND_HW_PMECC + default 512 + help + Sector size, in bytes, can be 512 or 1024. + +config SPL_GENERATE_ATMEL_PMECC_HEADER + bool "Atmel PMECC Header Generation" + select ATMEL_NAND_HW_PMECC + default y + help + Generate Programmable Multibit ECC (PMECC) header for SPL image. + +endif + config NAND_DAVINCI bool "Support TI Davinci NAND controller" help
include/configs/at91sam9n12ek.h +0 -7
@@ -59,12 +59,6 @@#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5)#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_EXTRA_ENV_SETTINGS \ "console=console=ttyS0,115200\0" \ "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
@@ -177,6 +171,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/at91sam9x5ek.h +0 -7
@@ -55,12 +55,6 @@#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5#endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 2 -#define CONFIG_PMECC_SECTOR_SIZE 512 -/* USB */ #ifdef CONFIG_CMD_USB #ifndef CONFIG_USB_EHCI_HCD
@@ -151,6 +145,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d2_ptc_ek.h +12 -3
@@ -33,9 +33,18 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE BIT(22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif +#ifdef CONFIG_NAND_BOOT +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_BASE +#endif +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_SIZE 0x800 +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 +#endif /* __CONFIG_H */
include/configs/sama5d3_xplained.h +0 -7
@@ -43,14 +43,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_UPLL
@@ -88,6 +82,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d3xek.h +0 -7
@@ -62,14 +62,8 @@#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION #endif -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512/* USB */ -#ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL_CLK_SEL_UPLL #define CONFIG_USB_OHCI_NEW
@@ -109,6 +103,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d4_xplained.h +0 -6
@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */
@@ -64,8 +61,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
@@ -73,6 +68,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/sama5d4ek.h +0 -6
@@ -37,9 +37,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC #endif /* SPL */
@@ -63,8 +60,6 @@#define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_BASE #endif -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000#define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_SIZE 0x1000
@@ -72,6 +67,5 @@#define CONFIG_SYS_NAND_OOBSIZE 224#define CONFIG_SYS_NAND_BLOCK_SIZE 0x40000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
include/configs/wb45n.h +0 -7
@@ -48,12 +48,6 @@#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC 1 -#define CONFIG_ATMEL_NAND_HW_PMECC 1 -#define CONFIG_PMECC_CAP 4 -#define CONFIG_PMECC_SECTOR_SIZE 512 -#define CONFIG_RBTREE #define CONFIG_LZO
@@ -141,6 +135,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif /* __CONFIG_H__ */
include/configs/wb50n.h +0 -6
@@ -57,11 +57,6 @@/* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)#define CONFIG_SYS_NAND_ONFI_DETECTION -/* PMECC & PMERRLOC */ -#define CONFIG_ATMEL_NAND_HWECC -#define CONFIG_ATMEL_NAND_HW_PMECC -#define CONFIG_PMECC_CAP 8 -#define CONFIG_PMECC_SECTOR_SIZE 512/* Ethernet Hardware */ #define CONFIG_MACB
@@ -118,6 +113,5 @@#define CONFIG_SYS_NAND_OOBSIZE 64#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 -#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER #endif
scripts/config_whitelist.txt +0 -5
@@ -96,8 +96,6 @@ CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_ATMEL_LEGACY CONFIG_ATMEL_MCI_8BIT -CONFIG_ATMEL_NAND_HWECC -CONFIG_ATMEL_NAND_HW_PMECC CONFIG_ATMEL_SPI0 CONFIG_AT_TRANS CONFIG_AUTO_ZRELADDR
@@ -1502,8 +1500,6 @@ CONFIG_PLATINUM_PROJECT CONFIG_PM CONFIG_PMC_BR_PRELIM CONFIG_PMC_OR_PRELIM -CONFIG_PMECC_CAP -CONFIG_PMECC_SECTOR_SIZE CONFIG_PME_PLAT_CLK_DIV CONFIG_PMU CONFIG_PMW_BASE
@@ -1868,7 +1864,6 @@ CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FS_LOAD_KERNEL_NAME CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SPL_GD_ADDR -CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER CONFIG_SPL_INIT_MINIMAL CONFIG_SPL_JR0_LIODN_NS CONFIG_SPL_JR0_LIODN_S
Signature · 1 line
2.20.1
PATCH v3 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 16 lines · Derald D. Woods
This commit converts the following items to
Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERConfig files not explicitly containing the name *nandflash* will have PMECC disabled. PMECC support requires that a header be applied to "boot.bin". The generated PMECC "boot.bin" is intended for NAND media.
[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
Quoted 7 lines
[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")Reported-by Daniel Evans <[email protected]>Cc Eugen Hristev <[email protected]>Signed-off-by Derald D. Woods <[email protected]>
So, this too has a bunch of problems:
pm9g45 at91sam9261ek_dataflash_cs3 at91sam9261ek_dataflash_cs0 at91sam9xeek_dataflash_cs1 at91sam9260ek_dataflash_cs0 at91sam9260ek_dataflash_cs1 at91sam9260ek_nandflash at91sam9263ek_dataflash_cs0 ethernut5 at91sam9g20ek_dataflash_cs1 at91sam9g20ek_dataflash_cs0 wb50n at91sam9xeek_nandflash at91sam9m10g45ek_nandflash snapper9g20 at91sam9rlek_mmc at91sam9xeek_dataflash_cs0 at91sam9g10ek_nandflash at91sam9g10ek_dataflash_cs3 at91sam9g10ek_dataflash_cs0 at91sam9g20ek_2mmc_nandflash at91sam9263ek_norflash_boot at91sam9g20ek_nandflash snapper9260 at91sam9g20ek_2mmc at91sam9263ek_norflash at91sam9261ek_nandflash meesc pm9261 pm9263 at91sam9m10g45ek_mmc gurnard wb45n usb_a9263_dataflash at91sam9rlek_nandflash at91sam9263ek_dataflash at91sam9263ek_nandflash at91sam9rlek_dataflash
v1 was actually pretty close to size neutral and nothing failed to build. I'm going to build that again and tweak it for neutrality. Thanks again!
Signature · 8 lines
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PATCH v3 1/1 ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
Quoted 43 lines · Tom Rini
Quoted 12 lines · Derald D. Woods
This commit converts the following items to
Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADERConfig files not explicitly containing the name *nandflash* will have PMECC disabled. PMECC support requires that a header be applied to "boot.bin". The generated PMECC "boot.bin" is intended for NAND media.
Quoted 8 lines
[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONSassignment")
Quoted 3 lines
Reported-by Daniel Evans <[email protected]>Cc Eugen Hristev <[email protected]>Signed-off-by Derald D. Woods <[email protected]>So, this too has a bunch of problems:
pm9g45at91sam9261ek_dataflash_cs3at91sam9261ek_dataflash_cs0at91sam9xeek_dataflash_cs1at91sam9260ek_dataflash_cs0at91sam9260ek_dataflash_cs1at91sam9260ek_nandflashat91sam9263ek_dataflash_cs0ethernut5at91sam9g20ek_dataflash_cs1at91sam9g20ek_dataflash_cs0wb50nat91sam9xeek_nandflashat91sam9m10g45ek_nandflashsnapper9g20at91sam9rlek_mmcat91sam9xeek_dataflash_cs0at91sam9g10ek_nandflashat91sam9g10ek_dataflash_cs3at91sam9g10ek_dataflash_cs0at91sam9g20ek_2mmc_nandflashat91sam9263ek_norflash_bootat91sam9g20ek_nandflashsnapper9260at91sam9g20ek_2mmcat91sam9263ek_norflashat91sam9261ek_nandflashmeesc pm9261 pm9263at91sam9m10g45ek_mmcgurnard wb45nusb_a9263_dataflashat91sam9rlek_nandflashat91sam9263ek_dataflashat91sam9263ek_nandflashat91sam9rlek_dataflash
Quoted 4 lines
v1 was actually pretty close to size neutral and nothing failed to build. I'm going to build that again and tweak it for neutrality. Thanks again!
Sounds good to me. Sometimes you have to stick with your first thoughts. The simple change is usually the best case.
Derald
Quoted 4 lines
--
Tom
[U-Boot] ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig
In reply to Derald D. WoodsQuoted 12 lines · Derald D. Woods
This commit converts the following items to
Kconfig:
CONFIG_ATMEL_NAND_HWECCCONFIG_ATMEL_NAND_HW_PMECCCONFIG_PMECC_CAPCONFIG_PMECC_SECTOR_SIZECONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap
Quoted 7 lines
[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")Reported-by Daniel Evans <[email protected]>Cc Eugen Hristev <[email protected]>Signed-off-by Derald D. Woods <[email protected]>
Note that to make this more size neutral I had to tweak a few configs and I hope I didn't inadvertently re-break some platforms. However, with them in Kconfig now a re-adjustment and removal of drivers that shouldn't be there for a specific defconfig is easier, sorry about the potential noise!
Also, I see but couldn't quite track down which option wasn't quite right on sama5d2_ptc_ek_mmc and sama5d2_ptc_ek_nandflash as we're seeing some size reduction in atmel_nand_chip_init() but non-obvious to me which option is/isn't set and I re-checked the migration.
Applied to u-boot/master, thanks!
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