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arm64: dts: qcom: qcs404: Add Ethernet node

PATCH New Vinod Koul 1 participant 2 messages Feb 1, 2019

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Vinod Koul

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#0 lore raw

PATCH v2 1/2 arm64: dts: qcom: qcs404: Add Ethernet node

Add the ethernet node found in QCS404 platform.

Co-developed-by Niklas Cassel <[email protected]>
Signed-off-by Niklas Cassel <[email protected]>
Signed-off-by Vinod Koul <[email protected]>

---
changes in v2:
- add queues and mtl config

 arch/arm64/boot/dts/qcom/qcs404.dtsi | 71 ++++++++++++++++++++++++++++
 1 file changed, 71 insertions(+)
arch/arm64/boot/dts/qcom/qcs404.dtsi +71 -0
index 76699435c8bd..e4f6bba0c7f2 100644
@@ -646,6 +646,77 @@
 			status = "disabled";
 		};
 
+		ethernet: ethernet@7a80000 {
+			compatible = "qcom,qcs404-ethqos";
+			reg = <0x07a80000 0x10000>,
+				<0x07a96000 0x100>;
+			reg-names = "stmmaceth", "rgmii";
+			clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
+			clocks = <&gcc GCC_ETH_AXI_CLK>,
+				<&gcc GCC_ETH_SLAVE_AHB_CLK>,
+				<&gcc GCC_ETH_PTP_CLK>,
+				<&gcc GCC_ETH_RGMII_CLK>;
+			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+					<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq", "eth_lpi";
+
+			snps,axi-config = <&stmmac_axi_setup>;
+			snps,mtl-rx-config = <&mtl_rx_setup>;
+			snps,mtl-tx-config = <&mtl_tx_setup>;
+
+			snps,txpbl = <8>;
+			snps,rxpbl = <2>;
+			snps,aal;
+			snps,tso;
+			rx-fifo-depth = <16384>;
+			tx-fifo-depth = <20480>;
+
+			status = "disabled";
+
+			stmmac_axi_setup: stmmac-axi-setup {
+				snps,rd_osr_lmt = <2>;
+				snps,blen = <0 0 0 0 16 8 4>;
+			};
+
+			mtl_rx_setup: rx-queues-config {
+				snps,rx-queues-to-use = <0x4>;
+				snps,rx-sched-sp;
+
+				queue0 {
+					snps,dcb-algorithm;
+				};
+				queue1 {
+					snps,dcb-algorithm;
+				};
+				queue2 {
+					snps,dcb-algorithm;
+				};
+				queue3 {
+					snps,dcb-algorithm;
+				};
+			};
+			mtl_tx_setup: tx-queues-config {
+				snps,tx-queues-to-use = <0x5>;
+				snps,tx-sched-sp;
+
+				queue0 {
+					snps,dcb-algorithm;
+				};
+				queue1 {
+					snps,dcb-algorithm;
+				};
+				queue2 {
+					snps,dcb-algorithm;
+				};
+				queue3 {
+					snps,dcb-algorithm;
+				};
+				queue4 {
+					snps,dcb-algorithm;
+				};
+			};
+		};
+
 		blsp2_dma: dma@7ac4000 {
 			compatible = "qcom,bam-v1.7.0";
 			reg = <0x07ac4000 0x17000>;
Signature · 1 line
2.20.1
author
#1 lore raw

PATCH v2 2/2 arm64: dts: qcom: qcs404: Enable ethernet for EVB-4000

EVB-4000 comes with ethernet so enable it and add pinctrl bindings.

Co-developed-by Niklas Cassel <[email protected]>
Signed-off-by Niklas Cassel <[email protected]>
Signed-off-by Vinod Koul <[email protected]>

---
Changes in v2:
squash patch2 and 3
add ethernet-phy-ieee802.3-c22 compatible

 arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts | 82 ++++++++++++++++++++
 1 file changed, 82 insertions(+)
arch/arm64/boot/dts/qcom/qcs404-evb-4000.dts +82 -0
index 11269ad3de0d..8234cff414de 100644
@@ -3,9 +3,91 @@
 
 /dts-v1/;
 
+#include <dt-bindings/gpio/gpio.h>
 #include "qcs404-evb.dtsi"
 
 / {
 	model = "Qualcomm Technologies, Inc. QCS404 EVB 4000";
 	compatible = "qcom,qcs404-evb";
 };
+
+&ethernet {
+	status = "ok";
+
+	snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 10000>;
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&ethernet_defaults>;
+
+	phy-handle = <&phy1>;
+	phy-mode = "rgmii";
+	mdio {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		compatible = "snps,dwmac-mdio";
+		phy1: phy@4 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			device_type = "ethernet-phy";
+			reg = <0x4>;
+		};
+	};
+};
+
+&tlmm {
+	ethernet_defaults: ethernet-defaults {
+		int {
+			pins = "gpio61";
+			function = "rgmii_int";
+			bias-disable;
+			drive-strength = <2>;
+		};
+		mdc {
+			pins = "gpio76";
+			function = "rgmii_mdc";
+			bias-pull-up;
+		};
+		mdio {
+			pins = "gpio75";
+			function = "rgmii_mdio";
+			bias-pull-up;
+		};
+		tx {
+			pins = "gpio67", "gpio66", "gpio65", "gpio64";
+			function = "rgmii_tx";
+			bias-pull-up;
+			drive-strength = <16>;
+		};
+		rx {
+			pins = "gpio73", "gpio72", "gpio71", "gpio70";
+			function = "rgmii_rx";
+			bias-disable;
+			drive-strength = <2>;
+		};
+		tx-ctl {
+			pins = "gpio68";
+			function = "rgmii_ctl";
+			bias-pull-up;
+			drive-strength = <16>;
+		};
+		rx-ctl {
+			pins = "gpio74";
+			function = "rgmii_ctl";
+			bias-disable;
+			drive-strength = <2>;
+		};
+		tx-ck {
+			pins = "gpio63";
+			function = "rgmii_ck";
+			bias-pull-up;
+			drive-strength = <16>;
+		};
+		rx-ck {
+			pins = "gpio69";
+			function = "rgmii_ck";
+			bias-disable;
+			drive-strength = <2>;
+		};
+	};
+};
Signature · 1 line
2.20.1