i915/gem_mocs_settings: Add mocs table for icelake

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
 tests/i915/gem_mocs_settings.c | 145 +++++++++++++++++++++++++++------
 1 file changed, 122 insertions(+), 23 deletions(-)

tests/i915/gem_mocs_settings.c +4 -0

index 5b3b6bc1..b84273a0 100644
@@ -33,6 +33,10 @@
 #include "igt_sysfs.h"
 
 #define MAX_NUMBER_MOCS_REGISTERS	(64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved.
 */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+#define MOCS_PTE_INDEX		(0x1)
+
 enum {
 	NONE,

tests/i915/gem_mocs_settings.c +83 -21

 	RESET,

@@ -65,6 +69,7 @@ static const char * const test_modes[] = {
 struct mocs_entry {
 	uint32_t	control_value;
 	uint16_t	l3cc_value;
+	uint8_t		used;
 };
 
 struct mocs_table {

@@ -73,37 +78,113 @@ struct mocs_table {
 };
 
 /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-	{ 0x00000009, 0x0010 },
-	{ 0x00000038, 0x0030 },
-	{ 0x0000003b, 0x0030 },
+static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+	[0]  = { 0x00000005, 0x0010, 0x1 },
+	[1]  = { 0x00000004, 0x0030, 0x1 },
+	[2]  = { 0x00000037, 0x0030, 0x1 },
+	[3]  = { 0x00000005, 0x0010, 0x1 },
+	[4]  = { 0x00000005, 0x0030, 0x1 },
+	[5]  = { 0x00000037, 0x0010, 0x1 },
+	[6]  = { 0x00000017, 0x0010, 0x1 },
+	[7]  = { 0x00000017, 0x0030, 0x1 },
+	[8]  = { 0x00000027, 0x0010, 0x1 },
+	[9]  = { 0x00000027, 0x0030, 0x1 },
+	[10] = { 0x00000077, 0x0010, 0x1 },
+	[11] = { 0x00000077, 0x0030, 0x1 },
+	[12] = { 0x00000057, 0x0010, 0x1 },
+	[13] = { 0x00000057, 0x0030, 0x1 },
+	[14] = { 0x00000067, 0x0010, 0x1 },
+	[15] = { 0x00000067, 0x0030, 0x1 },
+	[18] = { 0x00060037, 0x0030, 0x1 },
+	[19] = { 0x00000737, 0x0030, 0x1 },
+	[20] = { 0x00000337, 0x0030, 0x1 },
+	[21] = { 0x00000137, 0x0030, 0x1 },
+	[22] = { 0x000003b7, 0x0030, 0x1 },
+	[23] = { 0x000007b7, 0x0030, 0x1 },
+	[62] = { 0x00000037, 0x0010, 0x1 },
+	[63] = { 0x00000037, 0x0010, 0x1 },
+};
+
+static struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+	[0]  = { 0x0007FFFF, 0x003F },
+	[1]  = { 0x0007FFFF, 0x003F },
+	[2]  = { 0x0007FFFF, 0x003F },
+	[3]  = { 0x0007FFFF, 0x003F },
+	[4]  = { 0x0007FFFF, 0x003F },
+	[5]  = { 0x0007FFFF, 0x003F },
+	[6]  = { 0x0007FFFF, 0x003F },
+	[7]  = { 0x0007FFFF, 0x003F },
+	[8]  = { 0x0007FFFF, 0x003F },
+	[9]  = { 0x0007FFFF, 0x003F },
+	[10] = { 0x0007FFFF, 0x003F },
+	[11] = { 0x0007FFFF, 0x003F },
+	[12] = { 0x0007FFFF, 0x003F },
+	[13] = { 0x0007FFFF, 0x003F },
+	[14] = { 0x0007FFFF, 0x003F },
+	[15] = { 0x0007FFFF, 0x003F },
+	[18] = { 0x0007FFFF, 0x003F },
+	[19] = { 0x0007FFFF, 0x003F },
+	[21] = { 0x0007FFFF, 0x003F },
+	[22] = { 0x0007FFFF, 0x003F },
+	[23] = { 0x0007FFFF, 0x003F },
+	[62] = { 0x0007FFFF, 0x003F },
+	[63] = { 0x0007FFFF, 0x003F },
 };
 
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-	{ 0x00003FFF, 0x003F }, /* no snoop bit */
-	{ 0x00003FFF, 0x003F },
-	{ 0x00003FFF, 0x003F },
+static struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	{ 0x00000009, 0x0010, 0x1 },
+	{ 0x00000038, 0x0030, 0x1 },
+	{ 0x0000003b, 0x0030, 0x1 },
 };
 
-static const struct mocs_entry broxton_mocs_table[] = {
-	{ 0x00000009, 0x0010 },
-	{ 0x00000038, 0x0030 },
-	{ 0x00000039, 0x0030 },
+static struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	{ 0x00003FFF, 0x003F, 0x1 }, /* no snoop bit */
+	{ 0x00003FFF, 0x003F, 0x1 },
+	{ 0x00003FFF, 0x003F, 0x1 },
 };
 
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-	{ 0x00007FFF, 0x003F },
-	{ 0x00007FFF, 0x003F },
-	{ 0x00007FFF, 0x003F },
+static struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	{ 0x00000009, 0x0010, 0x1 },
+	{ 0x00000038, 0x0030, 0x1 },
+	{ 0x00000039, 0x0030, 0x1 },
 };
 
-static const uint32_t write_values[] = {
-	0xFFFFFFFF,
-	0xFFFFFFFF,
-	0xFFFFFFFF,
-	0xFFFFFFFF
+static struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	{ 0x00007FFF, 0x003F, 0x1 },
+	{ 0x00007FFF, 0x003F, 0x1 },
+	{ 0x00007FFF, 0x003F, 0x1 },
 };
 
+static uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS];
+
+static void set_mocs_settings(void)
+{
+	uint8_t index;
+	/* Set un-used entries to PTE */
+	for (index = 0; index < MAX_NUMBER_MOCS_REGISTERS; index++) {
+		if (index < GEN9_NUM_MOCS_ENTRIES) {
+			if (!skylake_mocs_table[index].used) {
+				skylake_mocs_table[index]
 =  skylake_mocs_table[MOCS_PTE_INDEX];
+				dirty_skylake_mocs_table[index]
 =  dirty_skylake_mocs_table[MOCS_PTE_INDEX];
+			}
+			if (!broxton_mocs_table[index].used) {
+				broxton_mocs_table[index]
 =  broxton_mocs_table[MOCS_PTE_INDEX];
+				dirty_broxton_mocs_table[index]

= dirty_broxton_mocs_table[MOCS_PTE_INDEX];

tests/i915/gem_mocs_settings.c +3 -0

+			}
+			if (!icelake_mocs_table[index].used) {
+				icelake_mocs_table[index]

= icelake_mocs_table[MOCS_PTE_INDEX];

tests/i915/gem_mocs_settings.c +1 -0

+				dirty_icelake_mocs_table[index]

= dirty_icelake_mocs_table[MOCS_PTE_INDEX];

tests/i915/gem_mocs_settings.c +4 -0

+			}
+		} else { /*icelake has 64 entries */
+			if (!icelake_mocs_table[index].used) {
+				icelake_mocs_table[index]

= icelake_mocs_table[MOCS_PTE_INDEX];

tests/i915/gem_mocs_settings.c +1 -0

+				dirty_icelake_mocs_table[index]

= dirty_icelake_mocs_table[MOCS_PTE_INDEX];

tests/i915/gem_mocs_settings.c +4 -0

+			}
+		}
+	}
+	memset((char *)write_values, 0xFF, MAX_NUMBER_MOCS_REGISTERS *

sizeof(uint32_t));

tests/i915/gem_mocs_settings.c +11 -0

+}
+
 static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
 {
 	uint32_t devid = intel_get_drm_devid(fd);

@@ -127,6 +208,15 @@ static bool get_mocs_settings(int fd, struct mocs_table
 *table, bool dirty)
 			table->table = broxton_mocs_table;
 		}
 		result = true;
+	} else if (IS_ICELAKE(devid)) {
+		if (dirty) {
+			table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+			table->table = dirty_icelake_mocs_table;
+		} else {
+			table->size  = ARRAY_SIZE(icelake_mocs_table);
+			table->table = icelake_mocs_table;
+		}
+		result = true;
 	}
 

tests/i915/gem_mocs_settings.c +0 -0

 	return result;

@@ -374,13 +464,21 @@ static void check_mocs_values(int fd, unsigned engine,

uint32_t ctx_id, bool dir

static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id) {

tests/i915/gem_mocs_settings.c +10 -2

+	uint32_t devid = intel_get_drm_devid(fd);
+	int num_of_mocs_entries;
+
+	if (IS_ICELAKE(devid))
+		num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+	else
+		num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
 	write_registers(fd, ctx_id, get_engine_base(engine),
-			write_values, ARRAY_SIZE(write_values),
+			write_values, num_of_mocs_entries,
 			engine);
 
 	if (engine == I915_EXEC_RENDER)
 		write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
-				write_values, ARRAY_SIZE(write_values),
+				write_values, num_of_mocs_entries/2,
 				engine);
 }

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
 tests/i915/gem_mocs_settings.c | 145 +++++++++++++++++++++++++++------
 1 file changed, 122 insertions(+), 23 deletions(-)

tests/i915/gem_mocs_settings.c +68 -16

index 5b3b6bc1..b84273a0 100644
@@ -33,6 +33,10 @@
 #include "igt_sysfs.h"
 
 #define MAX_NUMBER_MOCS_REGISTERS      (64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+#define MOCS_PTE_INDEX         (0x1)
+
 enum {
        NONE,
        RESET,

@@ -65,6 +69,7 @@ static const char * const test_modes[] = {
 struct mocs_entry {
        uint32_t        control_value;
        uint16_t        l3cc_value;
+       uint8_t         used;
 };
 
 struct mocs_table {

@@ -73,37 +78,113 @@ struct mocs_table {
 };
 
 /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-       { 0x00000009, 0x0010 },
-       { 0x00000038, 0x0030 },
-       { 0x0000003b, 0x0030 },
+static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+       [0]  = { 0x00000005, 0x0010, 0x1 },
+       [1]  = { 0x00000004, 0x0030, 0x1 },
+       [2]  = { 0x00000037, 0x0030, 0x1 },
+       [3]  = { 0x00000005, 0x0010, 0x1 },
+       [4]  = { 0x00000005, 0x0030, 0x1 },
+       [5]  = { 0x00000037, 0x0010, 0x1 },
+       [6]  = { 0x00000017, 0x0010, 0x1 },
+       [7]  = { 0x00000017, 0x0030, 0x1 },
+       [8]  = { 0x00000027, 0x0010, 0x1 },
+       [9]  = { 0x00000027, 0x0030, 0x1 },
+       [10] = { 0x00000077, 0x0010, 0x1 },
+       [11] = { 0x00000077, 0x0030, 0x1 },
+       [12] = { 0x00000057, 0x0010, 0x1 },
+       [13] = { 0x00000057, 0x0030, 0x1 },
+       [14] = { 0x00000067, 0x0010, 0x1 },
+       [15] = { 0x00000067, 0x0030, 0x1 },
+       [18] = { 0x00060037, 0x0030, 0x1 },
+       [19] = { 0x00000737, 0x0030, 0x1 },
+       [20] = { 0x00000337, 0x0030, 0x1 },
+       [21] = { 0x00000137, 0x0030, 0x1 },
+       [22] = { 0x000003b7, 0x0030, 0x1 },
+       [23] = { 0x000007b7, 0x0030, 0x1 },
+       [62] = { 0x00000037, 0x0010, 0x1 },
+       [63] = { 0x00000037, 0x0010, 0x1 },
+};
+
+static struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+       [0]  = { 0x0007FFFF, 0x003F },
+       [1]  = { 0x0007FFFF, 0x003F },
+       [2]  = { 0x0007FFFF, 0x003F },
+       [3]  = { 0x0007FFFF, 0x003F },
+       [4]  = { 0x0007FFFF, 0x003F },
+       [5]  = { 0x0007FFFF, 0x003F },
+       [6]  = { 0x0007FFFF, 0x003F },
+       [7]  = { 0x0007FFFF, 0x003F },
+       [8]  = { 0x0007FFFF, 0x003F },
+       [9]  = { 0x0007FFFF, 0x003F },
+       [10] = { 0x0007FFFF, 0x003F },
+       [11] = { 0x0007FFFF, 0x003F },
+       [12] = { 0x0007FFFF, 0x003F },
+       [13] = { 0x0007FFFF, 0x003F },
+       [14] = { 0x0007FFFF, 0x003F },
+       [15] = { 0x0007FFFF, 0x003F },
+       [18] = { 0x0007FFFF, 0x003F },
+       [19] = { 0x0007FFFF, 0x003F },
+       [21] = { 0x0007FFFF, 0x003F },
+       [22] = { 0x0007FFFF, 0x003F },
+       [23] = { 0x0007FFFF, 0x003F },
+       [62] = { 0x0007FFFF, 0x003F },
+       [63] = { 0x0007FFFF, 0x003F },
 };
 
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-       { 0x00003FFF, 0x003F }, /* no snoop bit */
-       { 0x00003FFF, 0x003F },
-       { 0x00003FFF, 0x003F },
+static struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+       { 0x00000009, 0x0010, 0x1 },
+       { 0x00000038, 0x0030, 0x1 },
+       { 0x0000003b, 0x0030, 0x1 },
 };
 
-static const struct mocs_entry broxton_mocs_table[] = {
-       { 0x00000009, 0x0010 },
-       { 0x00000038, 0x0030 },
-       { 0x00000039, 0x0030 },
+static struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+       { 0x00003FFF, 0x003F, 0x1 }, /* no snoop bit */
+       { 0x00003FFF, 0x003F, 0x1 },
+       { 0x00003FFF, 0x003F, 0x1 },
 };
 
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-       { 0x00007FFF, 0x003F },
-       { 0x00007FFF, 0x003F },
-       { 0x00007FFF, 0x003F },
+static struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+       { 0x00000009, 0x0010, 0x1 },
+       { 0x00000038, 0x0030, 0x1 },
+       { 0x00000039, 0x0030, 0x1 },
 };

tests/i915/gem_mocs_settings.c +43 -3

+               if (index < GEN9_NUM_MOCS_ENTRIES) {
+                       if (!skylake_mocs_table[index].used) {
+                               skylake_mocs_table[index] =  skylake_mocs_table[MOCS_PTE_INDEX];
+                               dirty_skylake_mocs_table[index] =  dirty_skylake_mocs_table[MOCS_PTE_INDEX];
+                       }
+                       if (!broxton_mocs_table[index].used) {
+                               broxton_mocs_table[index] =  broxton_mocs_table[MOCS_PTE_INDEX];
+                               dirty_broxton_mocs_table[index] =  dirty_broxton_mocs_table[MOCS_PTE_INDEX];
+                       }
+                       if (!icelake_mocs_table[index].used) {
+                               icelake_mocs_table[index] =  icelake_mocs_table[MOCS_PTE_INDEX];
+                               dirty_icelake_mocs_table[index] =  dirty_icelake_mocs_table[MOCS_PTE_INDEX];
+                       }
+               } else { /*icelake has 64 entries */
+                       if (!icelake_mocs_table[index].used) {
+                               icelake_mocs_table[index] =  icelake_mocs_table[MOCS_PTE_INDEX];
+                               dirty_icelake_mocs_table[index] =  dirty_icelake_mocs_table[MOCS_PTE_INDEX];
+                       }
+               }
+       }
+       memset((char *)write_values, 0xFF, MAX_NUMBER_MOCS_REGISTERS * sizeof(uint32_t));
+}
+
 static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
 {
        uint32_t devid = intel_get_drm_devid(fd);

@@ -127,6 +208,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
                        table->table = broxton_mocs_table;
                }
                result = true;
+       } else if (IS_ICELAKE(devid)) {
+               if (dirty) {
+                       table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+                       table->table = dirty_icelake_mocs_table;
+               } else {
+                       table->size  = ARRAY_SIZE(icelake_mocs_table);
+                       table->table = icelake_mocs_table;
+               }
+               result = true;
        }
 
        return result;

@@ -374,13 +464,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
 
 static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
 {
+       uint32_t devid = intel_get_drm_devid(fd);
+       int num_of_mocs_entries;
+
+       if (IS_ICELAKE(devid))
+               num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+       else
+               num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
        write_registers(fd, ctx_id, get_engine_base(engine),
-                       write_values, ARRAY_SIZE(write_values),
+                       write_values, num_of_mocs_entries,
                        engine);
 
        if (engine == I915_EXEC_RENDER)
                write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
-                               write_values, ARRAY_SIZE(write_values),
+                               write_values, num_of_mocs_entries/2,
                                engine);
 }
 

@@ -440,6 +538,7 @@ igt_main
                fd = drm_open_driver_master(DRIVER_INTEL); /* for SECURE */
                igt_require_gem(fd);
                gem_require_mocs_registers(fd);
+               set_mocs_settings();
                igt_require(get_mocs_settings(fd, &table, false));
        }
 
--

2.20.1

static const struct mocs_entry icelake_mocs_pte = { 0x00000004, 0x0030, 0x1 };

static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
       [0]  = { 0x00000005, 0x0010, 0x1 },
       [1]  = icelake_mocs_pte,
       [2]  = { 0x00000037, 0x0030, 0x1 },
...
       [20]  = icelake_mocs_pte,

...

So... you basically define all entries and don't need to overwrite the values like you are doing.

Quoting Lucas De Marchi (2019-02-21 22:48:45)

Quoted 11 lines

static const struct mocs_entry icelake_mocs_pte = { 0x00000004, 0x0030, 0x1 };

static struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
       [0]  = { 0x00000005, 0x0010, 0x1 },
       [1]  = icelake_mocs_pte,
       [2]  = { 0x00000037, 0x0030, 0x1 },
...
       [20]  = icelake_mocs_pte,

...

So... you basically define all entries and don't need to overwrite the values like you are doing.

/* All unspecified entries default to following PTE */ [0 ... GEN11_NUM_MOCS_ENTRIES-1] = icelake_mocs_pte,

[0] = ...,
[2] = ...,

If I remember my syntax correctly,

-Chris

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
Changes in v2:
- Cleaned up the code based on review comments from Lucas and Chris

  tests/i915/gem_mocs_settings.c | 96 ++++++++++++++++++++++++++--------
  1 file changed, 73 insertions(+), 23 deletions(-)

tests/i915/gem_mocs_settings.c +71 -22

index 5b3b6bc1..6d111076 100644
@@ -33,6 +33,9 @@
  #include "igt_sysfs.h"
 
  #define MAX_NUMBER_MOCS_REGISTERS	(64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+
  enum {
  	NONE,
  	RESET,

@@ -72,36 +75,66 @@ struct mocs_table {
  	const struct mocs_entry	*table;
  };
 
+static const struct mocs_entry icelake_mocs_pte = {0x00000004, 0x0030};
+static const struct mocs_entry mocs_pte = {0x00000038, 0x0030};
+
  /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-	{ 0x00000009, 0x0010 },
-	{ 0x00000038, 0x0030 },
-	{ 0x0000003b, 0x0030 },
+static const struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN11_NUM_MOCS_ENTRIES - 1] = icelake_mocs_pte,
+	[0]  = { 0x00000005, 0x0010},
+	[1]  = { 0x00000004, 0x0030},
+	[2]  = { 0x00000037, 0x0030},
+	[3]  = { 0x00000005, 0x0010},
+	[4]  = { 0x00000005, 0x0030},
+	[5]  = { 0x00000037, 0x0010},
+	[6]  = { 0x00000017, 0x0010},
+	[7]  = { 0x00000017, 0x0030},
+	[8]  = { 0x00000027, 0x0010},
+	[9]  = { 0x00000027, 0x0030},
+	[10] = { 0x00000077, 0x0010},
+	[11] = { 0x00000077, 0x0030},
+	[12] = { 0x00000057, 0x0010},
+	[13] = { 0x00000057, 0x0030},
+	[14] = { 0x00000067, 0x0010},
+	[15] = { 0x00000067, 0x0030},
+	[18] = { 0x00060037, 0x0030},
+	[19] = { 0x00000737, 0x0030},
+	[20] = { 0x00000337, 0x0030},
+	[21] = { 0x00000137, 0x0030},
+	[22] = { 0x000003b7, 0x0030},
+	[23] = { 0x000007b7, 0x0030},
+	[62] = { 0x00000037, 0x0010},
+	[63] = { 0x00000037, 0x0010},
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN11_NUM_MOCS_ENTRIES - 1] = { 0x0007FFFF, 0x003F },
  };
 
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-	{ 0x00003FFF, 0x003F }, /* no snoop bit */
-	{ 0x00003FFF, 0x003F },
-	{ 0x00003FFF, 0x003F },
+static const struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+	[0] = { 0x00000009, 0x0010},
+	[1] = { 0x00000038, 0x0030},
+	[2] = { 0x0000003b, 0x0030},
  };
 
-static const struct mocs_entry broxton_mocs_table[] = {
-	{ 0x00000009, 0x0010 },
-	{ 0x00000038, 0x0030 },
-	{ 0x00000039, 0x0030 },
+static const struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00003FFF, 0x003F },
  };
 
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-	{ 0x00007FFF, 0x003F },
-	{ 0x00007FFF, 0x003F },
-	{ 0x00007FFF, 0x003F },
+static const struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+	[0] = { 0x00000009, 0x0010},
+	[1] = { 0x00000038, 0x0030},
+	[2] = { 0x00000039, 0x0030},
  };
 
-static const uint32_t write_values[] = {
-	0xFFFFFFFF,
-	0xFFFFFFFF,
-	0xFFFFFFFF,
-	0xFFFFFFFF
+static const struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00007FFF, 0x003F },
+};
+
+static const uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS] = {
+	[0 ... MAX_NUMBER_MOCS_REGISTERS - 1] = 0xFFFFFFFF,
  };
 
  static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)

@@ -127,6 +160,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
  			table->table = broxton_mocs_table;
  		}
  		result = true;
+	} else if (IS_ICELAKE(devid)) {
+		if (dirty) {
+			table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+			table->table = dirty_icelake_mocs_table;
+		} else {
+			table->size  = ARRAY_SIZE(icelake_mocs_table);
+			table->table = icelake_mocs_table;
+		}
+		result = true;
  	}
 
  	return result;

@@ -374,13 +416,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
 
  static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
  {
+	uint32_t devid = intel_get_drm_devid(fd);
+	int num_of_mocs_entries;
+
+	if (IS_ICELAKE(devid))
+		num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+	else
+		num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
  	write_registers(fd, ctx_id, get_engine_base(engine),
-			write_values, ARRAY_SIZE(write_values),

Quoted 144 lines

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
Changes in v2:
- Cleaned up the code based on review comments from Lucas and Chris

  tests/i915/gem_mocs_settings.c | 96 ++++++++++++++++++++++++++--------
  1 file changed, 73 insertions(+), 23 deletions(-)

tests/i915/gem_mocs_settings.c +71 -22

index 5b3b6bc1..6d111076 100644
@@ -33,6 +33,9 @@
  #include "igt_sysfs.h"
 
  #define MAX_NUMBER_MOCS_REGISTERS   (64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+
  enum {
      NONE,
      RESET,

@@ -72,36 +75,66 @@ struct mocs_table {
      const struct mocs_entry *table;
  };
 
+static const struct mocs_entry icelake_mocs_pte = {0x00000004, 0x0030};
+static const struct mocs_entry mocs_pte = {0x00000038, 0x0030};
+
  /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-     { 0x00000009, 0x0010 },
-     { 0x00000038, 0x0030 },
-     { 0x0000003b, 0x0030 },
+static const struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN11_NUM_MOCS_ENTRIES - 1] = icelake_mocs_pte,
+     [0]  = { 0x00000005, 0x0010},
+     [1]  = { 0x00000004, 0x0030},
+     [2]  = { 0x00000037, 0x0030},
+     [3]  = { 0x00000005, 0x0010},
+     [4]  = { 0x00000005, 0x0030},
+     [5]  = { 0x00000037, 0x0010},
+     [6]  = { 0x00000017, 0x0010},
+     [7]  = { 0x00000017, 0x0030},
+     [8]  = { 0x00000027, 0x0010},
+     [9]  = { 0x00000027, 0x0030},
+     [10] = { 0x00000077, 0x0010},
+     [11] = { 0x00000077, 0x0030},
+     [12] = { 0x00000057, 0x0010},
+     [13] = { 0x00000057, 0x0030},
+     [14] = { 0x00000067, 0x0010},
+     [15] = { 0x00000067, 0x0030},
+     [18] = { 0x00060037, 0x0030},
+     [19] = { 0x00000737, 0x0030},
+     [20] = { 0x00000337, 0x0030},
+     [21] = { 0x00000137, 0x0030},
+     [22] = { 0x000003b7, 0x0030},
+     [23] = { 0x000007b7, 0x0030},
+     [62] = { 0x00000037, 0x0010},
+     [63] = { 0x00000037, 0x0010},
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN11_NUM_MOCS_ENTRIES - 1] = { 0x0007FFFF, 0x003F },
  };
 
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-     { 0x00003FFF, 0x003F }, /* no snoop bit */
-     { 0x00003FFF, 0x003F },
-     { 0x00003FFF, 0x003F },
+static const struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+     [0] = { 0x00000009, 0x0010},
+     [1] = { 0x00000038, 0x0030},
+     [2] = { 0x0000003b, 0x0030},
  };
 
-static const struct mocs_entry broxton_mocs_table[] = {
-     { 0x00000009, 0x0010 },
-     { 0x00000038, 0x0030 },
-     { 0x00000039, 0x0030 },
+static const struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00003FFF, 0x003F },
  };
 
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-     { 0x00007FFF, 0x003F },
-     { 0x00007FFF, 0x003F },
-     { 0x00007FFF, 0x003F },
+static const struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+     [0] = { 0x00000009, 0x0010},
+     [1] = { 0x00000038, 0x0030},
+     [2] = { 0x00000039, 0x0030},
  };
 
-static const uint32_t write_values[] = {
-     0xFFFFFFFF,
-     0xFFFFFFFF,
-     0xFFFFFFFF,
-     0xFFFFFFFF
+static const struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00007FFF, 0x003F },
+};
+
+static const uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS] = {
+     [0 ... MAX_NUMBER_MOCS_REGISTERS - 1] = 0xFFFFFFFF,
  };
 
  static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)

@@ -127,6 +160,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
                      table->table = broxton_mocs_table;
              }
              result = true;
+     } else if (IS_ICELAKE(devid)) {
+             if (dirty) {
+                     table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+                     table->table = dirty_icelake_mocs_table;
+             } else {
+                     table->size  = ARRAY_SIZE(icelake_mocs_table);
+                     table->table = icelake_mocs_table;
+             }
+             result = true;
      }
 
      return result;

@@ -374,13 +416,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
 
  static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
  {
+     uint32_t devid = intel_get_drm_devid(fd);
+     int num_of_mocs_entries;
+
+     if (IS_ICELAKE(devid))
+             num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+     else
+             num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
      write_registers(fd, ctx_id, get_engine_base(engine),
-                     write_values, ARRAY_SIZE(write_values),

tests/i915/gem_mocs_settings.c static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir · line 436

Quoted 10 lines

tests/i915/gem_mocs_settings.c +2 -1

+                     write_values, num_of_mocs_entries,
                      engine);
 
      if (engine == I915_EXEC_RENDER)
              write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
-                             write_values, ARRAY_SIZE(write_values),
+                             write_values, num_of_mocs_entries/2,
                              engine);
  }
 

The "-dirty" subcase of the test doesn't seem suitable to current hardware..

The table is now global. So writing it from one context and checking if another context is unaffected is bound to fail.

Quoting Lis, Tomasz (2019-02-22 15:17:34)

Quoted 161 lines · Prathap Kumar Valsan

Quoted 144 lines

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
Changes in v2:
- Cleaned up the code based on review comments from Lucas and Chris

  tests/i915/gem_mocs_settings.c | 96 ++++++++++++++++++++++++++--------
  1 file changed, 73 insertions(+), 23 deletions(-)

tests/i915/gem_mocs_settings.c +71 -22

index 5b3b6bc1..6d111076 100644
@@ -33,6 +33,9 @@
  #include "igt_sysfs.h"
 
  #define MAX_NUMBER_MOCS_REGISTERS   (64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+
  enum {
      NONE,
      RESET,

@@ -72,36 +75,66 @@ struct mocs_table {
      const struct mocs_entry *table;
  };
 
+static const struct mocs_entry icelake_mocs_pte = {0x00000004, 0x0030};
+static const struct mocs_entry mocs_pte = {0x00000038, 0x0030};
+
  /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-     { 0x00000009, 0x0010 },
-     { 0x00000038, 0x0030 },
-     { 0x0000003b, 0x0030 },
+static const struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN11_NUM_MOCS_ENTRIES - 1] = icelake_mocs_pte,
+     [0]  = { 0x00000005, 0x0010},
+     [1]  = { 0x00000004, 0x0030},
+     [2]  = { 0x00000037, 0x0030},
+     [3]  = { 0x00000005, 0x0010},
+     [4]  = { 0x00000005, 0x0030},
+     [5]  = { 0x00000037, 0x0010},
+     [6]  = { 0x00000017, 0x0010},
+     [7]  = { 0x00000017, 0x0030},
+     [8]  = { 0x00000027, 0x0010},
+     [9]  = { 0x00000027, 0x0030},
+     [10] = { 0x00000077, 0x0010},
+     [11] = { 0x00000077, 0x0030},
+     [12] = { 0x00000057, 0x0010},
+     [13] = { 0x00000057, 0x0030},
+     [14] = { 0x00000067, 0x0010},
+     [15] = { 0x00000067, 0x0030},
+     [18] = { 0x00060037, 0x0030},
+     [19] = { 0x00000737, 0x0030},
+     [20] = { 0x00000337, 0x0030},
+     [21] = { 0x00000137, 0x0030},
+     [22] = { 0x000003b7, 0x0030},
+     [23] = { 0x000007b7, 0x0030},
+     [62] = { 0x00000037, 0x0010},
+     [63] = { 0x00000037, 0x0010},
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN11_NUM_MOCS_ENTRIES - 1] = { 0x0007FFFF, 0x003F },
  };
 
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-     { 0x00003FFF, 0x003F }, /* no snoop bit */
-     { 0x00003FFF, 0x003F },
-     { 0x00003FFF, 0x003F },
+static const struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+     [0] = { 0x00000009, 0x0010},
+     [1] = { 0x00000038, 0x0030},
+     [2] = { 0x0000003b, 0x0030},
  };
 
-static const struct mocs_entry broxton_mocs_table[] = {
-     { 0x00000009, 0x0010 },
-     { 0x00000038, 0x0030 },
-     { 0x00000039, 0x0030 },
+static const struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00003FFF, 0x003F },
  };
 
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-     { 0x00007FFF, 0x003F },
-     { 0x00007FFF, 0x003F },
-     { 0x00007FFF, 0x003F },
+static const struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+     [0] = { 0x00000009, 0x0010},
+     [1] = { 0x00000038, 0x0030},
+     [2] = { 0x00000039, 0x0030},
  };
 
-static const uint32_t write_values[] = {
-     0xFFFFFFFF,
-     0xFFFFFFFF,
-     0xFFFFFFFF,
-     0xFFFFFFFF
+static const struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00007FFF, 0x003F },
+};
+
+static const uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS] = {
+     [0 ... MAX_NUMBER_MOCS_REGISTERS - 1] = 0xFFFFFFFF,
  };
 
  static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)

@@ -127,6 +160,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
                      table->table = broxton_mocs_table;
              }
              result = true;
+     } else if (IS_ICELAKE(devid)) {
+             if (dirty) {
+                     table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+                     table->table = dirty_icelake_mocs_table;
+             } else {
+                     table->size  = ARRAY_SIZE(icelake_mocs_table);
+                     table->table = icelake_mocs_table;
+             }
+             result = true;
      }
 
      return result;

@@ -374,13 +416,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
 
  static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
  {
+     uint32_t devid = intel_get_drm_devid(fd);
+     int num_of_mocs_entries;
+
+     if (IS_ICELAKE(devid))
+             num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+     else
+             num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
      write_registers(fd, ctx_id, get_engine_base(engine),
-                     write_values, ARRAY_SIZE(write_values),

tests/i915/gem_mocs_settings.c static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir · line 436

Quoted 10 lines

tests/i915/gem_mocs_settings.c +2 -1

+                     write_values, num_of_mocs_entries,
                      engine);
 
      if (engine == I915_EXEC_RENDER)
              write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
-                             write_values, ARRAY_SIZE(write_values),
+                             write_values, num_of_mocs_entries/2,
                              engine);
  }
 

The "-dirty" subcase of the test doesn't seem suitable to current hardware..

The table is now global. So writing it from one context and checking if another context is unaffected is bound to fail.

We shouldn't be able to do nonpriv writes to it then. Hopefully those writes are already being dropped?

-Chris

Quoted 162 lines

Quoting Lis, Tomasz (2019-02-22 15:17:34)

Quoted 161 lines · Prathap Kumar Valsan

Quoted 144 lines

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
Changes in v2:
- Cleaned up the code based on review comments from Lucas and Chris

  tests/i915/gem_mocs_settings.c | 96 ++++++++++++++++++++++++++--------
  1 file changed, 73 insertions(+), 23 deletions(-)

tests/i915/gem_mocs_settings.c +71 -22

index 5b3b6bc1..6d111076 100644
@@ -33,6 +33,9 @@
  #include "igt_sysfs.h"
 
  #define MAX_NUMBER_MOCS_REGISTERS   (64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+
  enum {
      NONE,
      RESET,

@@ -72,36 +75,66 @@ struct mocs_table {
      const struct mocs_entry *table;
  };
 
+static const struct mocs_entry icelake_mocs_pte = {0x00000004, 0x0030};
+static const struct mocs_entry mocs_pte = {0x00000038, 0x0030};
+
  /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-     { 0x00000009, 0x0010 },
-     { 0x00000038, 0x0030 },
-     { 0x0000003b, 0x0030 },
+static const struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN11_NUM_MOCS_ENTRIES - 1] = icelake_mocs_pte,
+     [0]  = { 0x00000005, 0x0010},
+     [1]  = { 0x00000004, 0x0030},
+     [2]  = { 0x00000037, 0x0030},
+     [3]  = { 0x00000005, 0x0010},
+     [4]  = { 0x00000005, 0x0030},
+     [5]  = { 0x00000037, 0x0010},
+     [6]  = { 0x00000017, 0x0010},
+     [7]  = { 0x00000017, 0x0030},
+     [8]  = { 0x00000027, 0x0010},
+     [9]  = { 0x00000027, 0x0030},
+     [10] = { 0x00000077, 0x0010},
+     [11] = { 0x00000077, 0x0030},
+     [12] = { 0x00000057, 0x0010},
+     [13] = { 0x00000057, 0x0030},
+     [14] = { 0x00000067, 0x0010},
+     [15] = { 0x00000067, 0x0030},
+     [18] = { 0x00060037, 0x0030},
+     [19] = { 0x00000737, 0x0030},
+     [20] = { 0x00000337, 0x0030},
+     [21] = { 0x00000137, 0x0030},
+     [22] = { 0x000003b7, 0x0030},
+     [23] = { 0x000007b7, 0x0030},
+     [62] = { 0x00000037, 0x0010},
+     [63] = { 0x00000037, 0x0010},
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN11_NUM_MOCS_ENTRIES - 1] = { 0x0007FFFF, 0x003F },
  };
 
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-     { 0x00003FFF, 0x003F }, /* no snoop bit */
-     { 0x00003FFF, 0x003F },
-     { 0x00003FFF, 0x003F },
+static const struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+     [0] = { 0x00000009, 0x0010},
+     [1] = { 0x00000038, 0x0030},
+     [2] = { 0x0000003b, 0x0030},
  };
 
-static const struct mocs_entry broxton_mocs_table[] = {
-     { 0x00000009, 0x0010 },
-     { 0x00000038, 0x0030 },
-     { 0x00000039, 0x0030 },
+static const struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00003FFF, 0x003F },
  };
 
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-     { 0x00007FFF, 0x003F },
-     { 0x00007FFF, 0x003F },
-     { 0x00007FFF, 0x003F },
+static const struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+     [0] = { 0x00000009, 0x0010},
+     [1] = { 0x00000038, 0x0030},
+     [2] = { 0x00000039, 0x0030},
  };
 
-static const uint32_t write_values[] = {
-     0xFFFFFFFF,
-     0xFFFFFFFF,
-     0xFFFFFFFF,
-     0xFFFFFFFF
+static const struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00007FFF, 0x003F },
+};
+
+static const uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS] = {
+     [0 ... MAX_NUMBER_MOCS_REGISTERS - 1] = 0xFFFFFFFF,
  };
 
  static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)

@@ -127,6 +160,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
                      table->table = broxton_mocs_table;
              }
              result = true;
+     } else if (IS_ICELAKE(devid)) {
+             if (dirty) {
+                     table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+                     table->table = dirty_icelake_mocs_table;
+             } else {
+                     table->size  = ARRAY_SIZE(icelake_mocs_table);
+                     table->table = icelake_mocs_table;
+             }
+             result = true;
      }
 
      return result;

@@ -374,13 +416,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
 
  static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
  {
+     uint32_t devid = intel_get_drm_devid(fd);
+     int num_of_mocs_entries;
+
+     if (IS_ICELAKE(devid))
+             num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+     else
+             num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
      write_registers(fd, ctx_id, get_engine_base(engine),
-                     write_values, ARRAY_SIZE(write_values),

tests/i915/gem_mocs_settings.c static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir · line 436

Quoted 10 lines

tests/i915/gem_mocs_settings.c +2 -1

+                     write_values, num_of_mocs_entries,
                      engine);
 
      if (engine == I915_EXEC_RENDER)
              write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
-                             write_values, ARRAY_SIZE(write_values),
+                             write_values, num_of_mocs_entries/2,
                              engine);
  }
 

The "-dirty" subcase of the test doesn't seem suitable to current hardware..

The table is now global. So writing it from one context and checking if another context is unaffected is bound to fail.

As you pointed out On Gen11, "-dirty" subcases are failing. Test is not able to write to registers.

Quoted 3 lines

We shouldn't be able to do nonpriv writes to it then. Hopefully those writes are already being dropped?

So probably on latest hardware, test should still try to write and call it pass if the dirty values are not being written?

Quoting Kumar Valsan, Prathap (2019-02-22 21:32:55)

Quoted 164 lines · Chris Wilson

Quoted 161 lines

Quoting Lis, Tomasz (2019-02-22 15:17:34)

Quoted 160 lines · Prathap Kumar Valsan

Quoted 144 lines

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
Changes in v2:
- Cleaned up the code based on review comments from Lucas and Chris

   tests/i915/gem_mocs_settings.c | 96 ++++++++++++++++++++++++++--------
   1 file changed, 73 insertions(+), 23 deletions(-)

tests/i915/gem_mocs_settings.c +71 -22

index 5b3b6bc1..6d111076 100644
@@ -33,6 +33,9 @@
   #include "igt_sysfs.h"
 
   #define MAX_NUMBER_MOCS_REGISTERS   (64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+
   enum {
       NONE,
       RESET,

@@ -72,36 +75,66 @@ struct mocs_table {
       const struct mocs_entry *table;
   };
 
+static const struct mocs_entry icelake_mocs_pte = {0x00000004, 0x0030};
+static const struct mocs_entry mocs_pte = {0x00000038, 0x0030};
+
   /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-     { 0x00000009, 0x0010 },
-     { 0x00000038, 0x0030 },
-     { 0x0000003b, 0x0030 },
+static const struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN11_NUM_MOCS_ENTRIES - 1] = icelake_mocs_pte,
+     [0]  = { 0x00000005, 0x0010},
+     [1]  = { 0x00000004, 0x0030},
+     [2]  = { 0x00000037, 0x0030},
+     [3]  = { 0x00000005, 0x0010},
+     [4]  = { 0x00000005, 0x0030},
+     [5]  = { 0x00000037, 0x0010},
+     [6]  = { 0x00000017, 0x0010},
+     [7]  = { 0x00000017, 0x0030},
+     [8]  = { 0x00000027, 0x0010},
+     [9]  = { 0x00000027, 0x0030},
+     [10] = { 0x00000077, 0x0010},
+     [11] = { 0x00000077, 0x0030},
+     [12] = { 0x00000057, 0x0010},
+     [13] = { 0x00000057, 0x0030},
+     [14] = { 0x00000067, 0x0010},
+     [15] = { 0x00000067, 0x0030},
+     [18] = { 0x00060037, 0x0030},
+     [19] = { 0x00000737, 0x0030},
+     [20] = { 0x00000337, 0x0030},
+     [21] = { 0x00000137, 0x0030},
+     [22] = { 0x000003b7, 0x0030},
+     [23] = { 0x000007b7, 0x0030},
+     [62] = { 0x00000037, 0x0010},
+     [63] = { 0x00000037, 0x0010},
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN11_NUM_MOCS_ENTRIES - 1] = { 0x0007FFFF, 0x003F },
   };
 
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-     { 0x00003FFF, 0x003F }, /* no snoop bit */
-     { 0x00003FFF, 0x003F },
-     { 0x00003FFF, 0x003F },
+static const struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+     [0] = { 0x00000009, 0x0010},
+     [1] = { 0x00000038, 0x0030},
+     [2] = { 0x0000003b, 0x0030},
   };
 
-static const struct mocs_entry broxton_mocs_table[] = {
-     { 0x00000009, 0x0010 },
-     { 0x00000038, 0x0030 },
-     { 0x00000039, 0x0030 },
+static const struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00003FFF, 0x003F },
   };
 
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-     { 0x00007FFF, 0x003F },
-     { 0x00007FFF, 0x003F },
-     { 0x00007FFF, 0x003F },
+static const struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+     [0] = { 0x00000009, 0x0010},
+     [1] = { 0x00000038, 0x0030},
+     [2] = { 0x00000039, 0x0030},
   };
 
-static const uint32_t write_values[] = {
-     0xFFFFFFFF,
-     0xFFFFFFFF,
-     0xFFFFFFFF,
-     0xFFFFFFFF
+static const struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+     [0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00007FFF, 0x003F },
+};
+
+static const uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS] = {
+     [0 ... MAX_NUMBER_MOCS_REGISTERS - 1] = 0xFFFFFFFF,
   };
 
   static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)

@@ -127,6 +160,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
                       table->table = broxton_mocs_table;
               }
               result = true;
+     } else if (IS_ICELAKE(devid)) {
+             if (dirty) {
+                     table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+                     table->table = dirty_icelake_mocs_table;
+             } else {
+                     table->size  = ARRAY_SIZE(icelake_mocs_table);
+                     table->table = icelake_mocs_table;
+             }
+             result = true;
       }
 
       return result;

@@ -374,13 +416,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
 
   static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
   {
+     uint32_t devid = intel_get_drm_devid(fd);
+     int num_of_mocs_entries;
+
+     if (IS_ICELAKE(devid))
+             num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+     else
+             num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
       write_registers(fd, ctx_id, get_engine_base(engine),
-                     write_values, ARRAY_SIZE(write_values),

tests/i915/gem_mocs_settings.c static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir · line 436

Quoted 10 lines

tests/i915/gem_mocs_settings.c +2 -1

+                     write_values, num_of_mocs_entries,
                       engine);
 
       if (engine == I915_EXEC_RENDER)
               write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
-                             write_values, ARRAY_SIZE(write_values),
+                             write_values, num_of_mocs_entries/2,
                               engine);
   }
 

The "-dirty" subcase of the test doesn't seem suitable to current hardware..

The table is now global. So writing it from one context and checking if another context is unaffected is bound to fail.

As you pointed out On Gen11, "-dirty" subcases are failing. Test is not able to write to registers.

Quoted 4 lines

Quoted 2 lines

We shouldn't be able to do nonpriv writes to it then. Hopefully those writes are already being dropped?

So probably on latest hardware, test should still try to write and call it pass if the dirty values are not being written?

Yes, that would be useful confirmation that one context can't shoot another in the back, and that our global MOCS table remain invariant. -Chris

Quoted 133 lines · Prathap Kumar Valsan

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
Changes in v2:
- Cleaned up the code based on review comments from Lucas and Chris

  tests/i915/gem_mocs_settings.c | 96 ++++++++++++++++++++++++++--------
  1 file changed, 73 insertions(+), 23 deletions(-)

tests/i915/gem_mocs_settings.c +71 -21

index 5b3b6bc1..6d111076 100644
@@ -33,6 +33,9 @@
  #include "igt_sysfs.h"
  #define MAX_NUMBER_MOCS_REGISTERS	(64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+
  enum {
  	NONE,
  	RESET,

@@ -72,36 +75,66 @@ struct mocs_table {
  	const struct mocs_entry	*table;
  };
+static const struct mocs_entry icelake_mocs_pte = {0x00000004, 0x0030};
+static const struct mocs_entry mocs_pte = {0x00000038, 0x0030};
+
  /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-	{ 0x00000009, 0x0010 },
-	{ 0x00000038, 0x0030 },
-	{ 0x0000003b, 0x0030 },
+static const struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN11_NUM_MOCS_ENTRIES - 1] = icelake_mocs_pte,
+	[0]  = { 0x00000005, 0x0010},
+	[1]  = { 0x00000004, 0x0030},
+	[2]  = { 0x00000037, 0x0030},
+	[3]  = { 0x00000005, 0x0010},
+	[4]  = { 0x00000005, 0x0030},
+	[5]  = { 0x00000037, 0x0010},
+	[6]  = { 0x00000017, 0x0010},
+	[7]  = { 0x00000017, 0x0030},
+	[8]  = { 0x00000027, 0x0010},
+	[9]  = { 0x00000027, 0x0030},
+	[10] = { 0x00000077, 0x0010},
+	[11] = { 0x00000077, 0x0030},
+	[12] = { 0x00000057, 0x0010},
+	[13] = { 0x00000057, 0x0030},
+	[14] = { 0x00000067, 0x0010},
+	[15] = { 0x00000067, 0x0030},
+	[18] = { 0x00060037, 0x0030},
+	[19] = { 0x00000737, 0x0030},
+	[20] = { 0x00000337, 0x0030},
+	[21] = { 0x00000137, 0x0030},
+	[22] = { 0x000003b7, 0x0030},
+	[23] = { 0x000007b7, 0x0030},
+	[62] = { 0x00000037, 0x0010},
+	[63] = { 0x00000037, 0x0010},
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN11_NUM_MOCS_ENTRIES - 1] = { 0x0007FFFF, 0x003F },
  };
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-	{ 0x00003FFF, 0x003F }, /* no snoop bit */
-	{ 0x00003FFF, 0x003F },
-	{ 0x00003FFF, 0x003F },
+static const struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+	[0] = { 0x00000009, 0x0010},
+	[1] = { 0x00000038, 0x0030},
+	[2] = { 0x0000003b, 0x0030},
  };
-static const struct mocs_entry broxton_mocs_table[] = {
-	{ 0x00000009, 0x0010 },
-	{ 0x00000038, 0x0030 },
-	{ 0x00000039, 0x0030 },
+static const struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00003FFF, 0x003F },
  };
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-	{ 0x00007FFF, 0x003F },
-	{ 0x00007FFF, 0x003F },
-	{ 0x00007FFF, 0x003F },
+static const struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = mocs_pte,
+	[0] = { 0x00000009, 0x0010},
+	[1] = { 0x00000038, 0x0030},
+	[2] = { 0x00000039, 0x0030},
  };
-static const uint32_t write_values[] = {
-	0xFFFFFFFF,
-	0xFFFFFFFF,
-	0xFFFFFFFF,
-	0xFFFFFFFF
+static const struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00007FFF, 0x003F },
+};
+
+static const uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS] = {
+	[0 ... MAX_NUMBER_MOCS_REGISTERS - 1] = 0xFFFFFFFF,
  };
  static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)

@@ -127,6 +160,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
  			table->table = broxton_mocs_table;
  		}
  		result = true;
+	} else if (IS_ICELAKE(devid)) {
+		if (dirty) {
+			table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+			table->table = dirty_icelake_mocs_table;
+		} else {
+			table->size  = ARRAY_SIZE(icelake_mocs_table);
+			table->table = icelake_mocs_table;
+		}
+		result = true;
  	}
  	return result;

@@ -374,13 +416,21 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
  static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
  {
+	uint32_t devid = intel_get_drm_devid(fd);
+	int num_of_mocs_entries;
+
+	if (IS_ICELAKE(devid))
+		num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+	else
+		num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+

tests/i915/gem_mocs_settings.c static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir · line 433

Quoted 10 lines

tests/i915/gem_mocs_settings.c +2 -2

  	write_registers(fd, ctx_id, get_engine_base(engine),
-			write_values, ARRAY_SIZE(write_values),
+			write_values, num_of_mocs_entries,
  			engine);
  	if (engine == I915_EXEC_RENDER)
  		write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
-				write_values, ARRAY_SIZE(write_values),
+				write_values, num_of_mocs_entries/2,
  				engine);
  }

The "-dirty" subcase of the test doesn't seem suitable to current hardware..

The table is now global. So writing it from one context and checking if another context is unaffected is bound to fail.

Shouldn't the test for gen11+ be restricted to reading the values and checking whether they match pre-defined array?
(we may still do a test if everything is fine after reset/suspend, that won't hurt)
And if we are writing dirty values, shouldn't there be a restoration to original values afterwards?

-Tomasz

From: "Kumar Valsan, Prathap" <[email protected]>

This patch adds mocs table for icelake with expected L3 and eDRAM control values.

Signed-off-by Kumar Valsan, Prathap <[email protected]>

---
Changes in v4:
- L3 control registers are global in icelake. Test validates that dirty writes from userspace to L3 control registers are being dropped.
Changes in v3:
- There are holes in the mocs table(Lucas Pointed out). In icelake index 16 and 17 are reserved.
So test shouldn't be checking them.
Changes in v2:
- Cleaned up the code based on review
comments from Lucas and Chris

 tests/i915/gem_mocs_settings.c | 126 +++++++++++++++++++++++++--------
 1 file changed, 96 insertions(+), 30 deletions(-)

tests/i915/gem_mocs_settings.c +77 -28

index 5b3b6bc1..66615007 100644
@@ -33,6 +33,9 @@
 #include "igt_sysfs.h"
 
 #define MAX_NUMBER_MOCS_REGISTERS	(64)
+#define GEN9_NUM_MOCS_ENTRIES   62  /* 62 out of 64 - 63 & 64 are reserved. */
+#define GEN11_NUM_MOCS_ENTRIES  64  /* 63-64 are reserved, but configured. */
+
 enum {
 	NONE,
 	RESET,

@@ -61,10 +64,13 @@ static const char * const test_modes[] = {
 #define GEN9_MFX1_MOCS_0	(0xcA00)	/* Media 1 MOCS base register*/
 #define GEN9_VEBOX_MOCS_0	(0xcB00)	/* Video MOCS base register*/
 #define GEN9_BLT_MOCS_0		(0xcc00)	/* Blitter MOCS base register*/
+#define ICELAKE_MOCS_PTE	{0x00000004, 0x0030, 0x1}
+#define MOCS_PTE		{0x00000038, 0x0030, 0x1}
 
 struct mocs_entry {
 	uint32_t	control_value;
 	uint16_t	l3cc_value;
+	uint8_t 	used;
 };
 
 struct mocs_table {

@@ -73,35 +79,63 @@ struct mocs_table {
 };
 
 /* The first entries in the MOCS tables are defined by uABI */
-static const struct mocs_entry skylake_mocs_table[] = {
-	{ 0x00000009, 0x0010 },
-	{ 0x00000038, 0x0030 },
-	{ 0x0000003b, 0x0030 },
+static const struct mocs_entry icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+	[0]  = { 0x00000005, 0x0010, 0x1},
+	[1]  = ICELAKE_MOCS_PTE,
+	[2]  = { 0x00000037, 0x0030, 0x1},
+	[3]  = { 0x00000005, 0x0010, 0x1},
+	[4]  = { 0x00000005, 0x0030, 0x1},
+	[5]  = { 0x00000037, 0x0010, 0x1},
+	[6]  = { 0x00000017, 0x0010, 0x1},
+	[7]  = { 0x00000017, 0x0030, 0x1},
+	[8]  = { 0x00000027, 0x0010, 0x1},
+	[9]  = { 0x00000027, 0x0030, 0x1},
+	[10] = { 0x00000077, 0x0010, 0x1},
+	[11] = { 0x00000077, 0x0030, 0x1},
+	[12] = { 0x00000057, 0x0010, 0x1},
+	[13] = { 0x00000057, 0x0030, 0x1},
+	[14] = { 0x00000067, 0x0010, 0x1},
+	[15] = { 0x00000067, 0x0030, 0x1},
+	[18] = { 0x00060037, 0x0030, 0x1},
+	[19] = { 0x00000737, 0x0030, 0x1},
+	[20] = { 0x00000337, 0x0030, 0x1},
+	[21] = { 0x00000137, 0x0030, 0x1},
+	[22] = { 0x000003b7, 0x0030, 0x1},
+	[23] = { 0x000007b7, 0x0030, 0x1},
+	[24 ... 61] = ICELAKE_MOCS_PTE,
+	[62] = { 0x00000037, 0x0010, 0x1},
+	[63] = { 0x00000037, 0x0010, 0x1},
+};
+
+static const struct mocs_entry dirty_icelake_mocs_table[GEN11_NUM_MOCS_ENTRIES] = {
+	[0 ... 15] = { 0x0007FFFF, 0x003F, 0x1 },
+	[18 ... GEN11_NUM_MOCS_ENTRIES - 1] = { 0x0007FFFF, 0x003F, 0x1 },
 };
 
-static const struct mocs_entry dirty_skylake_mocs_table[] = {
-	{ 0x00003FFF, 0x003F }, /* no snoop bit */
-	{ 0x00003FFF, 0x003F },
-	{ 0x00003FFF, 0x003F },
+static const struct mocs_entry skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0] = { 0x00000009, 0x0010, 0x1},
+	[1] = MOCS_PTE,
+	[2] = { 0x0000003b, 0x0030, 0x1},
+	[3 ... GEN9_NUM_MOCS_ENTRIES - 1] = MOCS_PTE,
 };
 
-static const struct mocs_entry broxton_mocs_table[] = {
-	{ 0x00000009, 0x0010 },
-	{ 0x00000038, 0x0030 },
-	{ 0x00000039, 0x0030 },
+static const struct mocs_entry dirty_skylake_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00003FFF, 0x003F, 0x1 },
 };
 
-static const struct mocs_entry dirty_broxton_mocs_table[] = {
-	{ 0x00007FFF, 0x003F },
-	{ 0x00007FFF, 0x003F },
-	{ 0x00007FFF, 0x003F },
+static const struct mocs_entry broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0] = { 0x00000009, 0x0010, 0x1},
+	[1] = MOCS_PTE,
+	[2] = { 0x00000039, 0x0030, 0x1},
+	[3 ... GEN9_NUM_MOCS_ENTRIES - 1] = MOCS_PTE,
 };
 
-static const uint32_t write_values[] = {
-	0xFFFFFFFF,
-	0xFFFFFFFF,
-	0xFFFFFFFF,
-	0xFFFFFFFF
+static const struct mocs_entry dirty_broxton_mocs_table[GEN9_NUM_MOCS_ENTRIES] = {
+	[0 ... GEN9_NUM_MOCS_ENTRIES - 1] = { 0x00007FFF, 0x003F, 0x1 },
+};
+
+static const uint32_t write_values[MAX_NUMBER_MOCS_REGISTERS] = {
+	[0 ... MAX_NUMBER_MOCS_REGISTERS - 1] = 0xFFFFFFFF,
 };
 
 static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)

@@ -127,6 +161,15 @@ static bool get_mocs_settings(int fd, struct mocs_table *table, bool dirty)
 			table->table = broxton_mocs_table;
 		}
 		result = true;
+	} else if (IS_ICELAKE(devid)) {
+		if (dirty) {
+			table->size  = ARRAY_SIZE(dirty_icelake_mocs_table);
+			table->table = dirty_icelake_mocs_table;
+		} else {
+			table->size  = ARRAY_SIZE(icelake_mocs_table);
+			table->table = icelake_mocs_table;
+		}
+		result = true;
 	}
 
 	return result;

@@ -283,9 +326,12 @@ static void check_control_registers(int fd,
 	read_regs = gem_mmap__cpu(fd, dst_handle, 0, 4096, PROT_READ);
 
 	gem_set_domain(fd, dst_handle, I915_GEM_DOMAIN_CPU, 0);
-	for (int index = 0; index < table.size; index++)
+	for (int index = 0; index < table.size; index++) {
+		if (!table.table[index].used)
+			continue;
 		igt_assert_eq_u32(read_regs[index],
 				  table.table[index].control_value);
+	}
 
 	munmap(read_regs, 4096);
 	gem_close(fd, dst_handle);

@@ -315,10 +361,14 @@ static void check_l3cc_registers(int fd,
 	gem_set_domain(fd, dst_handle, I915_GEM_DOMAIN_CPU, 0);
 
 	for (index = 0; index < table.size / 2; index++) {
-		igt_assert_eq_u32(read_regs[index] & 0xffff,
-				  table.table[index * 2].l3cc_value);
-		igt_assert_eq_u32(read_regs[index] >> 16,
-				  table.table[index * 2 + 1].l3cc_value);
+		if (table.table[index * 2].used) {
+			igt_assert_eq_u32(read_regs[index] & 0xffff,
+					  table.table[index * 2].l3cc_value);
+		}
+		if (table.table[index * 2 + 1].used) {
+			igt_assert_eq_u32(read_regs[index] >> 16,
+					  table.table[index * 2 + 1].l3cc_value);
+		}
 	}
 
 	if (table.size & 1)

@@ -368,19 +418,35 @@ static void check_mocs_values(int fd, unsigned engine, uint32_t ctx_id, bool dir
 {
 	check_control_registers(fd, engine, ctx_id, dirty);
 
-	if (engine == I915_EXEC_RENDER)
-		check_l3cc_registers(fd, engine, ctx_id, dirty);
+	if (engine == I915_EXEC_RENDER) {

tests/i915/gem_mocs_settings.c +10 -2

 static void write_dirty_mocs(int fd, unsigned engine, uint32_t ctx_id)
 {
+	uint32_t devid = intel_get_drm_devid(fd);
+	int num_of_mocs_entries;
+
+	if (IS_ICELAKE(devid))
+		num_of_mocs_entries = GEN11_NUM_MOCS_ENTRIES;
+	else
+		num_of_mocs_entries = GEN9_NUM_MOCS_ENTRIES;
+
 	write_registers(fd, ctx_id, get_engine_base(engine),
-			write_values, ARRAY_SIZE(write_values),
+			write_values, num_of_mocs_entries,
 			engine);
 
 	if (engine == I915_EXEC_RENDER)
 		write_registers(fd, ctx_id, GEN9_LNCFCMOCS0,
-				write_values, ARRAY_SIZE(write_values),
+				write_values, num_of_mocs_entries/2,
 				engine);
 }
 

Signature · 1 line

2.20.1