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pwm: hibvt: Use individual struct per of-data.

PATCH In review Mathieu Othacehe 3 participants 7 messages Feb 19, 2019 – Mar 4, 2019

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Mathieu Othacehe

author
#0 lore raw

PATCH v3 1/3 pwm: hibvt: Use individual struct per of-data.

Split pwm-soc array in one struct per soc and point to the corresponding on in of-data.

Signed-off-by Mathieu Othacehe <[email protected]>
---
 drivers/pwm/pwm-hibvt.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)
drivers/pwm/pwm-hibvt.c +12 -5
index 27c107e78d59..ffc803818c3c 100644
@@ -49,15 +49,19 @@ struct hibvt_pwm_chip {
 	struct clk *clk;
 	void __iomem *base;
 	struct reset_control *rstc;
+	const struct hibvt_pwm_soc *soc;
 };
 
 struct hibvt_pwm_soc {
 	u32 num_pwms;
 };
 
-static const struct hibvt_pwm_soc pwm_soc[2] = {
-	{ .num_pwms = 4 },
-	{ .num_pwms = 8 },
+static const struct hibvt_pwm_soc hi3516cv300_soc_info = {
+	.num_pwms = 4,
+};
+
+static const struct hibvt_pwm_soc hi3519v100_soc_info = {
+	.num_pwms = 8,
 };
 
 static inline struct hibvt_pwm_chip *to_hibvt_pwm_chip(struct pwm_chip *chip)

@@ -198,6 +202,7 @@ static int hibvt_pwm_probe(struct platform_device *pdev)
 	pwm_chip->chip.npwm = soc->num_pwms;
 	pwm_chip->chip.of_xlate = of_pwm_xlate_with_flags;
 	pwm_chip->chip.of_pwm_n_cells = 3;
+	pwm_chip->soc = soc;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	pwm_chip->base = devm_ioremap_resource(&pdev->dev, res);

@@ -250,8 +255,10 @@ static int hibvt_pwm_remove(struct platform_device *pdev)
 }
 
 static const struct of_device_id hibvt_pwm_of_match[] = {
-	{ .compatible = "hisilicon,hi3516cv300-pwm", .data = &pwm_soc[0] },
-	{ .compatible = "hisilicon,hi3519v100-pwm", .data = &pwm_soc[1] },
+	{ .compatible = "hisilicon,hi3516cv300-pwm",
+	  .data = &hi3516cv300_soc_info },
+	{ .compatible = "hisilicon,hi3519v100-pwm",
+	  .data = &hi3519v100_soc_info },
 	{  }
 };
 MODULE_DEVICE_TABLE(of, hibvt_pwm_of_match);
Signature · 1 line
2.17.1
author
#1 lore raw

PATCH v3 2/3 dt-bindings: pwm: hibvt: Add hi3559v100 support

Add support for hi3559v100-shub-pwm and hisilicon,hi3559v100-pwm platforms.

Reviewed-by Rob Herring <[email protected]>
Signed-off-by Mathieu Othacehe <[email protected]>
---
 Documentation/devicetree/bindings/pwm/pwm-hibvt.txt | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/pwm/pwm-hibvt.txt +2 -0
index fa7849d67836..daedfef09bb6 100644
@@ -5,6 +5,8 @@ Required properties:
  The SoC specific strings supported including:
 	"hisilicon,hi3516cv300-pwm"
 	"hisilicon,hi3519v100-pwm"
+	"hisilicon,hi3559v100-shub-pwm"
+	"hisilicon,hi3559v100-pwm
 - reg: physical base address and length of the controller's registers.
 - clocks: phandle and clock specifier of the PWM reference clock.
 - resets: phandle and reset specifier for the PWM controller reset.
Signature · 1 line
2.17.1
author
#2 lore raw

PATCH v3 3/3 pwm: hibvt: Add hi3559v100 support

In reply to Mathieu Othacehe

Add support for hi3559v100-shub-pwm and hisilicon,hi3559v100-pwm platforms. They require a special quirk: pwm has to be enabled again to force duty_cycle refresh.

Signed-off-by Mathieu Othacehe <[email protected]>
---
 drivers/pwm/pwm-hibvt.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)
drivers/pwm/pwm-hibvt.c +26 -1
index ffc803818c3c..f81c6fcb79be 100644
@@ -54,6 +54,7 @@ struct hibvt_pwm_chip {
 
 struct hibvt_pwm_soc {
 	u32 num_pwms;
+	bool quirk_force_enable;
 };
 
 static const struct hibvt_pwm_soc hi3516cv300_soc_info = {

@@ -64,6 +65,16 @@ static const struct hibvt_pwm_soc hi3519v100_soc_info = {
 	.num_pwms = 8,
 };
 
+static const struct hibvt_pwm_soc hi3559v100_shub_soc_info = {
+	.num_pwms = 8,
+	.quirk_force_enable = true,
+};
+
+static const struct hibvt_pwm_soc hi3559v100_soc_info = {
+	.num_pwms = 2,
+	.quirk_force_enable = true,
+};
+
 static inline struct hibvt_pwm_chip *to_hibvt_pwm_chip(struct pwm_chip *chip)
 {
 	return container_of(chip, struct hibvt_pwm_chip, chip);

@@ -152,13 +163,23 @@ static void hibvt_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
 static int hibvt_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
 				struct pwm_state *state)
 {
+	struct hibvt_pwm_chip *hi_pwm_chip = to_hibvt_pwm_chip(chip);
+
 	if (state->polarity != pwm->state.polarity)
 		hibvt_pwm_set_polarity(chip, pwm, state->polarity);
 
 	if (state->period != pwm->state.period ||
-		state->duty_cycle != pwm->state.duty_cycle)
+	    state->duty_cycle != pwm->state.duty_cycle) {
 		hibvt_pwm_config(chip, pwm, state->duty_cycle, state->period);
 
+		/*
+		 * Some implementations require the pwm to be enabled
+		 * once more each time the duty cycle is refreshed.
+		 */
+		if (hi_pwm_chip->soc->quirk_force_enable && state->enabled)
+			hibvt_pwm_enable(chip, pwm);
+	}
+
 	if (state->enabled != pwm->state.enabled) {
 		if (state->enabled)
 			hibvt_pwm_enable(chip, pwm);

@@ -259,6 +280,10 @@ static const struct of_device_id hibvt_pwm_of_match[] = {
 	  .data = &hi3516cv300_soc_info },
 	{ .compatible = "hisilicon,hi3519v100-pwm",
 	  .data = &hi3519v100_soc_info },
+	{ .compatible = "hisilicon,hi3559v100-shub-pwm",
+	  .data = &hi3559v100_shub_soc_info },
+	{ .compatible = "hisilicon,hi3559v100-pwm",
+	  .data = &hi3559v100_soc_info },
 	{  }
 };
 MODULE_DEVICE_TABLE(of, hibvt_pwm_of_match);
Signature · 1 line
2.17.1
#3 lore raw

Re: [PATCH v3 3/3] pwm: hibvt: Add hi3559v100 support

Quoted 3 lines · Mathieu Othacehe

Add support for hi3559v100-shub-pwm and hisilicon,hi3559v100-pwm platforms. They require a special quirk: pwm has to be enabled again to force duty_cycle refresh.

The patch looks fine now. (If you have to do another round:
s/again/twice/ in the commit log and s/once more/twice/ in the comment below.)

I wonder if this behaviour is a bug or a feature of the hardware. Is this additional enable needed to apply changes to both period and duty_cycle atomically? Is the 2nd enable needed independent of the PWM already running? Can you share the relevant part of the documentation without violating an NDA?

Best regards
Uwe

Signature · 2 lines
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
author
#4 lore raw

Re: [PATCH v3 3/3] pwm: hibvt: Add hi3559v100 support

Hi Uwe,

Quoted 3 lines

The patch looks fine now. (If you have to do another round:
s/again/twice/ in the commit log and s/once more/twice/ in the comment below.)

Ok.

Quoted 6 lines

I wonder if this behaviour is a bug or a feature of the hardware. Is this additional enable needed to apply changes to both period and duty_cycle atomically? Is the 2nd enable needed independent of the PWM already running? Can you share the relevant part of the documentation without violating an NDA?

The same goes for the period, so I'll precise it in v4. This behaviour is not documented in the SoC manual.
I discovered it by hitting the problem. Hisilicon support confirmed it was needed without any
further details. It looks like this behaviour is "by design" because there are 2 registers for duty cycle and period
and 2 state registers for duty cycle and period. When the first two registers are edited, the state registers are
only updated on sending a new "1" in pwm enable.

I don't know if the two boards already supported by hibvt driver have the same design but it seems quite likely.
Maybe this enable thing could be done for all boards and not considered as a quirk.

Thanks,

Mathieu

#6 lore raw
In reply to Mathieu Othacehe
Quoted 7 lines · Mathieu Othacehe

Split pwm-soc array in one struct per soc and point to the corresponding on in of-data.

Signed-off-by Mathieu Othacehe <[email protected]>
---
 drivers/pwm/pwm-hibvt.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

Applied all three patches and, while applying, fixed up the commit message and comment for patch 3/3 as pointed out by Uwe.

Thanks,
Thierry