4.20.16-stable review
Subsystems (7)
Greg Kroah-Hartman
maintainerPATCH 157/171 ARM: dts: exynos: Fix pinctrl definition for eMMC RTSN line on Odroid X2/U3
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Marek Szyprowski <[email protected]>
commit ec33745bccc8f336957c751f4153421cc9ef5a54 upstream.
Commit 225da7e65a03 ("ARM: dts: add eMMC reset line for exynos4412-odroid-common") added MMC power sequence for eMMC card of Odroid X2/U3. It reused generic sd1_cd pin control configuration node and only disabled pull-up. However that time the pinctrl configuration was not applied during MMC power sequence driver initialization. This has been changed later by commit d97a1e5d7cd2 ("mmc: pwrseq: convert to proper platform device").
It turned out then, that the provided pinctrl configuration is not correct, because the eMMC_RTSN line is being re-configured as 'special function/card detect function for mmc1 controller' not the simple 'output', thus the power sequence driver doesn't really set the pin value. This in effect broke the reboot of Odroid X2/U3 boards. Fix this by providing separate node with eMMC_RTSN pin configuration.
--- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-)
arch/arm/boot/dts/exynos4412-odroid-common.dtsi +6 -7
@@ -49,7 +49,7 @@ }; emmc_pwrseq: pwrseq { - pinctrl-0 = <&sd1_cd>; + pinctrl-0 = <&emmc_rstn>; pinctrl-names = "default"; compatible = "mmc-pwrseq-emmc"; reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
@@ -161,12 +161,6 @@ cpu0-supply = <&buck2_reg>; }; -/* RSTN signal for eMMC */ -&sd1_cd { - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; -}; - &pinctrl_1 { gpio_power_key: power_key { samsung,pins = "gpx1-3";
@@ -184,6 +178,11 @@ samsung,pins = "gpx3-7"; samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; }; + + emmc_rstn: emmc-rstn { + samsung,pins = "gpk1-2"; + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; + }; }; &ehci {
Greg Kroah-Hartman
maintainerPATCH 158/171 ARM: dts: exynos: Add minimal clkout parameters to Exynos3250 PMU
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Marek Szyprowski <[email protected]>
commit a66352e005488ecb4b534ba1af58a9f671eba9b8 upstream.
Add minimal parameters needed by the Exynos CLKOUT driver to Exynos3250 PMU node. This fixes the following warning on boot:
exynos_clkout_init: failed to register clkout clock
--- arch/arm/boot/dts/exynos3250.dtsi | 3 +++ 1 file changed, 3 insertions(+)
arch/arm/boot/dts/exynos3250.dtsi +3 -0
@@ -168,6 +168,9 @@ interrupt-controller; #interrupt-cells = <3>; interrupt-parent = <&gic>; + clock-names = "clkout8"; + clocks = <&cmu CLK_FIN_PLL>; + #clock-cells = <1>; }; mipi_phy: video-phy {
Greg Kroah-Hartman
maintainerPATCH 159/171 ARM: dts: exynos: Fix max voltage for buck8 regulator on Odroid XU3/XU4
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Marek Szyprowski <[email protected]>
commit a3238924a820c1d7c977b632b769f3b5690cba09 upstream.
The maximum voltage value for buck8 regulator on Odroid XU3/XU4 boards is set too low. Increase it to the 2000mV as specified on the board schematic. So far the board worked fine, because of the bug in the PMIC driver, which used incorrect step value for that regulator. It interpreted the voltage value set by the bootloader as 1225mV and kept it unchanged. The regulator driver has been however fixed recently in the commit 56b5d4ea778c ("regulator: s2mps11: Fix steps for buck7, buck8 and LDO35"), what results in reading the proper buck8 value and forcing it to 1500mV on boot. This is not enough for proper board operation and results in eMMC errors during heavy IO traffic. Increasing maximum voltage value for buck8 restores original driver behavior and fixes eMMC issues.
--- arch/arm/boot/dts/exynos5422-odroid-core.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/exynos5422-odroid-core.dtsi +1 -1
@@ -467,7 +467,7 @@ buck8_reg: BUCK8 { regulator-name = "vdd_1.8v_ldo"; regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1500000>; + regulator-max-microvolt = <2000000>; regulator-always-on; regulator-boot-on; };
Greg Kroah-Hartman
maintainerPATCH 160/171 drm: disable uncached DMA optimization for ARM and arm64
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
[ Upstream commit e02f5c1bb2283cfcee68f2f0feddcc06150f13aa ]
The DRM driver stack is designed to work with cache coherent devices only, but permits an optimization to be enabled in some cases, where for some buffers, both the CPU and the GPU use uncached mappings, removing the need for DMA snooping and allocation in the CPU caches.
The use of uncached GPU mappings relies on the correct implementation of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU will use cached mappings nonetheless. On x86 platforms, this does not seem to matter, as uncached CPU mappings will snoop the caches in any case. However, on ARM and arm64, enabling this optimization on a platform where NoSnoop is ignored results in loss of coherency, which breaks correct operation of the device. Since we have no way of detecting whether NoSnoop works or not, just disable this optimization entirely for ARM and arm64.
--- include/drm/drm_cache.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
include/drm/drm_cache.h +18 -0
@@ -47,6 +47,24 @@ static inline bool drm_arch_can_wc_memory(void)return false;#elif defined(CONFIG_MIPS ) && defined(CONFIG_CPU_LOONGSON3 )return false; +#elif defined(CONFIG_ARM ) || defined(CONFIG_ARM64 ) +/* +* The DRM driver stack is designed to work with cache coherent devices +* only, but permits an optimization to be enabled in some cases, where +* for some buffers, both the CPU and the GPU use uncached mappings, +* removing the need for DMA snooping and allocation in the CPU caches. +* +* The use of uncached GPU mappings relies on the correct implementation +* of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU +* will use cached mappings nonetheless. On x86 platforms, this does not +* seem to matter, as uncached CPU mappings will snoop the caches in any +* case. However, on ARM and arm64, enabling this optimization on a +* platform where NoSnoop is ignored results in loss of coherency, which +* breaks correct operation of the device. Since we have no way of +* detecting whether NoSnoop works or not, just disable this +* optimization entirely for ARM and arm64. +*/ +return false;#else return true;#endif
Signature · 8 lines
2.19.1 _______________________________________________ dri-devel mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/dri-devel
Greg Kroah-Hartman
maintainerPATCH 161/171 media: Revert "media: rc: some events are dropped by userspace"
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Sean Young <[email protected]>
commit 05f0edadcc5fccdfc0676825b3e70e75dc0a8a84 upstream.
When an rc device is created, we do not know what key codes it will support, since a new keymap might be loaded at some later point. So, we set all keybit in the input device.
The uevent for the input device includes all the key codes, of which there are now 768. This overflows the size of the uevent (UEVENT_BUFFER_SIZE) and no event is generated.
Revert for now until we figure out a different solution.
This reverts commit fec225a04330d0f222d24feb5bea045526031675.
--- drivers/media/rc/rc-main.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)
drivers/media/rc/rc-main.c +12 -1
@@ -274,6 +274,7 @@ static unsigned int ir_update_mapping(st unsigned int new_keycode) {int old_keycode = rc_map->scan[index].keycode; +int i;/* Did the user wish to remove the mapping? */ if (new_keycode ==KEY_RESERVED || new_keycode ==KEY_UNKNOWN ) {
@@ -288,9 +289,20 @@ static unsigned int ir_update_mapping(st old_keycode ==KEY_RESERVED ?"New" :"Replacing" , rc_map->scan[index].scancode, new_keycode); rc_map->scan[index].keycode = new_keycode; +__set_bit (new_keycode, dev->input_dev->keybit); }if (old_keycode !=KEY_RESERVED ) { +/* A previous mapping was updated... */ +__clear_bit (old_keycode, dev->input_dev->keybit); +/* ... but another scancode might use the same keycode */ +for (i =0 ; i < rc_map->len; i++) { +if (rc_map->scan[i].keycode == old_keycode) { +__set_bit (old_keycode, dev->input_dev->keybit); +break ; + } + } +/* Possibly shrink the keytable, failure is not a problem */ ir_resize_table (dev, rc_map,GFP_ATOMIC ); }
@@ -1750,7 +1762,6 @@ static int rc_prepare_rx_device(struct rset_bit (EV_REP , dev->input_dev->evbit);set_bit (EV_MSC , dev->input_dev->evbit);set_bit (MSC_SCAN , dev->input_dev->mscbit); -bitmap_fill (dev->input_dev->keybit,KEY_CNT );/* Pointer/mouse events */ set_bit (EV_REL , dev->input_dev->evbit);
Greg Kroah-Hartman
maintainerPATCH 162/171 Revert "PCI/PME: Implement runtime PM callbacks"
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mika Westerberg <[email protected]>
commit c528f7bd362b097eeeafa6fbbeccd9750b79c7ba upstream.
This reverts commit 0e157e52860441cb26051f131dd0b5ae3187a07b.
Heiner reported that the commit in question prevents his network adapter from triggering PME and waking up when network cable is plugged.
The commit tried to prevent root port waking up from D3cold immediately but looks like disabing root port PME interrupt is not the right way to fix that issue so revert it now. The patch following proposes an alternative solution to that issue.
--- drivers/pci/pcie/pme.c | 27 --------------------------- 1 file changed, 27 deletions(-)
drivers/pci/pcie/pme.c +0 -27
@@ -432,31 +432,6 @@ static void pcie_pme_remove(struct pcie_kfree (get_service_data (srv)); } -static int pcie_pme_runtime_suspend (struct pcie_device *srv) -{ -struct pcie_pme_service_data *data =get_service_data (srv); - -spin_lock_irq (&data->lock); -pcie_pme_interrupt_enable (srv->port, false); -pcie_clear_root_pme_status (srv->port); - data->noirq = true; -spin_unlock_irq (&data->lock); - -return 0 ; -} - -static int pcie_pme_runtime_resume (struct pcie_device *srv) -{ -struct pcie_pme_service_data *data =get_service_data (srv); - -spin_lock_irq (&data->lock); -pcie_pme_interrupt_enable (srv->port, true); - data->noirq = false; -spin_unlock_irq (&data->lock); - -return 0 ; -} -static struct pcie_port_service_driver pcie_pme_driver = { .name ="pcie_pme" , .port_type =PCI_EXP_TYPE_ROOT_PORT ,
@@ -464,8 +439,6 @@ static struct pcie_port_service_driver p .probe = pcie_pme_probe, .suspend = pcie_pme_suspend, - .runtime_suspend = pcie_pme_runtime_suspend, - .runtime_resume = pcie_pme_runtime_resume, .resume = pcie_pme_resume, .remove = pcie_pme_remove, };
Greg Kroah-Hartman
maintainerPATCH 163/171 sk_msg: Always cancel strp work before freeing the psock
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jakub Sitnicki <[email protected]>
commit 1d79895aef18fa05789995d86d523c9b2ee58a02 upstream.
Despite having stopped the parser, we still need to deinitialize it by calling strp_done so that it cancels its work. Otherwise the worker thread can run after we have freed the parser, and attempt to access its workqueue resulting in a use-after-free:
==================================================================
BUG: KASAN: use-after-free in pwq_activate_delayed_work+0x1b/0x1d0
Read of size 8 at addr ffff888069975240 by task kworker/u2:2/93
CPU: 0 PID: 93 Comm: kworker/u2:2 Not tainted 5.0.0-rc2-00335-g28f9d1a3d4fe-dirty #14
Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.10.2-2.fc27 04/01/2014
Workqueue: (null) (kstrp)
Call Trace:
print_address_description+0x6e/0x2b0
? pwq_activate_delayed_work+0x1b/0x1d0
kasan_report+0xfd/0x177
? pwq_activate_delayed_work+0x1b/0x1d0
? pwq_activate_delayed_work+0x1b/0x1d0
pwq_activate_delayed_work+0x1b/0x1d0
? process_one_work+0x4aa/0x660
pwq_dec_nr_in_flight+0x9b/0x100
worker_thread+0x82/0x680
? process_one_work+0x660/0x660
kthread+0x1b9/0x1e0
? __kthread_create_on_node+0x250/0x250
ret_from_fork+0x1f/0x30
Allocated by task 111:
sk_psock_init+0x3c/0x1b0
sock_map_link.isra.2+0x103/0x4b0
sock_map_update_common+0x94/0x270
sock_map_update_elem+0x145/0x160
__se_sys_bpf+0x152e/0x1e10
do_syscall_64+0xb2/0x3e0
entry_SYSCALL_64_after_hwframe+0x44/0xa9
Freed by task 112:
kfree+0x7f/0x140
process_one_work+0x40b/0x660
worker_thread+0x82/0x680
kthread+0x1b9/0x1e0
ret_from_fork+0x1f/0x30
The buggy address belongs to the object at ffff888069975180
which belongs to the cache kmalloc-512 of size 512
The buggy address is located 192 bytes inside of
512-byte region [ffff888069975180, ffff888069975380)
The buggy address belongs to the page:
page:ffffea0001a65d00 count:1 mapcount:0 mapping:ffff88806d401280 index:0x0 compound_mapcount: 0
flags: 0x4000000000010200(slab|head)
raw: 4000000000010200 dead000000000100 dead000000000200 ffff88806d401280
raw: 0000000000000000 00000000800c000c 00000001ffffffff 0000000000000000
page dumped because: kasan: bad access detected
Memory state around the buggy address:
ffff888069975100: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
ffff888069975180: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
>ffff888069975200: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
^
ffff888069975280: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
ffff888069975300: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
==================================================================--- net/core/skmsg.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
net/core/skmsg.c +1 -2
@@ -545,8 +545,7 @@ static void sk_psock_destroy_deferred(st struct sk_psock *psock = container_of(gc, struct sk_psock, gc);/* No sk_callback_lock since already detached. */ -if (psock->parser.enabled) -strp_done (&psock->parser.strp); +strp_done (&psock->parser.strp);cancel_work_sync (&psock->work);
Greg Kroah-Hartman
maintainerPATCH 164/171 bpf: Stop the psock parser before canceling its work
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jakub Sitnicki <[email protected]>
commit e8e3437762ad938880dd48a3c52d702e7cf3c124 upstream.
We might have never enabled (started) the psock's parser, in which case it will not get stopped when destroying the psock. This leads to a warning when trying to cancel parser's work from psock's deferred destructor:
[ 405.325769] WARNING: CPU: 1 PID: 3216 at net/strparser/strparser.c:526 strp_done+0x3c/0x40 [ 405.326712] Modules linked in: [last unloaded: test_bpf] [ 405.327359] CPU: 1 PID: 3216 Comm: kworker/1:164 Tainted: G W 5.0.0 #42 [ 405.328294] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS ?-20180531_142017-buildhw-08.phx2.fedoraproject.org-1.fc28 04/01/2014 [ 405.329712] Workqueue: events sk_psock_destroy_deferred [ 405.330254] RIP: 0010:strp_done+0x3c/0x40 [ 405.330706] Code: 28 e8 b8 d5 6b ff 48 8d bb 80 00 00 00 e8 9c d5 6b ff 48 8b 7b 18 48 85 ff 74 0d e8 1e a5 e8 ff 48 c7 43 18 00 00 00 00 5b c3 <0f> 0b eb cf 66 66 66 66 90 55 89 f5 53 48 89 fb 48 83 c7 28 e8 0b [ 405.332862] RSP: 0018:ffffc900026bbe50 EFLAGS: 00010246 [ 405.333482] RAX: ffffffff819323e0 RBX: ffff88812cb83640 RCX: ffff88812cb829e8 [ 405.334228] RDX: 0000000000000001 RSI: ffff88812cb837e8 RDI: ffff88812cb83640 [ 405.335366] RBP: ffff88813fd22680 R08: 0000000000000000 R09: 000073746e657665 [ 405.336472] R10: 8080808080808080 R11: 0000000000000001 R12: ffff88812cb83600 [ 405.337760] R13: 0000000000000000 R14: ffff88811f401780 R15: ffff88812cb837e8 [ 405.338777] FS: 0000000000000000(0000) GS:ffff88813fd00000(0000) knlGS:0000000000000000 [ 405.339903] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 405.340821] CR2: 00007fb11489a6b8 CR3: 000000012d4d6000 CR4: 00000000000406e0 [ 405.341981] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 405.343131] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 405.344415] Call Trace: [ 405.344821] sk_psock_destroy_deferred+0x23/0x1b0 [ 405.345585] process_one_work+0x1ae/0x3e0 [ 405.346110] worker_thread+0x3c/0x3b0 [ 405.346576] ? pwq_unbound_release_workfn+0xd0/0xd0 [ 405.347187] kthread+0x11d/0x140 [ 405.347601] ? __kthread_parkme+0x80/0x80 [ 405.348108] ret_from_fork+0x35/0x40 [ 405.348566] ---[ end trace a4a3af4026a327d4 ]---
Stop psock's parser just before canceling its work.
--- net/core/skmsg.c | 1 + 1 file changed, 1 insertion(+)
net/core/skmsg.c +1 -0
@@ -545,6 +545,7 @@ static void sk_psock_destroy_deferred(st struct sk_psock *psock = container_of(gc, struct sk_psock, gc);/* No sk_callback_lock since already detached. */ +strp_stop (&psock->parser.strp);strp_done (&psock->parser.strp);cancel_work_sync (&psock->work);
Greg Kroah-Hartman
maintainerPATCH 165/171 gfs2: Fix missed wakeups in find_insert_glock
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Andreas Gruenbacher <[email protected]>
commit 605b0487f0bc1ae9963bf52ece0f5c8055186f81 upstream.
Mark Syms has reported seeing tasks that are stuck waiting in find_insert_glock. It turns out that struct lm_lockname contains four padding bytes on 64-bit architectures that function glock_waitqueue doesn't skip when hashing the glock name. As a result, we can end up waking up the wrong waitqueue, and the waiting tasks may be stuck forever.
Fix that by using ht_parms.key_len instead of sizeof(struct lm_lockname) for the key length.
--- fs/gfs2/glock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
fs/gfs2/glock.c +1 -1
@@ -107,7 +107,7 @@ static int glock_wake_function(wait_queustatic wait_queue_head_t *glock_waitqueue (struct lm_lockname *name) { -u32 hash =jhash2 ((u32 *)name,sizeof (*name) /4 ,0 ); +u32 hash =jhash2 ((u32 *)name, ht_parms.key_len /4 ,0 );return glock_wait_table +hash_32 (hash,GLOCK_WAIT_TABLE_BITS ); }
Greg Kroah-Hartman
maintainerPATCH 166/171 staging: erofs: keep corrupted fs from crashing kernel in erofs_namei()
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Gao Xiang <[email protected]>
commit 419d6efc50e94bcf5d6b35cd8c71f79edadec564 upstream.
As Al pointed out, "
... and while we are at it, what happens to
unsigned int nameoff = le16_to_cpu(de[mid].nameoff); unsigned int matched = min(startprfx, endprfx); struct qstr dname = QSTR_INIT(data + nameoff, unlikely(mid >= ndirents - 1) ? maxsize - nameoff : le16_to_cpu(de[mid + 1].nameoff) - nameoff); /* string comparison without already matched prefix */ int ret = dirnamecmp(name, &dname, &matched);
if le16_to_cpu(de[...].nameoff) is not monotonically increasing? I.e. what's to prevent e.g. (unsigned)-1 ending up in dname.len?
Corrupted fs image shouldn't oops the kernel.. "
Revisit the related lookup flow to address the issue.
--- drivers/staging/erofs/namei.c | 183 ++++++++++++++++++++++-------------------- 1 file changed, 97 insertions(+), 86 deletions(-)
drivers/staging/erofs/namei.c +97 -86
@@ -15,74 +15,77 @@#include <trace/events/erofs.h> -/* based on the value of qn->len is accurate */ -static inline int dirnamecmp (struct qstr *qn, -struct qstr *qd,unsigned int *matched) +struct erofs_qstr { +const unsigned char *name; +const unsigned char *end; +}; + +/* based on the end of qn is accurate and it must have the trailing '\0' */ +static inline int dirnamecmp (const struct erofs_qstr *qn, +const struct erofs_qstr *qd, +unsigned int *matched) { -unsigned int i = *matched, len =min (qn->len, qd->len); -loop: -if (unlikely (i >= len)) { - *matched = i; -if (qn->len < qd->len) { -/* -* actually (qn->len == qd->len) -* when qd->name[i] == '\0' -*/ -return qd->name[i] =='\0' ?0 :-1 ; - } -return (qn->len > qd->len); - } +unsigned int i = *matched; -if (qn->name[i] != qd->name[i]) { - *matched = i; -return qn->name[i] > qd->name[i] ?1 :-1 ; +/* +* on-disk error, let's only BUG_ON in the debugging mode. +* otherwise, it will return 1 to just skip the invalid name +* and go on (in consideration of the lookup performance). +*/ +DBG_BUGON (qd->name > qd->end); + +/* qd could not have trailing '\0' */ +/* However it is absolutely safe if < qd->end */ +while (qd->name + i < qd->end && qd->name[i] !='\0' ) { +if (qn->name[i] != qd->name[i]) { + *matched = i; +return qn->name[i] > qd->name[i] ?1 :-1 ; + } + ++i; } - - ++i; - goto loop; + *matched = i; +/* See comments in __d_alloc on the terminating NUL character */ +return qn->name[i] =='\0' ?0 :1 ; } -static struct erofs_dirent *find_target_dirent ( -struct qstr *name, -u8 *data,int maxsize) +#define nameoff_from_disk (off, sz) (le16_to_cpu(off) & ((sz) - 1)) + +static struct erofs_dirent *find_target_dirent (struct erofs_qstr *name, +u8 *data, +unsigned int dirblksize, +const int ndirents) { -unsigned int ndirents, head, back; +int head, back;unsigned int startprfx, endprfx;struct erofs_dirent *const de = (struct erofs_dirent *)data; -/* make sure that maxsize is valid */ -BUG_ON (maxsize <sizeof (struct erofs_dirent )); - - ndirents =le16_to_cpu (de->nameoff) /sizeof (*de); - -/* corrupted dir (may be unnecessary...) */ -BUG_ON (!ndirents); - - head =0 ; +/* since the 1st dirent has been evaluated previously */ + head =1 ; back = ndirents -1 ; startprfx = endprfx =0 ;while (head <= back) { -unsigned int mid = head + (back - head) /2 ; -unsigned int nameoff =le16_to_cpu (de[mid].nameoff); +const int mid = head + (back - head) /2 ; +const int nameoff =nameoff_from_disk (de[mid].nameoff, + dirblksize);unsigned int matched =min (startprfx, endprfx); - -struct qstr dname =QSTR_INIT (data + nameoff, -unlikely (mid >= ndirents -1 ) ? - maxsize - nameoff : -le16_to_cpu (de[mid +1 ].nameoff) - nameoff); +struct erofs_qstr dname = { + .name = data + nameoff, + .end =unlikely (mid >= ndirents -1 ) ? + data + dirblksize : + data +nameoff_from_disk (de[mid +1 ].nameoff, + dirblksize) + };/* string comparison without already matched prefix */ int ret =dirnamecmp (name, &dname, &matched); -if (unlikely (!ret)) +if (unlikely (!ret)) {return de + mid; -else if (ret >0 ) { + }else if (ret >0 ) { head = mid +1 ; startprfx = matched; - }else if (unlikely (mid <1 ))/* fix "mid" overflow */ -break ; -else { + }else { back = mid -1 ; endprfx = matched; }
@@ -91,12 +94,12 @@ static struct erofs_dirent *find_target_return ERR_PTR (-ENOENT ); } -static struct page *find_target_block_classic ( -struct inode *dir, -struct qstr *name,int *_diff) +static struct page *find_target_block_classic (struct inode *dir, +struct erofs_qstr *name, +int *_ndirents) {unsigned int startprfx, endprfx; -unsigned int head, back; +int head, back;struct address_space *const mapping = dir->i_mapping;struct page *candidate =ERR_PTR (-ENOENT );
@@ -105,41 +108,43 @@ static struct page *find_target_block_cl back =inode_datablocks (dir) -1 ;while (head <= back) { -unsigned int mid = head + (back - head) /2 ; +const int mid = head + (back - head) /2 ;struct page *page =read_mapping_page (mapping, mid,NULL ); -if (IS_ERR (page)) { -exact_out: -if (!IS_ERR (candidate))/* valid candidate */ -put_page (candidate); -return page; - }else { -int diff; -unsigned int ndirents, matched; -struct qstr dname; +if (!IS_ERR (page)) {struct erofs_dirent *de =kmap_atomic (page); -unsigned int nameoff =le16_to_cpu (de->nameoff); - - ndirents = nameoff /sizeof (*de); +const int nameoff =nameoff_from_disk (de->nameoff, +EROFS_BLKSIZ ); +const int ndirents = nameoff /sizeof (*de); +int diff; +unsigned int matched; +struct erofs_qstr dname; -/* corrupted dir (should have one entry at least) */ -BUG_ON (!ndirents || nameoff >PAGE_SIZE ); +if (unlikely (!ndirents)) { +DBG_BUGON (1 ); +kunmap_atomic (de); +put_page (page); + page =ERR_PTR (-EIO ); + goto out; + } matched =min (startprfx, endprfx); dname.name = (u8 *)de + nameoff; - dname.len = ndirents ==1 ? -/* since the rest of the last page is 0 */ -EROFS_BLKSIZ - nameoff - :le16_to_cpu (de[1 ].nameoff) - nameoff; +if (ndirents ==1 ) + dname.end = (u8 *)de +EROFS_BLKSIZ ; +else + dname.end = (u8 *)de + +nameoff_from_disk (de[1 ].nameoff, +EROFS_BLKSIZ );/* string comparison without already matched prefix */ diff =dirnamecmp (name, &dname, &matched);kunmap_atomic (de);if (unlikely (!diff)) { - *_diff =0 ; - goto exact_out; + *_ndirents =0 ; + goto out; }else if (diff >0 ) { head = mid +1 ; startprfx = matched;
@@ -147,45 +152,51 @@ exact_out:if (likely (!IS_ERR (candidate)))put_page (candidate); candidate = page; + *_ndirents = ndirents; }else {put_page (page); -if (unlikely (mid <1 ))/* fix "mid" overflow */ -break ; - back = mid -1 ; endprfx = matched; } +continue ; } +out:/* free if the candidate is valid */ +if (!IS_ERR (candidate)) +put_page (candidate); +return page; } - *_diff =1 ;return candidate; }int erofs_namei (struct inode *dir, -struct qstr *name, -erofs_nid_t *nid,unsigned int *d_type) +struct qstr *name, +erofs_nid_t *nid,unsigned int *d_type) { -int diff; +int ndirents;struct page *page; -u8 *data; +void *data;struct erofs_dirent *de; +struct erofs_qstr qn;if (unlikely (!dir->i_size))return -ENOENT ; - diff =1 ; - page =find_target_block_classic (dir, name, &diff); + qn.name = name->name; + qn.end = name->name + name->len; + + ndirents =0 ; + page =find_target_block_classic (dir, &qn, &ndirents);if (unlikely (IS_ERR (page)))return PTR_ERR (page); data =kmap_atomic (page);/* the target page has been mapped */ - de =likely (diff) ? -/* since the rest of the last page is 0 */ -find_target_dirent (name, data,EROFS_BLKSIZ ) : - (struct erofs_dirent *)data; +if (ndirents) + de =find_target_dirent (&qn, data,EROFS_BLKSIZ , ndirents); +else + de = (struct erofs_dirent *)data;if (likely (!IS_ERR (de))) { *nid =le64_to_cpu (de->nid);
Greg Kroah-Hartman
maintainerPATCH 167/171 ath9k: Avoid OF no-EEPROM quirks without qca,no-eeprom
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: Daniel F. Dickinson <[email protected]>
commit ce938231bd3b1d7af3cbd8836f084801090470e1 upstream.
ath9k_of_init() function[0] was initially written on the assumption that if someone had an explicit ath9k OF node that "there must be something wrong, why would someone add an OF node if everything is fine"[1] (Quoting Martin Blumenstingl <[email protected]>)
"it turns out it's not that simple. with your requirements I'm now aware of two use-cases where the current code in ath9k_of_init() doesn't work without modifications"[1]
The "your requirements" Martin speaks of is the result of the fact that I have a device (PowerCloud Systems CR5000) has some kind of default - not unique mac address - set and requires to set the correct MAC address via mac-address devicetree property, however:
"some cards come with a physical EEPROM chip [or OTP] so "qca,no-eeprom" should not be set (your use-case). in this case AH_USE_EEPROM should be set (which is the default when there is no OF node)"[1]
The other use case is:
the firmware on some PowerMac G5 seems to add a OF node for the ath9k card automatically. depending on the EEPROM on the card AH_NO_EEP_SWAP should be unset (which is the default when there is no OF node). see [3]
After this patch to ath9k_of_init() the new behavior will be:
if there's no OF node then everything is the same as before if there's an empty OF node then ath9k will use the hardware EEPROM
(before ath9k would fail to initialize because no EEPROM data was provided by userspace)
if there's an OF node with only a MAC address then ath9k will use
the MAC address and the hardware EEPROM (see the case above)
with "qca,no-eeprom" EEPROM data from userspace will be requested.
the behavior here will not change
[1]
Martin provides additional background on EEPROM swapping[1].
Thanks to Christian Lamparter <[email protected]> for all his help on troubleshooting this issue and the basis for this patch.
[0]https://elixir.bootlin.com/linux/v4.20-rc7/source/drivers/net/wireless/ath/ath9k/init.c#L615 [1]https://github.com/openwrt/openwrt/pull/1645#issuecomment-448027058 [2]https://github.com/openwrt/openwrt/pull/1613 [3]https://patchwork.kernel.org/patch/10241731/
--- drivers/net/wireless/ath/ath9k/init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/net/wireless/ath/ath9k/init.c +3 -3
@@ -636,15 +636,15 @@ static int ath9k_of_init(struct ath_soft ret =ath9k_eeprom_request (sc, eeprom_name);if (ret)return ret; + + ah->ah_flags &= ~AH_USE_EEPROM ; + ah->ah_flags |=AH_NO_EEP_SWAP ; } mac =of_get_mac_address (np);if (mac)ether_addr_copy (common->macaddr, mac); - ah->ah_flags &= ~AH_USE_EEPROM ; - ah->ah_flags |=AH_NO_EEP_SWAP ; -return 0 ; }
Greg Kroah-Hartman
maintainerPATCH 168/171 perf/x86/intel: Make cpuc allocations consistent
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: "Peter Zijlstra (Intel)" <[email protected]>
commit d01b1f96a82e5dd7841a1d39db3abfdaf95f70ab upstream
The cpuc data structure allocation is different between fake and real cpuc's; use the same code to init/free both.
--- arch/x86/events/core.c | 13 +++++-------- arch/x86/events/intel/core.c | 29 ++++++++++++++++++----------- arch/x86/events/perf_event.h | 11 ++++++++--- 3 files changed, 31 insertions(+), 22 deletions(-)
arch/x86/events/core.c +5 -8
@@ -1995,7 +1995,7 @@ static int x86_pmu_commit_txn(struct pmu*/ static void free_fake_cpuc (struct cpu_hw_events *cpuc) { -kfree (cpuc->shared_regs); +intel_cpuc_finish (cpuc);kfree (cpuc); }
@@ -2007,14 +2007,11 @@ static struct cpu_hw_events *allocate_fa cpuc =kzalloc (sizeof (*cpuc),GFP_KERNEL );if (!cpuc)return ERR_PTR (-ENOMEM ); - -/* only needed, if we have extra_regs */ -if (x86_pmu.extra_regs) { - cpuc->shared_regs =allocate_shared_regs (cpu); -if (!cpuc->shared_regs) - goto error; - } cpuc->is_fake =1 ; + +if (intel_cpuc_prepare (cpuc, cpu)) + goto error; +return cpuc; error:free_fake_cpuc (cpuc);
arch/x86/events/intel/core.c +18 -11
@@ -3398,7 +3398,7 @@ ssize_t intel_event_sysfs_show(char *pagreturn x86_event_sysfs_show (page, config, event); } -struct intel_shared_regs *allocate_shared_regs (int cpu) +static struct intel_shared_regs *allocate_shared_regs (int cpu) {struct intel_shared_regs *regs;int i;
@@ -3430,10 +3430,9 @@ static struct intel_excl_cntrs *allocatereturn c; } -static int intel_pmu_cpu_prepare (int cpu) -{ -struct cpu_hw_events *cpuc = &per_cpu (cpu_hw_events, cpu); +int intel_cpuc_prepare (struct cpu_hw_events *cpuc,int cpu) +{if (x86_pmu.extra_regs || x86_pmu.lbr_sel_map) { cpuc->shared_regs =allocate_shared_regs (cpu);if (!cpuc->shared_regs)
@@ -3443,7 +3442,7 @@ static int intel_pmu_cpu_prepare(int cpuif (x86_pmu.flags &PMU_FL_EXCL_CNTRS ) {size_t sz =X86_PMC_IDX_MAX *sizeof (struct event_constraint ); - cpuc->constraint_list =kzalloc (sz,GFP_KERNEL ); + cpuc->constraint_list =kzalloc_node (sz,GFP_KERNEL ,cpu_to_node (cpu));if (!cpuc->constraint_list) goto err_shared_regs;
@@ -3468,6 +3467,11 @@ err:return -ENOMEM ; } +static int intel_pmu_cpu_prepare (int cpu) +{ +return intel_cpuc_prepare (&per_cpu (cpu_hw_events, cpu), cpu); +} +static void flip_smm_bit (void *data) {unsigned long set = *(unsigned long *)data;
@@ -3542,9 +3546,8 @@ static void intel_pmu_cpu_starting(int c } } -static void free_excl_cntrs (int cpu) +static void free_excl_cntrs (struct cpu_hw_events *cpuc) { -struct cpu_hw_events *cpuc = &per_cpu (cpu_hw_events, cpu);struct intel_excl_cntrs *c; c = cpuc->excl_cntrs;
@@ -3565,9 +3568,8 @@ static void intel_pmu_cpu_dying(int cpu)disable_counter_freeze (); } -static void intel_pmu_cpu_dead (int cpu) +void intel_cpuc_finish (struct cpu_hw_events *cpuc) { -struct cpu_hw_events *cpuc = &per_cpu (cpu_hw_events, cpu);struct intel_shared_regs *pc; pc = cpuc->shared_regs;
@@ -3577,7 +3579,12 @@ static void intel_pmu_cpu_dead(int cpu) cpuc->shared_regs =NULL ; } -free_excl_cntrs (cpu); +free_excl_cntrs (cpuc); +} + +static void intel_pmu_cpu_dead (int cpu) +{ +intel_cpuc_finish (&per_cpu (cpu_hw_events, cpu)); } static void intel_pmu_sched_task(struct perf_event_context *ctx,
@@ -4715,7 +4722,7 @@ static __init int fixup_ht_bug(void)hardlockup_detector_perf_restart ();for_each_online_cpu (c) -free_excl_cntrs (c); +free_excl_cntrs (&per_cpu (cpu_hw_events, c));cpus_read_unlock ();pr_info ("PMU erratum BJ122, BV98, HSD29 workaround disabled, HT off\n" );
arch/x86/events/perf_event.h +8 -3
@@ -889,7 +889,8 @@ struct event_constraint * x86_get_event_constraints(struct cpu_hw_events *cpuc, int idx, struct perf_event *event); -struct intel_shared_regs *allocate_shared_regs (int cpu); +extern int intel_cpuc_prepare (struct cpu_hw_events *cpuc,int cpu); +extern void intel_cpuc_finish (struct cpu_hw_events *cpuc);int intel_pmu_init (void );
@@ -1025,9 +1026,13 @@ static inline int intel_pmu_init(void)return 0 ; } -static inline struct intel_shared_regs *allocate_shared_regs (int cpu) +static inline int intel_cpuc_prepare (struct cpu_hw_event *cpuc,int cpu) +{ +return 0 ; +} + +static inline void intel_cpuc_finish (struct cpu_hw_event *cpuc) { -return NULL ; }static inline int is_ht_workaround_enabled (void )
Greg Kroah-Hartman
maintainerPATCH 169/171 perf/x86/intel: Generalize dynamic constraint creation
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: "Peter Zijlstra (Intel)" <[email protected]>
commit 11f8b2d65ca9029591c8df26bb6bd063c312b7fe upstream
Such that we can re-use it.
--- arch/x86/events/intel/core.c | 51 +++++++++++++++++++++++++------------------ 1 file changed, 30 insertions(+), 21 deletions(-)
arch/x86/events/intel/core.c +30 -21
@@ -2769,6 +2769,35 @@ intel_stop_scheduling(struct cpu_hw_even }static struct event_constraint * +dyn_constraint (struct cpu_hw_events *cpuc,struct event_constraint *c,int idx) +{ +WARN_ON_ONCE (!cpuc->constraint_list); + +if (!(c->flags &PERF_X86_EVENT_DYNAMIC )) { +struct event_constraint *cx; + +/* +* grab pre-allocated constraint entry +*/ + cx = &cpuc->constraint_list[idx]; + +/* +* initialize dynamic constraint +* with static constraint +*/ + *cx = *c; + +/* +* mark constraint as dynamic +*/ + cx->flags |=PERF_X86_EVENT_DYNAMIC ; + c = cx; + } + +return c; +} + +static struct event_constraint *intel_get_excl_constraints (struct cpu_hw_events *cpuc,struct perf_event *event,int idx,struct event_constraint *c) {
@@ -2798,27 +2827,7 @@ intel_get_excl_constraints(struct cpu_hw* only needed when constraint has not yet * been cloned (marked dynamic) */ -if (!(c->flags &PERF_X86_EVENT_DYNAMIC )) { -struct event_constraint *cx; - -/* -* grab pre-allocated constraint entry -*/ - cx = &cpuc->constraint_list[idx]; - -/* -* initialize dynamic constraint -* with static constraint -*/ - *cx = *c; - -/* -* mark constraint as dynamic, so we -* can free it later on -*/ - cx->flags |=PERF_X86_EVENT_DYNAMIC ; - c = cx; - } + c =dyn_constraint (cpuc, c, idx);/* * From here on, the constraint is dynamic.
Greg Kroah-Hartman
maintainerPATCH 170/171 x86: Add TSX Force Abort CPUID/MSR
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: "Peter Zijlstra (Intel)" <[email protected]>
commit 52f64909409c17adf54fcf5f9751e0544ca3a6b4 upstream
Skylake systems will receive a microcode update to address a TSX errata. This microcode will (by default) clobber PMC3 when TSX instructions are (speculatively or not) executed.
It also provides an MSR to cause all TSX transaction to abort and preserve PMC3.
Add the CPUID enumeration and MSR definition.
--- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/msr-index.h | 6 ++++++ 2 files changed, 7 insertions(+)
arch/x86/include/asm/cpufeatures.h +1 -0
@@ -342,6 +342,7 @@/* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */ #define X86_FEATURE_AVX512_4VNNIW (18*32+ 2)/* AVX-512 Neural Network Instructions */ #define X86_FEATURE_AVX512_4FMAPS (18*32+ 3)/* AVX-512 Multiply Accumulation Single precision */ +#define X86_FEATURE_TSX_FORCE_ABORT (18*32+13)/* "" TSX_FORCE_ABORT */ #define X86_FEATURE_PCONFIG (18*32+18)/* Intel PCONFIG */ #define X86_FEATURE_SPEC_CTRL (18*32+26)/* "" Speculation Control (IBRS + IBPB) */ #define X86_FEATURE_INTEL_STIBP (18*32+27)/* "" Single Thread Indirect Branch Predictors */
arch/x86/include/asm/msr-index.h +6 -0
@@ -630,6 +630,12 @@#define MSR_IA32_TSC_DEADLINE 0x000006E0 + +#define MSR_TSX_FORCE_ABORT 0x0000010F + +#define MSR_TFA_RTM_FORCE_ABORT_BIT 0 +#define MSR_TFA_RTM_FORCE_ABORT BIT_ULL(MSR_TFA_RTM_FORCE_ABORT_BIT) +/* P4/Xeon+ specific */ #define MSR_IA32_MCG_EAX 0x00000180#define MSR_IA32_MCG_EBX 0x00000181
Greg Kroah-Hartman
maintainerPATCH 171/171 perf/x86/intel: Implement support for TSX Force Abort
In reply to Greg Kroah-Hartman4.20-stable review patch. If anyone has any objections, please let me know.
------------------
From: "Peter Zijlstra (Intel)" <[email protected]>
commit 400816f60c543153656ac74eaf7f36f6b7202378 upstream
Skylake (and later) will receive a microcode update to address a TSX errata. This microcode will, on execution of a TSX instruction (speculative or not) use (clobber) PMC3. This update will also provide a new MSR to change this behaviour along with a CPUID bit to enumerate the presence of this new MSR.
When the MSR gets set; the microcode will no longer use PMC3 but will Force Abort every TSX transaction (upon executing COMMIT).
When TSX Force Abort (TFA) is allowed (default); the MSR gets set when PMC3 gets scheduled and cleared when, after scheduling, PMC3 is unused.
When TFA is not allowed; clear PMC3 from all constraints such that it will not get used.
--- arch/x86/events/intel/core.c | 74 +++++++++++++++++++++++++++++++++++++++++-- arch/x86/events/perf_event.h | 6 +++ 2 files changed, 77 insertions(+), 3 deletions(-)
arch/x86/events/intel/core.c +71 -3
@@ -1999,6 +1999,39 @@ static void intel_pmu_nhm_enable_all(intintel_pmu_enable_all (added); } +static void intel_set_tfa (struct cpu_hw_events *cpuc,bool on) +{ +u64 val = on ?MSR_TFA_RTM_FORCE_ABORT :0 ; + +if (cpuc->tfa_shadow != val) { + cpuc->tfa_shadow = val; +wrmsrl (MSR_TSX_FORCE_ABORT , val); + } +} + +static void intel_tfa_commit_scheduling (struct cpu_hw_events *cpuc,int idx,int cntr) +{ +/* +* We're going to use PMC3, make sure TFA is set before we touch it. +*/ +if (cntr ==3 && !cpuc->is_fake) +intel_set_tfa (cpuc, true); +} + +static void intel_tfa_pmu_enable_all (int added) +{ +struct cpu_hw_events *cpuc =this_cpu_ptr (&cpu_hw_events); + +/* +* If we find PMC3 is no longer used when we enable the PMU, we can +* clear TFA. +*/ +if (!test_bit (3 , cpuc->active_mask)) +intel_set_tfa (cpuc, false); + +intel_pmu_enable_all (added); +} +static void enable_counter_freeze (void ) { update_debugctlmsr(get_debugctlmsr() |
@@ -3354,6 +3387,26 @@ glp_get_event_constraints(struct cpu_hw_return c; } +static bool allow_tsx_force_abort = true; + +static struct event_constraint * +tfa_get_event_constraints (struct cpu_hw_events *cpuc,int idx, +struct perf_event *event) +{ +struct event_constraint *c =hsw_get_event_constraints (cpuc, idx, event); + +/* +* Without TFA we must not use PMC3. +*/ +if (!allow_tsx_force_abort &&test_bit (3 , c->idxmsk)) { + c =dyn_constraint (cpuc, c, idx); + c->idxmsk64 &= ~(1ULL <<3 ); + c->weight--; + } + +return c; +} +/* * Broadwell: *
@@ -3448,13 +3501,15 @@ int intel_cpuc_prepare(struct cpu_hw_eve goto err; } -if (x86_pmu.flags &PMU_FL_EXCL_CNTRS ) { +if (x86_pmu.flags & (PMU_FL_EXCL_CNTRS |PMU_FL_TFA )) {size_t sz =X86_PMC_IDX_MAX *sizeof (struct event_constraint ); cpuc->constraint_list =kzalloc_node (sz,GFP_KERNEL ,cpu_to_node (cpu));if (!cpuc->constraint_list) goto err_shared_regs; + } +if (x86_pmu.flags &PMU_FL_EXCL_CNTRS ) { cpuc->excl_cntrs =allocate_excl_cntrs (cpu);if (!cpuc->excl_cntrs) goto err_constraint_list;
@@ -3564,9 +3619,10 @@ static void free_excl_cntrs(struct cpu_hif (c->core_id ==-1 || --c->refcnt ==0 )kfree (c); cpuc->excl_cntrs =NULL ; -kfree (cpuc->constraint_list); - cpuc->constraint_list =NULL ; } + +kfree (cpuc->constraint_list); + cpuc->constraint_list =NULL ; }static void intel_pmu_cpu_dying (int cpu)
@@ -4086,8 +4142,11 @@ static struct attribute *intel_pmu_caps_ NULL }; +DEVICE_BOOL_ATTR (allow_tsx_force_abort,0644 , allow_tsx_force_abort); +static struct attribute *intel_pmu_attrs[] = { &dev_attr_freeze_on_smi.attr, +NULL ,/* &dev_attr_allow_tsx_force_abort.attr.attr */ NULL , };
@@ -4580,6 +4639,15 @@ __init int intel_pmu_init(void) tsx_attr = hsw_tsx_events_attrs;intel_pmu_pebs_data_source_skl ( boot_cpu_data.x86_model ==INTEL_FAM6_SKYLAKE_X ); + +if (boot_cpu_has (X86_FEATURE_TSX_FORCE_ABORT )) { + x86_pmu.flags |=PMU_FL_TFA ; + x86_pmu.get_event_constraints = tfa_get_event_constraints; + x86_pmu.enable_all = intel_tfa_pmu_enable_all; + x86_pmu.commit_scheduling = intel_tfa_commit_scheduling; + intel_pmu_attrs[1 ] = &dev_attr_allow_tsx_force_abort.attr.attr; + } +pr_cont ("Skylake events, " ); name ="skylake" ;break ;
arch/x86/events/perf_event.h +6 -0
@@ -243,6 +243,11 @@ struct cpu_hw_events {int excl_thread_id;/* 0 or 1 */ /* +* SKL TSX_FORCE_ABORT shadow +*/ +u64 tfa_shadow; + +/* * AMD specific bits */ struct amd_nb *amd_nb;
@@ -681,6 +686,7 @@ do { \#define PMU_FL_EXCL_CNTRS 0x4/* has exclusive counter requirements */ #define PMU_FL_EXCL_ENABLED 0x8/* exclusive counter active */ #define PMU_FL_PEBS_ALL 0x10/* all events are valid PEBS events */ +#define PMU_FL_TFA 0x20/* deal with TSX force abort */ #define EVENT_VAR (_id) event_attr_##_id#define EVENT_PTR (_id) &event_attr_##_id.attr.attr
Quoted 10 lines · Greg Kroah-Hartman
This is the start of the stable review cycle for the 4.20.16 release. There are 171 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know.
Responses should be made by Thu Mar 14 17:02:23 UTC 2019. Anything received after that time might be too late.
The whole patch series can be found in one patch at:
Quoted 8 lines
https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.20.16-rc1.gzor in the git tree and branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.gitlinux-4.20.y
and the diffstat can be found below.thanks,
greg k-h
Results from Linaro’s test farm.
No regressions on arm64, arm, x86_64, and i386.
Summary
------------------------------------------------------------------------
kernel: 4.20.16-rc1
git repo: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git
git branch: linux-4.20.y
git commit: dcd2fdc8ae00bd293344e99ba5de929e565ac4f2
git describe: v4.20.15-172-gdcd2fdc8ae00
Test details: https://qa-reports.linaro.org/lkft/linux-stable-rc-4.20-oe/build/v4.20.15-172-gdcd2fdc8ae00
No regressions (compared to build v4.20.15)
No fixes (compared to build v4.20.15)
Ran 15192 total tests in the following environments and test suites.
Environments
--------------
- dragonboard-410c - arm64
- hi6220-hikey - arm64
- juno-r2 - arm64
- qemu_arm
- qemu_arm64
- qemu_i386
- qemu_x86_64
- x15 - arm
Test Suites
-----------
* boot
* install-android-platform-tools-r2600
* kselftest
* libhugetlbfs
* ltp-cap_bounds-tests
* ltp-commands-tests
* ltp-containers-tests
* ltp-cpuhotplug-tests
* ltp-cve-tests
* ltp-dio-tests
* ltp-fcntl-locktests-tests
* ltp-filecaps-tests
* ltp-fs_bind-tests
* ltp-fs_perms_simple-tests
* ltp-fsx-tests
* ltp-hugetlb-tests
* ltp-io-tests
* ltp-ipc-tests
* ltp-math-tests
* ltp-mm-tests
* ltp-nptl-tests
* ltp-pty-tests
* ltp-sched-tests
* ltp-securebits-tests
* ltp-syscalls-tests
* ltp-timers-tests
* spectre-meltdown-checker-test
* ltp-fs-tests
* ltp-open-posix-tests
Signature · 2 lines
Linaro LKFT https://lkft.linaro.org
Greg Kroah-Hartman
maintainerQuoted 17 lines · Naresh Kamboju
Quoted 15 lines · Greg Kroah-Hartman
This is the start of the stable review cycle for the 4.20.16 release. There are 171 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know.
Responses should be made by Thu Mar 14 17:02:23 UTC 2019. Anything received after that time might be too late.
The whole patch series can be found in one patch at:
https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.20.16-rc1.gzor in the git tree and branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.gitlinux-4.20.y
and the diffstat can be found below.
Quoted 6 lines
Quoted 3 lines
thanks,
greg k-h
Results from Linaro’s test farm.
No regressions on arm64, arm,x86_64, and i386.
Thanks for testing all of these and letting me know.
greg k-h
Jon Hunter
maintainerQuoted 9 lines · Greg Kroah-Hartman
This is the start of the stable review cycle for the 4.20.16 release. There are 171 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know.
Responses should be made by Thu Mar 14 17:02:23 UTC 2019. Anything received after that time might be too late.
The whole patch series can be found in one patch at:
Quoted 8 lines
https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.20.16-rc1.gzor in the git tree and branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.gitlinux-4.20.y
and the diffstat can be found below.thanks,
greg k-h
All tests passing for Tegra ...
Test results for stable-v4.20:
11 builds: 11 pass, 0 fail
22 boots: 22 pass, 0 fail
28 tests: 28 pass, 0 failLinux version: 4.20.16-rc1-gdcd2fdc
Boards tested: tegra124-jetson-tk1, tegra186-p2771-0000,
tegra194-p2972-0000, tegra20-ventana,
tegra210-p2371-2180, tegra30-cardhu-a04Cheers
Jon
Signature · 1 line
nvpublic
Greg Kroah-Hartman
maintainerQuoted 23 lines · Jon Hunter
Quoted 9 lines · Greg Kroah-Hartman
This is the start of the stable review cycle for the 4.20.16 release. There are 171 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know.
Responses should be made by Thu Mar 14 17:02:23 UTC 2019. Anything received after that time might be too late.
The whole patch series can be found in one patch at:
Quoted 8 lines
https://www.kernel.org/pub/linux/kernel/v4.x/stable-review/patch-4.20.16-rc1.gzor in the git tree and branch at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.gitlinux-4.20.y
and the diffstat can be found below.thanks,
greg k-h
All tests passing for Tegra ...
Test results for stable-v4.20:
Quoted 9 lines
11 builds: 11 pass, 0 fail 22 boots: 22 pass, 0 fail 28 tests: 28 pass, 0 failLinux version: 4.20.16-rc1-gdcd2fdc
Boards tested: tegra124-jetson-tk1, tegra186-p2771-0000,tegra194-p2972-0000, tegra20-ventana, tegra210-p2371-2180, tegra30-cardhu-a04
Thanks for testing all of these and letting me know.
greg k-h
Quoted 8 lines · Greg Kroah-Hartman
This is the start of the stable review cycle for the 4.20.16 release. There are 171 patches in this series, all will be posted as a response to this one. If anyone has any issues with these being applied, please let me know.
Responses should be made by Thu Mar 14 17:02:23 UTC 2019. Anything received after that time might be too late.
Build results:
total: 159 pass: 159 fail: 0 Qemu test results: total: 345 pass: 345 fail: 0
Guenter