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perf/list: Fix s390 counter long description for L1D_RO_EXCL_WRITES

PATCH Applied Thomas Richter 3 participants 3 messages Mar 29, 2019 – Apr 5, 2019 perf events

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Thomas Richter

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PATCH 1/1 perf/list: Fix s390 counter long description for L1D_RO_EXCL_WRITES

Command

  # ./perf list --long-desc pmu
lists the long description of the available counters. For counter
named L1D_RO_EXCL_WRITES on machine types 3906 and 3907 the long
description contains the counter number 'Counter:128 Name:'
prefix. This is wrong.

The fix changes the description text and removes this prefix.

Output before:

[root@m35lp76 perf]# ./perf list --long-desc pmu
...
L1D_ONDRAWER_L4_SOURCED_WRITES
[A directory write to the Level-1 Data cache directory where the
returned cache line was sourced from On-Drawer Level-4 cache]

L1D_RO_EXCL_WRITES
[Counter:128 Name:L1D_RO_EXCL_WRITES A directory write to the Level-1
Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line]

...

Output after:

[root@m35lp76 perf]# ./perf list --long-desc pmu
...
L1D_ONDRAWER_L4_SOURCED_WRITES
[A directory write to the Level-1 Data cache directory where the
returned cache line was sourced from On-Drawer Level-4 cache]

L1D_RO_EXCL_WRITES
[L1D_RO_EXCL_WRITES A directory write to the Level-1
Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line]

...

Fixes 109d59b900e7 ("perf vendor events s390: Add JSON files for IBM z14")
Signed-off-by Thomas Richter <[email protected]>
---
 tools/perf/pmu-events/arch/s390/cf_z14/extended.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
tools/perf/pmu-events/arch/s390/cf_z14/extended.json +1 -1
index e7a3524b748f..68618152ea2c 100644
@@ -4,7 +4,7 @@
 		"EventCode": "128",
 		"EventName": "L1D_RO_EXCL_WRITES",
 		"BriefDescription": "L1D Read-only Exclusive Writes",
-		"PublicDescription": "Counter:128	Name:L1D_RO_EXCL_WRITES A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
+		"PublicDescription": "L1D_RO_EXCL_WRITES A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
 	},
 	{
 		"Unit": "CPU-M-CF",
Signature · 1 line
2.19.1
Applied
#1 lore raw

Em Fri, Mar 29, 2019 at 02:33:37PM +0100, Thomas Richter escreveu:

Quoted 8 lines

Command

  # ./perf list --long-desc pmu
lists the long description of the available counters. For counter
named L1D_RO_EXCL_WRITES on machine types 3906 and 3907 the long
description contains the counter number 'Counter:128 Name:'
prefix. This is wrong.

The fix changes the description text and removes this prefix.

Thanks, applied.

- Arnaldo

merge bot
#2 lore raw

[tip:perf/core] perf list: Fix s390 counter long description for L1D_RO_EXCL_WRITES

In reply to Thomas Richter
perf list: Fix s390 counter long description for L1D_RO_EXCL_WRITES
Commit-ID:  7fcfa9a2d9a7c1b428d61992c2deaa9e37a437b0
Gitweb:     https://git.kernel.org/tip/7fcfa9a2d9a7c1b428d61992c2deaa9e37a437b0
Author:     Thomas Richter <[email protected]>
AuthorDate: Fri, 29 Mar 2019 14:33:37 +0100
Committer:  Arnaldo Carvalho de Melo <[email protected]>
CommitDate: Mon, 1 Apr 2019 14:49:24 -0300

perf list: Fix s390 counter long description for L1D_RO_EXCL_WRITES

Command

  # perf list --long-desc pmu

lists the long description of the available counters. For counter named L1D_RO_EXCL_WRITES on machine types 3906 and 3907 the long description contains the counter number 'Counter:128 Name:' prefix. This is wrong.

The fix changes the description text and removes this prefix.

Output before:

[root@m35lp76 perf]# ./perf list --long-desc pmu
...
L1D_ONDRAWER_L4_SOURCED_WRITES
[A directory write to the Level-1 Data cache directory where the
returned cache line was sourced from On-Drawer Level-4 cache]

L1D_RO_EXCL_WRITES
[Counter:128 Name:L1D_RO_EXCL_WRITES A directory write to the Level-1
Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line]

...

Output after:

[root@m35lp76 perf]# ./perf list --long-desc pmu
...
L1D_ONDRAWER_L4_SOURCED_WRITES
[A directory write to the Level-1 Data cache directory where the
returned cache line was sourced from On-Drawer Level-4 cache]

L1D_RO_EXCL_WRITES
[L1D_RO_EXCL_WRITES A directory write to the Level-1
Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line]

...

Signed-off-by Thomas Richter <[email protected]>
Cc Heiko Carstens <[email protected]>
Cc Hendrik Brueckner <[email protected]>
Cc Martin Schwidefsky <[email protected]>
Fixes 109d59b900e7 ("perf vendor events s390: Add JSON files for IBM z14")
Link http://lkml.kernel.org/r/[email protected] open here
Signed-off-by Arnaldo Carvalho de Melo <[email protected]>
---
 tools/perf/pmu-events/arch/s390/cf_z14/extended.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
tools/perf/pmu-events/arch/s390/cf_z14/extended.json +1 -1
index e7a3524b748f..68618152ea2c 100644
@@ -4,7 +4,7 @@
 		"EventCode": "128",
 		"EventName": "L1D_RO_EXCL_WRITES",
 		"BriefDescription": "L1D Read-only Exclusive Writes",
-		"PublicDescription": "Counter:128	Name:L1D_RO_EXCL_WRITES A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
+		"PublicDescription": "L1D_RO_EXCL_WRITES A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
 	},
 	{
 		"Unit": "CPU-M-CF",