hw/i386/pc: Do not restrict the fw_cfg functions to the PC machine

PATCH Superseded Philippe Mathieu-Daudé 2 participants 29 messages Jun 13, 2019 – Jun 21, 2019 KVM

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Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #0 lore raw

v2 cover hw/i386/pc: Do not restrict the fw_cfg functions to the PC machine

Hi,

This is my take at salvaging some NEMU good work.
Samuel worked in adding the fw_cfg device to the x86-virt NEMU machine. This series is inspired by NEMU's commit 3cb92d080835 [*] and adapted to upstream style. The result makes the upstream codebase more modularizable.
There are very little logical changes, this is mostly a cleanup refactor.

Since v1:
- Addressed Li and MST comments

$ git backport-diff -u v1
Key:
[----] : patches are identical
[####] : number of functional differences between upstream/downstream patch
[down] : patch is downstream-only
The flags [FC] indicate (F)unctional and (C)ontextual differences, respectively

001/20:[----] [-C] 'hw/i386/pc: Use unsigned type to index arrays' 002/20:[----] [-C] 'hw/i386/pc: Use size_t type to hold/return a size of array' 003/20:[----] [--] 'hw/i386/pc: Let e820_add_entry() return a ssize_t type' 004/20:[0008] [FC] 'hw/i386/pc: Add the E820Type enum type'
005/20:[----] [-C] 'hw/i386/pc: Add documentation to the e820_*() functions' 006/20:[----] [--] 'hw/i386/pc: Use e820_get_num_entries() to access e820_entries' 007/20:[0016] [FC] 'hw/i386/pc: Extract e820 memory layout code' 008/20:[----] [--] 'hw/i386/pc: Use address_space_memory in place' 009/20:[down] 'hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create' 010/20:[0009] [FC] 'hw/i386/pc: Pass the boot_cpus value by argument' 011/20:[0010] [FC] 'hw/i386/pc: Pass the apic_id_limit value by argument' 012/20:[0009] [FC] 'hw/i386/pc: Pass the CPUArchIdList array by argument' 013/20:[0008] [FC] 'hw/i386/pc: Let fw_cfg_init() use the generic MachineState' 014/20:[----] [--] 'hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument' 015/20:[----] [--] 'hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument' 016/20:[----] [--] 'hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()' 017/20:[----] [--] 'hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument' 018/20:[----] [--] 'hw/i386/pc: Let pc_build_feature_control() take a MachineState argument' 019/20:[----] [--] 'hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*' 020/20:[0132] [FC] 'hw/i386/pc: Extract the x86 generic fw_cfg code'
Do you want to view the diffs using meld? y/[n]:

Regards,

Phil.

[*] https://github.com/intel/nemu/commit/3cb92d080835ac8d47c8b713156338afa33cff5c

Philippe Mathieu-Daudé (20):
hw/i386/pc: Use unsigned type to index arrays
hw/i386/pc: Use size_t type to hold/return a size of array hw/i386/pc: Let e820_add_entry() return a ssize_t type hw/i386/pc: Add the E820Type enum type
hw/i386/pc: Add documentation to the e820_*() functions hw/i386/pc: Use e820_get_num_entries() to access e820_entries hw/i386/pc: Extract e820 memory layout code
hw/i386/pc: Use address_space_memory in place
hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create hw/i386/pc: Pass the boot_cpus value by argument hw/i386/pc: Pass the apic_id_limit value by argument hw/i386/pc: Pass the CPUArchIdList array by argument hw/i386/pc: Let fw_cfg_init() use the generic MachineState hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios() hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument hw/i386/pc: Let pc_build_feature_control() take a MachineState
argument
hw/i386/pc: Rename pc_build_feature_control() as generic

    fw_cfg_build_*

hw/i386/pc: Extract the x86 generic fw_cfg code

 hw/i386/Makefile.objs        |   2 +-
 hw/i386/e820_memory_layout.c |  60 +++++++++++
 hw/i386/e820_memory_layout.h |  76 +++++++++++++
 hw/i386/fw_cfg.c             | 137 ++++++++++++++++++++++++
 hw/i386/fw_cfg.h             |   8 ++
 hw/i386/pc.c                 | 201 ++---------------------------------
 include/hw/i386/pc.h         |  11 --
 target/i386/kvm.c            |   1 +
 8 files changed, 291 insertions(+), 205 deletions(-)
 create mode 100644 hw/i386/e820_memory_layout.c
 create mode 100644 hw/i386/e820_memory_layout.h

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #1 lore raw

PATCH v2 1/20 hw/i386/pc: Use unsigned type to index arrays

Reviewed-by Li Qiang <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c         | 5 +++--
 include/hw/i386/pc.h | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

hw/i386/pc.c +3 -2

index 2c5446b095..bb3c74f4ca 100644
@@ -874,7 +874,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
 
 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
 {
-    int index = le32_to_cpu(e820_reserve.count);
+    unsigned int index = le32_to_cpu(e820_reserve.count);
     struct e820_entry *entry;
 
     if (type != E820_RAM) {

@@ -906,7 +906,8 @@ int e820_get_num_entries(void)
     return e820_entries;
 }
 
-bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
+bool e820_get_entry(unsigned int idx, uint32_t type,
+                    uint64_t *address, uint64_t *length)
 {
     if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
         *address = le64_to_cpu(e820_table[idx].address);

include/hw/i386/pc.h +1 -1

index a7d0b87166..3b3a0d6e59 100644
@@ -291,7 +291,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 
 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 int e820_get_num_entries(void);
-bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
+bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);
 
 extern GlobalProperty pc_compat_4_0_1[];
 extern const size_t pc_compat_4_0_1_len;

Signature · 1 line

2.20.1

Michael S. Tsirkin

2019-06-20 15:27 UTC #2 lore raw

Re: [PATCH v2 01/20] hw/i386/pc: Use unsigned type to index arrays

Quoted 2 lines · Philippe Mathieu-Daudé

Reviewed-by Li Qiang <[email protected]>
Signed-off-by Philippe Mathieu-Daudé <[email protected]>

Motivation? Is this a bugfix?

Quoted 43 lines

---
 hw/i386/pc.c         | 5 +++--
 include/hw/i386/pc.h | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

hw/i386/pc.c +3 -2

index 2c5446b095..bb3c74f4ca 100644
@@ -874,7 +874,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
 
 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
 {
-    int index = le32_to_cpu(e820_reserve.count);
+    unsigned int index = le32_to_cpu(e820_reserve.count);
     struct e820_entry *entry;
 
     if (type != E820_RAM) {

@@ -906,7 +906,8 @@ int e820_get_num_entries(void)
     return e820_entries;
 }
 
-bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
+bool e820_get_entry(unsigned int idx, uint32_t type,
+                    uint64_t *address, uint64_t *length)
 {
     if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
         *address = le64_to_cpu(e820_table[idx].address);

include/hw/i386/pc.h +1 -1

index a7d0b87166..3b3a0d6e59 100644
@@ -291,7 +291,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 
 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 int e820_get_num_entries(void);
-bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
+bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);
 
 extern GlobalProperty pc_compat_4_0_1[];
 extern const size_t pc_compat_4_0_1_len;

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-21 14:45 UTC #3 lore raw

Re: [PATCH v2 01/20] hw/i386/pc: Use unsigned type to index arrays

Quoted 5 lines · Michael S. Tsirkin

Quoted 2 lines · Philippe Mathieu-Daudé
Reviewed-by Li Qiang <[email protected]>
Signed-off-by Philippe Mathieu-Daudé <[email protected]>
Motivation? Is this a bugfix?

Apparently I started to work on this series after "chardev: Convert qemu_chr_write() to take a size_t argument" [*] for which I had these extra warnings:

  --extra-cflags=-Wtype-limits\
                 -Wsign-compare\
                 -Wno-error=sign-compare

[*] https://lists.gnu.org/archive/html/qemu-devel/2019-02/msg05229.html

Quoted 22 lines

---
 hw/i386/pc.c         | 5 +++--
 include/hw/i386/pc.h | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

hw/i386/pc.c +1 -1

index 2c5446b095..bb3c74f4ca 100644
@@ -874,7 +874,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
 
 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
 {
-    int index = le32_to_cpu(e820_reserve.count);
+    unsigned int index = le32_to_cpu(e820_reserve.count);
     struct e820_entry *entry;
 
     if (type != E820_RAM) {

@@ -906,7 +906,8 @@ int e820_get_num_entries(void)
     return e820_entries;
 }

Quoted 6 lines

hw/i386/pc.c int e820_get_num_entries(void) · line 913

Quoted 6 lines

hw/i386/pc.c +2 -1

-bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
+bool e820_get_entry(unsigned int idx, uint32_t type,
+                    uint64_t *address, uint64_t *length)
 {
     if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
         *address = le64_to_cpu(e820_table[idx].address);

And here I wanted to fix:

hw/i386/pc.c:911:13: warning: comparison of integers of different signs:
'int' and 'unsigned int' [-Wsign-compare]

    if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
        ~~~ ^ ~~~~~~~~~~~~
hw/i386/pc.c:972:36: warning: comparison of integers of different signs:
'unsigned int' and 'int' [-Wsign-compare]
    for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
                                 ~ ^ ~~~~~~~~~~~~~~~~~~~~~~

Is it worthwhile?

Quoted 15 lines

include/hw/i386/pc.h +1 -1

index a7d0b87166..3b3a0d6e59 100644
@@ -291,7 +291,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 
 int e820_add_entry(uint64_t, uint64_t, uint32_t);
 int e820_get_num_entries(void);
-bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
+bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);
 
 extern GlobalProperty pc_compat_4_0_1[];
 extern const size_t pc_compat_4_0_1_len;

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #4 lore raw

PATCH v2 2/20 hw/i386/pc: Use size_t type to hold/return a size of array

In reply to Philippe Mathieu-Daudé

Reviewed-by Li Qiang <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c         | 4 ++--
 include/hw/i386/pc.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

hw/i386/pc.c +2 -2

index bb3c74f4ca..ff0f6bbbb3 100644
@@ -105,7 +105,7 @@ struct e820_table {
 
 static struct e820_table e820_reserve;
 static struct e820_entry *e820_table;
-static unsigned e820_entries;
+static size_t e820_entries;
 struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
 
 /* Physical Address of PVH entry point read from kernel ELF NOTE */

@@ -901,7 +901,7 @@ int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
     return e820_entries;
 }
 
-int e820_get_num_entries(void)
+size_t e820_get_num_entries(void)
 {
     return e820_entries;
 }

include/hw/i386/pc.h +1 -1

index 3b3a0d6e59..fc29893624 100644
@@ -290,7 +290,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 #define E820_UNUSABLE   5
 
 int e820_add_entry(uint64_t, uint64_t, uint32_t);
-int e820_get_num_entries(void);
+size_t e820_get_num_entries(void);
 bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);
 
 extern GlobalProperty pc_compat_4_0_1[];

Signature · 1 line

2.20.1

Michael S. Tsirkin

2019-06-20 15:28 UTC #5 lore raw

Re: [PATCH v2 02/20] hw/i386/pc: Use size_t type to hold/return a size of array

Quoted 2 lines · Philippe Mathieu-Daudé

Reviewed-by Li Qiang <[email protected]>
Signed-off-by Philippe Mathieu-Daudé <[email protected]>

Motivation? do you expect more than 2^31 entries?

Quoted 42 lines

---
 hw/i386/pc.c         | 4 ++--
 include/hw/i386/pc.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

hw/i386/pc.c +2 -2

index bb3c74f4ca..ff0f6bbbb3 100644
@@ -105,7 +105,7 @@ struct e820_table {
 
 static struct e820_table e820_reserve;
 static struct e820_entry *e820_table;
-static unsigned e820_entries;
+static size_t e820_entries;
 struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
 
 /* Physical Address of PVH entry point read from kernel ELF NOTE */

@@ -901,7 +901,7 @@ int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
     return e820_entries;
 }
 
-int e820_get_num_entries(void)
+size_t e820_get_num_entries(void)
 {
     return e820_entries;
 }

include/hw/i386/pc.h +1 -1

index 3b3a0d6e59..fc29893624 100644
@@ -290,7 +290,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 #define E820_UNUSABLE   5
 
 int e820_add_entry(uint64_t, uint64_t, uint32_t);
-int e820_get_num_entries(void);
+size_t e820_get_num_entries(void);
 bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);
 
 extern GlobalProperty pc_compat_4_0_1[];

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-21 14:46 UTC #6 lore raw

Re: [PATCH v2 02/20] hw/i386/pc: Use size_t type to hold/return a size of array

Quoted 5 lines · Michael S. Tsirkin

Quoted 2 lines · Philippe Mathieu-Daudé
Reviewed-by Li Qiang <[email protected]>
Signed-off-by Philippe Mathieu-Daudé <[email protected]>
Motivation? do you expect more than 2^31 entries?

Building with -Wsign-compare:

hw/i386/pc.c:973:36: warning: comparison of integers of different signs:
'unsigned int' and 'int' [-Wsign-compare]

    for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
                                 ~ ^ ~~~~~~~~~~~~~~~~~~~~~~

Quoted 42 lines

---
 hw/i386/pc.c         | 4 ++--
 include/hw/i386/pc.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

hw/i386/pc.c +2 -2

index bb3c74f4ca..ff0f6bbbb3 100644
@@ -105,7 +105,7 @@ struct e820_table {
 
 static struct e820_table e820_reserve;
 static struct e820_entry *e820_table;
-static unsigned e820_entries;
+static size_t e820_entries;
 struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
 
 /* Physical Address of PVH entry point read from kernel ELF NOTE */

@@ -901,7 +901,7 @@ int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
     return e820_entries;
 }
 
-int e820_get_num_entries(void)
+size_t e820_get_num_entries(void)
 {
     return e820_entries;
 }

include/hw/i386/pc.h +1 -1

index 3b3a0d6e59..fc29893624 100644
@@ -290,7 +290,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 #define E820_UNUSABLE   5
 
 int e820_add_entry(uint64_t, uint64_t, uint32_t);
-int e820_get_num_entries(void);
+size_t e820_get_num_entries(void);
 bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);
 
 extern GlobalProperty pc_compat_4_0_1[];

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #7 lore raw

PATCH v2 3/20 hw/i386/pc: Let e820_add_entry() return a ssize_t type

In reply to Philippe Mathieu-Daudé

e820_add_entry() returns an array size on success, or a negative value on error.

Reviewed-by Li Qiang <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c         | 2 +-
 include/hw/i386/pc.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

hw/i386/pc.c +1 -1

index ff0f6bbbb3..5a7cffbb1a 100644
@@ -872,7 +872,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
     x86_cpu_set_a20(cpu, level);
 }
 
-int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
+ssize_t e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
 {
     unsigned int index = le32_to_cpu(e820_reserve.count);
     struct e820_entry *entry;

include/hw/i386/pc.h +1 -1

index fc29893624..c56116e6f6 100644
@@ -289,7 +289,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 #define E820_NVS        4
 #define E820_UNUSABLE   5
 
-int e820_add_entry(uint64_t, uint64_t, uint32_t);
+ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t);
 size_t e820_get_num_entries(void);
 bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);

Signature · 1 line

2.20.1

Michael S. Tsirkin

2019-06-20 15:29 UTC #8 lore raw

Re: [PATCH v2 03/20] hw/i386/pc: Let e820_add_entry() return a ssize_t type

Quoted 2 lines · Philippe Mathieu-Daudé

e820_add_entry() returns an array size on success, or a negative value on error.

So what's wrong with int? Does it overflow somehow?

Quoted 36 lines

Reviewed-by Li Qiang <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c         | 2 +-
 include/hw/i386/pc.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

hw/i386/pc.c +1 -1

index ff0f6bbbb3..5a7cffbb1a 100644
@@ -872,7 +872,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
     x86_cpu_set_a20(cpu, level);
 }
 
-int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
+ssize_t e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
 {
     unsigned int index = le32_to_cpu(e820_reserve.count);
     struct e820_entry *entry;

include/hw/i386/pc.h +1 -1

index fc29893624..c56116e6f6 100644
@@ -289,7 +289,7 @@ void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 #define E820_NVS        4
 #define E820_UNUSABLE   5
 
-int e820_add_entry(uint64_t, uint64_t, uint32_t);
+ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t);
 size_t e820_get_num_entries(void);
 bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #9 lore raw

PATCH v2 4/20 hw/i386/pc: Add the E820Type enum type

In reply to Philippe Mathieu-Daudé

This ensure we won't use an incorrect value.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
v2: Do not cast the enum (Li)

---
 hw/i386/pc.c         |  4 ++--
 include/hw/i386/pc.h | 16 ++++++++++------
 2 files changed, 12 insertions(+), 8 deletions(-)

hw/i386/pc.c +2 -2

index 5a7cffbb1a..86ba554439 100644
@@ -872,7 +872,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
     x86_cpu_set_a20(cpu, level);
 }
 
-ssize_t e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
+ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type)
 {
     unsigned int index = le32_to_cpu(e820_reserve.count);
     struct e820_entry *entry;

@@ -906,7 +906,7 @@ size_t e820_get_num_entries(void)
     return e820_entries;
 }
 
-bool e820_get_entry(unsigned int idx, uint32_t type,
+bool e820_get_entry(unsigned int idx, E820Type type,
                     uint64_t *address, uint64_t *length)
 {
     if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {

include/hw/i386/pc.h +10 -6

index c56116e6f6..7c07185dd5 100644
@@ -282,12 +282,16 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
                        const CPUArchIdList *apic_ids, GArray *entry);
 
-/* e820 types */
-#define E820_RAM        1
-#define E820_RESERVED   2
-#define E820_ACPI       3
-#define E820_NVS        4
-#define E820_UNUSABLE   5
+/**
+ * E820Type: Type of the e820 address range.
+ */
+typedef enum {
+    E820_RAM        = 1,
+    E820_RESERVED   = 2,
+    E820_ACPI       = 3,
+    E820_NVS        = 4,
+    E820_UNUSABLE   = 5
+} E820Type;
 
 ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t);
 size_t e820_get_num_entries(void);

Signature · 1 line

2.20.1

Michael S. Tsirkin

2019-06-20 15:31 UTC #10 lore raw

Re: [PATCH v2 04/20] hw/i386/pc: Add the E820Type enum type

Quoted 3 lines · Philippe Mathieu-Daudé

This ensure we won't use an incorrect value.
Signed-off-by Philippe Mathieu-Daudé <[email protected]>

It doesn't actually ensure anything: compiler does not check IIUC.

And OTOH it's stored in type field in struct e820_entry.

Quoted 58 lines

---
v2: Do not cast the enum (Li)

---
 hw/i386/pc.c         |  4 ++--
 include/hw/i386/pc.h | 16 ++++++++++------
 2 files changed, 12 insertions(+), 8 deletions(-)

hw/i386/pc.c +2 -2

index 5a7cffbb1a..86ba554439 100644
@@ -872,7 +872,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
     x86_cpu_set_a20(cpu, level);
 }
 
-ssize_t e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
+ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type)
 {
     unsigned int index = le32_to_cpu(e820_reserve.count);
     struct e820_entry *entry;

@@ -906,7 +906,7 @@ size_t e820_get_num_entries(void)
     return e820_entries;
 }
 
-bool e820_get_entry(unsigned int idx, uint32_t type,
+bool e820_get_entry(unsigned int idx, E820Type type,
                     uint64_t *address, uint64_t *length)
 {
     if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {

include/hw/i386/pc.h +10 -6

index c56116e6f6..7c07185dd5 100644
@@ -282,12 +282,16 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
                        const CPUArchIdList *apic_ids, GArray *entry);
 
-/* e820 types */
-#define E820_RAM        1
-#define E820_RESERVED   2
-#define E820_ACPI       3
-#define E820_NVS        4
-#define E820_UNUSABLE   5
+/**
+ * E820Type: Type of the e820 address range.
+ */
+typedef enum {
+    E820_RAM        = 1,
+    E820_RESERVED   = 2,
+    E820_ACPI       = 3,
+    E820_NVS        = 4,
+    E820_UNUSABLE   = 5
+} E820Type;
 
 ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t);
 size_t e820_get_num_entries(void);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-21 14:48 UTC #11 lore raw

Re: [PATCH v2 04/20] hw/i386/pc: Add the E820Type enum type

Quoted 8 lines · Michael S. Tsirkin

Quoted 3 lines · Philippe Mathieu-Daudé
This ensure we won't use an incorrect value.
Signed-off-by Philippe Mathieu-Daudé <[email protected]>
It doesn't actually ensure anything: compiler does not check IIUC.
And OTOH it's stored in type field in struct e820_entry.

I totally missed that... Thanks!

Quoted 58 lines

---
v2: Do not cast the enum (Li)

---
 hw/i386/pc.c         |  4 ++--
 include/hw/i386/pc.h | 16 ++++++++++------
 2 files changed, 12 insertions(+), 8 deletions(-)

hw/i386/pc.c +2 -2

index 5a7cffbb1a..86ba554439 100644
@@ -872,7 +872,7 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
     x86_cpu_set_a20(cpu, level);
 }
 
-ssize_t e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
+ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type)
 {
     unsigned int index = le32_to_cpu(e820_reserve.count);
     struct e820_entry *entry;

@@ -906,7 +906,7 @@ size_t e820_get_num_entries(void)
     return e820_entries;
 }
 
-bool e820_get_entry(unsigned int idx, uint32_t type,
+bool e820_get_entry(unsigned int idx, E820Type type,
                     uint64_t *address, uint64_t *length)
 {
     if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {

include/hw/i386/pc.h +10 -6

index c56116e6f6..7c07185dd5 100644
@@ -282,12 +282,16 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
                        const CPUArchIdList *apic_ids, GArray *entry);
 
-/* e820 types */
-#define E820_RAM        1
-#define E820_RESERVED   2
-#define E820_ACPI       3
-#define E820_NVS        4
-#define E820_UNUSABLE   5
+/**
+ * E820Type: Type of the e820 address range.
+ */
+typedef enum {
+    E820_RAM        = 1,
+    E820_RESERVED   = 2,
+    E820_ACPI       = 3,
+    E820_NVS        = 4,
+    E820_UNUSABLE   = 5
+} E820Type;
 
 ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t);
 size_t e820_get_num_entries(void);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #12 lore raw

PATCH v2 5/20 hw/i386/pc: Add documentation to the e820_*() functions

In reply to Philippe Mathieu-Daudé

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 include/hw/i386/pc.h | 37 +++++++++++++++++++++++++++++++++++--
 1 file changed, 35 insertions(+), 2 deletions(-)

include/hw/i386/pc.h +35 -2

index 7c07185dd5..fc66b61ff8 100644
@@ -293,9 +293,42 @@ typedef enum {
     E820_UNUSABLE   = 5
 } E820Type;
 
-ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t);
+/**
+ * e820_add_entry: Add an #e820_entry to the @e820_table.
+ *
+ * Returns the number of entries of the e820_table on success,
+ *         or a negative errno otherwise.
+ *
+ * @address: The base address of the structure which the BIOS is to fill in.
+ * @length: The length in bytes of the structure passed to the BIOS.
+ * @type: The #E820Type of the address range.
+ */
+ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type);
+
+/**
+ * e820_get_num_entries: The number of entries of the @e820_table.
+ *
+ * Returns the number of entries of the e820_table.
+ */
 size_t e820_get_num_entries(void);
-bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);
+
+/**
+ * e820_get_entry: Get the address/length of an #e820_entry.
+ *
+ * If the #e820_entry stored at @index is of #E820Type @type, fills @address
+ * and @length with the #e820_entry values and return @true.
+ * Return @false otherwise.
+ *
+ * @index: The index of the #e820_entry to get values.
+ * @type: The @E820Type of the address range expected.
+ * @address: Pointer to the base address of the #e820_entry structure to
+ *           be filled.
+ * @length: Pointer to the length (in bytes) of the #e820_entry structure
+ *          to be filled.
+ * @return: true if the entry was found, false otherwise.
+ */
+bool e820_get_entry(unsigned int index, E820Type type,
+                    uint64_t *address, uint64_t *length);
 
 extern GlobalProperty pc_compat_4_0_1[];
 extern const size_t pc_compat_4_0_1_len;

Signature · 1 line

2.20.1

Michael S. Tsirkin

2019-06-20 15:36 UTC #13 lore raw

Re: [PATCH v2 05/20] hw/i386/pc: Add documentation to the e820_*() functions

Quoted 38 lines · Philippe Mathieu-Daudé

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 include/hw/i386/pc.h | 37 +++++++++++++++++++++++++++++++++++--
 1 file changed, 35 insertions(+), 2 deletions(-)

include/hw/i386/pc.h +22 -2

index 7c07185dd5..fc66b61ff8 100644
@@ -293,9 +293,42 @@ typedef enum {
     E820_UNUSABLE   = 5
 } E820Type;
 
-ssize_t e820_add_entry(uint64_t, uint64_t, uint32_t);
+/**
+ * e820_add_entry: Add an #e820_entry to the @e820_table.
+ *
+ * Returns the number of entries of the e820_table on success,
+ *         or a negative errno otherwise.
+ *
+ * @address: The base address of the structure which the BIOS is to fill in.
+ * @length: The length in bytes of the structure passed to the BIOS.
+ * @type: The #E820Type of the address range.
+ */
+ssize_t e820_add_entry(uint64_t address, uint64_t length, E820Type type);
+
+/**
+ * e820_get_num_entries: The number of entries of the @e820_table.
+ *
+ * Returns the number of entries of the e820_table.
+ */
 size_t e820_get_num_entries(void);
-bool e820_get_entry(unsigned int, uint32_t, uint64_t *, uint64_t *);
+
+/**
+ * e820_get_entry: Get the address/length of an #e820_entry.
+ *
+ * If the #e820_entry stored at @index is of #E820Type @type, fills @address

include/hw/i386/pc.h typedef enum { · line 328

Quoted 10 lines

include/hw/i386/pc.h +10 -0

+ * and @length with the #e820_entry values and return @true.
+ * Return @false otherwise.
+ *
+ * @index: The index of the #e820_entry to get values.
+ * @type: The @E820Type of the address range expected.
+ * @address: Pointer to the base address of the #e820_entry structure to
+ *           be filled.
+ * @length: Pointer to the length (in bytes) of the #e820_entry structure
+ *          to be filled.
+ * @return: true if the entry was found, false otherwise.

I don't actually care whether it's @E820Type, #E820Type or just type, we should be consistent. I also find this style of documentation underwhelming. what is to be filled? length or the structure? upper case after : also looks somewhat wrong.

Same applies to other comments too.

Quoted 8 lines

include/hw/i386/pc.h +3 -0

+ */
+bool e820_get_entry(unsigned int index, E820Type type,
+                    uint64_t *address, uint64_t *length);
 
 extern GlobalProperty pc_compat_4_0_1[];
 extern const size_t pc_compat_4_0_1_len;

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #14 lore raw

PATCH v2 6/20 hw/i386/pc: Use e820_get_num_entries() to access e820_entries

In reply to Philippe Mathieu-Daudé

To be able to extract the e820* code out of this file (in the next patch), access e820_entries with its correct helper.

Reviewed-by Li Qiang <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

hw/i386/pc.c +1 -1

index 86ba554439..d9589eb771 100644
@@ -1024,7 +1024,7 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
     fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
                      &e820_reserve, sizeof(e820_reserve));
     fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
-                    sizeof(struct e820_entry) * e820_entries);
+                    sizeof(struct e820_entry) * e820_get_num_entries());
 
     fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
     /* allocate memory for the NUMA channel: one (64bit) word for the number

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #15 lore raw

PATCH v2 7/20 hw/i386/pc: Extract e820 memory layout code

In reply to Philippe Mathieu-Daudé

Reviewed-by Li Qiang <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/Makefile.objs        |  2 +-
 hw/i386/e820_memory_layout.c | 60 ++++++++++++++++++++++++++++
 hw/i386/e820_memory_layout.h | 76 ++++++++++++++++++++++++++++++++++++
 hw/i386/pc.c                 | 62 +----------------------------
 include/hw/i386/pc.h         | 48 -----------------------
 target/i386/kvm.c            |  1 +
 6 files changed, 139 insertions(+), 110 deletions(-)
 create mode 100644 hw/i386/e820_memory_layout.c
 create mode 100644 hw/i386/e820_memory_layout.h

hw/i386/Makefile.objs +1 -1

index 5d9c9efd5f..d3374e0831 100644
@@ -1,5 +1,5 @@
 obj-$(CONFIG_KVM) += kvm/
-obj-y += multiboot.o
+obj-y += e820_memory_layout.o multiboot.o
 obj-y += pc.o
 obj-$(CONFIG_I440FX) += pc_piix.o
 obj-$(CONFIG_Q35) += pc_q35.o

hw/i386/e820_memory_layout.c new file +60 -0

60 lines not on this page · raw message

hw/i386/e820_memory_layout.h new file +76 -0

76 lines not on this page · raw message

hw/i386/pc.c +1 ~~-61~~

80 lines not on this page · raw message

include/hw/i386/pc.h +0 ~~-48~~

54 lines not on this page · raw message

target/i386/kvm.c +1 -0

index 6899061b4e..73964fc63c 100644
@@ -38,6 +38,7 @@
 #include "hw/i386/apic-msidef.h"
 #include "hw/i386/intel_iommu.h"
 #include "hw/i386/x86-iommu.h"
+#include "hw/i386/e820_memory_layout.h"
 
 #include "hw/pci/pci.h"
 #include "hw/pci/msi.h"

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #16 lore raw

PATCH v2 8/20 hw/i386/pc: Use address_space_memory in place

In reply to Philippe Mathieu-Daudé

The address_space_memory variable is used once. Use it in place and remove the argument.

Reviewed-by Li Qiang <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

hw/i386/pc.c +4 -3

index c5c96a2e10..acde575ced 100644
@@ -932,7 +932,7 @@ static void pc_build_smbios(PCMachineState *pcms)
     }
 }
 
-static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
+static FWCfgState *bochs_bios_init(PCMachineState *pcms)
 {
     FWCfgState *fw_cfg;
     uint64_t *numa_fw_cfg;

@@ -940,7 +940,8 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
     const CPUArchIdList *cpus;
     MachineClass *mc = MACHINE_GET_CLASS(pcms);
 
-    fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, as);
+    fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
+                                &address_space_memory);
     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
 
     /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:

@@ -1765,7 +1766,7 @@ void pc_memory_init(PCMachineState *pcms,
                                         option_rom_mr,
                                         1);
 
-    fw_cfg = bochs_bios_init(&address_space_memory, pcms);
+    fw_cfg = bochs_bios_init(pcms);
 
     rom_set_fw(fw_cfg);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #17 lore raw

PATCH v2 9/20 hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create

In reply to Philippe Mathieu-Daudé

The bochs_bios_init() function is not restricted to the Bochs BIOS and is useful to other BIOS.
Since it is not specific to the PC machine, and can be reused by other machines of the X86 architecture, rename it as fw_cfg_arch_create().

Reviewed-by Li Qiang <[email protected]>

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
v2: Rename x86_create_fw_cfg() -> fw_cfg_arch_create() (MST)

---
 hw/i386/pc.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

hw/i386/pc.c +3 -3

index acde575ced..75fb1a154a 100644
@@ -932,7 +932,7 @@ static void pc_build_smbios(PCMachineState *pcms)
     }
 }
 
-static FWCfgState *bochs_bios_init(PCMachineState *pcms)
+static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
 {
     FWCfgState *fw_cfg;
     uint64_t *numa_fw_cfg;

@@ -1512,7 +1512,7 @@ void pc_cpus_init(PCMachineState *pcms)
      * Limit for the APIC ID value, so that all
      * CPU APIC IDs are < pcms->apic_id_limit.
      *
-     * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
+     * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
      */
     pcms->apic_id_limit = x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
     possible_cpus = mc->possible_cpu_arch_ids(ms);

@@ -1766,7 +1766,7 @@ void pc_memory_init(PCMachineState *pcms,
                                         option_rom_mr,
                                         1);
 
-    fw_cfg = bochs_bios_init(pcms);
+    fw_cfg = fw_cfg_arch_create(pcms);
 
     rom_set_fw(fw_cfg);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #18 lore raw

PATCH v2 10/20 hw/i386/pc: Pass the boot_cpus value by argument

In reply to Philippe Mathieu-Daudé

The boot_cpus is used once. Pass it by argument, this will allow us to remove the PCMachineState argument later.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

hw/i386/pc.c +4 -3

index 75fb1a154a..4c5a968143 100644
@@ -932,7 +932,8 @@ static void pc_build_smbios(PCMachineState *pcms)
     }
 }
 
-static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
+static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+                                      uint16_t boot_cpus)
 {
     FWCfgState *fw_cfg;
     uint64_t *numa_fw_cfg;

@@ -942,7 +943,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
 
     fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
                                 &address_space_memory);
-    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
 
     /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
      *

@@ -1766,7 +1767,7 @@ void pc_memory_init(PCMachineState *pcms,
                                         option_rom_mr,
                                         1);
 
-    fw_cfg = fw_cfg_arch_create(pcms);
+    fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus);
 
     rom_set_fw(fw_cfg);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #19 lore raw

PATCH v2 11/20 hw/i386/pc: Pass the apic_id_limit value by argument

In reply to Philippe Mathieu-Daudé

Pass the apic_id_limit value by argument, this will allow us to remove the PCMachineState argument later.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

hw/i386/pc.c +3 -2

index 4c5a968143..7f5215965e 100644
@@ -933,7 +933,8 @@ static void pc_build_smbios(PCMachineState *pcms)
 }
 
 static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
-                                      uint16_t boot_cpus)
+                                      uint16_t boot_cpus,
+                                      uint16_t apic_id_limit)
 {
     FWCfgState *fw_cfg;
     uint64_t *numa_fw_cfg;

@@ -1767,7 +1768,7 @@ void pc_memory_init(PCMachineState *pcms,
                                         option_rom_mr,
                                         1);
 
-    fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus);
+    fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_limit);
 
     rom_set_fw(fw_cfg);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #20 lore raw

PATCH v2 12/20 hw/i386/pc: Pass the CPUArchIdList array by argument

In reply to Philippe Mathieu-Daudé

Pass the CPUArchIdList array by argument, this will allow us to remove the PCMachineState argument later.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

hw/i386/pc.c +8 -9

index 7f5215965e..266cdf19b5 100644
@@ -933,14 +933,13 @@ static void pc_build_smbios(PCMachineState *pcms)
 }
 
 static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+                                      const CPUArchIdList *cpus,
                                       uint16_t boot_cpus,
                                       uint16_t apic_id_limit)
 {
     FWCfgState *fw_cfg;
     uint64_t *numa_fw_cfg;
     int i;
-    const CPUArchIdList *cpus;
-    MachineClass *mc = MACHINE_GET_CLASS(pcms);
 
     fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
                                 &address_space_memory);

@@ -958,7 +957,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
      * So for compatibility reasons with old BIOSes we are stuck with
      * "etc/max-cpus" actually being apic_id_limit
      */
-    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)pcms->apic_id_limit);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
     fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
                      acpi_tables, acpi_tables_len);

@@ -974,20 +973,19 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
      * of nodes, one word for each VCPU->node and one word for each node to
      * hold the amount of memory.
      */
-    numa_fw_cfg = g_new0(uint64_t, 1 + pcms->apic_id_limit + nb_numa_nodes);
+    numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
     numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
-    cpus = mc->possible_cpu_arch_ids(MACHINE(pcms));
     for (i = 0; i < cpus->len; i++) {
         unsigned int apic_id = cpus->cpus[i].arch_id;
-        assert(apic_id < pcms->apic_id_limit);
+        assert(apic_id < apic_id_limit);
         numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
     }
     for (i = 0; i < nb_numa_nodes; i++) {
-        numa_fw_cfg[pcms->apic_id_limit + 1 + i] =
+        numa_fw_cfg[apic_id_limit + 1 + i] =
             cpu_to_le64(numa_info[i].node_mem);
     }
     fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
-                     (1 + pcms->apic_id_limit + nb_numa_nodes) *
+                     (1 + apic_id_limit + nb_numa_nodes) *
                      sizeof(*numa_fw_cfg));
 
     return fw_cfg;

@@ -1768,7 +1766,8 @@ void pc_memory_init(PCMachineState *pcms,
                                         option_rom_mr,
                                         1);
 
-    fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_limit);
+    fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
+                                pcms->boot_cpus, pcms->apic_id_limit);
 
     rom_set_fw(fw_cfg);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #21 lore raw

PATCH v2 13/20 hw/i386/pc: Let fw_cfg_init() use the generic MachineState

In reply to Philippe Mathieu-Daudé

We removed the PCMachineState access, we can now let the fw_cfg_init() function to take a generic MachineState object.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

hw/i386/pc.c +3 -2

index 266cdf19b5..08df4f9895 100644
@@ -932,7 +932,7 @@ static void pc_build_smbios(PCMachineState *pcms)
     }
 }
 
-static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+static FWCfgState *fw_cfg_arch_create(MachineState *ms,
                                       const CPUArchIdList *cpus,
                                       uint16_t boot_cpus,
                                       uint16_t apic_id_limit)

@@ -1670,6 +1670,7 @@ void pc_memory_init(PCMachineState *pcms,
     MemoryRegion *ram_below_4g, *ram_above_4g;
     FWCfgState *fw_cfg;
     MachineState *machine = MACHINE(pcms);
+    MachineClass *mc = MACHINE_GET_CLASS(machine);
     PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
 
     assert(machine->ram_size == pcms->below_4g_mem_size +

@@ -1766,7 +1767,7 @@ void pc_memory_init(PCMachineState *pcms,
                                         option_rom_mr,
                                         1);
 
-    fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
+    fw_cfg = fw_cfg_arch_create(machine, mc->possible_cpu_arch_ids(machine),
                                 pcms->boot_cpus, pcms->apic_id_limit);
 
     rom_set_fw(fw_cfg);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #22 lore raw

PATCH v2 14/20 hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument

In reply to Philippe Mathieu-Daudé

Pass the FWCfgState object by argument, this will allow us to remove the PCMachineState argument later.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

hw/i386/pc.c +5 -5

index 08df4f9895..c08869b52c 100644
@@ -890,7 +890,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
     }
 }
 
-static void pc_build_smbios(PCMachineState *pcms)
+static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg)
 {
     uint8_t *smbios_tables, *smbios_anchor;
     size_t smbios_tables_len, smbios_anchor_len;

@@ -904,7 +904,7 @@ static void pc_build_smbios(PCMachineState *pcms)
 
     smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
     if (smbios_tables) {
-        fw_cfg_add_bytes(pcms->fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+        fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
                          smbios_tables, smbios_tables_len);
     }

@@ -925,9 +925,9 @@ static void pc_build_smbios(PCMachineState *pcms)
     g_free(mem_array);
 
     if (smbios_anchor) {
-        fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-tables",
+        fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
                         smbios_tables, smbios_tables_len);
-        fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-anchor",
+        fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
                         smbios_anchor, smbios_anchor_len);
     }
 }

@@ -1593,7 +1593,7 @@ void pc_machine_done(Notifier *notifier, void *data)
 
     acpi_setup();
     if (pcms->fw_cfg) {
-        pc_build_smbios(pcms);
+        pc_build_smbios(pcms, pcms->fw_cfg);
         pc_build_feature_control_file(pcms);
         /* update FW_CFG_NB_CPUS to account for -device added CPUs */
         fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #23 lore raw

PATCH v2 15/20 hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument

In reply to Philippe Mathieu-Daudé

Let the pc_build_smbios() function take a generic MachineState argument.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

hw/i386/pc.c +2 -3

index c08869b52c..d3de03e5e3 100644
@@ -890,13 +890,12 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
     }
 }
 
-static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg)
+static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
 {
     uint8_t *smbios_tables, *smbios_anchor;
     size_t smbios_tables_len, smbios_anchor_len;
     struct smbios_phys_mem_area *mem_array;
     unsigned i, array_count;
-    MachineState *ms = MACHINE(pcms);
     X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
 
     /* tell smbios about cpuid version and features */

@@ -1593,7 +1592,7 @@ void pc_machine_done(Notifier *notifier, void *data)
 
     acpi_setup();
     if (pcms->fw_cfg) {
-        pc_build_smbios(pcms, pcms->fw_cfg);
+        pc_build_smbios(MACHINE(pcms), pcms->fw_cfg);
         pc_build_feature_control_file(pcms);
         /* update FW_CFG_NB_CPUS to account for -device added CPUs */
         fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #24 lore raw

PATCH v2 16/20 hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()

In reply to Philippe Mathieu-Daudé

Now that the pc_build_smbios() function has been refactored to not depend of PC specific types, rename it to a more generic name.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

hw/i386/pc.c +2 -2

index d3de03e5e3..e70c02441b 100644
@@ -890,7 +890,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
     }
 }
 
-static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
+static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
 {
     uint8_t *smbios_tables, *smbios_anchor;
     size_t smbios_tables_len, smbios_anchor_len;

@@ -1592,7 +1592,7 @@ void pc_machine_done(Notifier *notifier, void *data)
 
     acpi_setup();
     if (pcms->fw_cfg) {
-        pc_build_smbios(MACHINE(pcms), pcms->fw_cfg);
+        fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
         pc_build_feature_control_file(pcms);
         /* update FW_CFG_NB_CPUS to account for -device added CPUs */
         fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #25 lore raw

PATCH v2 17/20 hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument

In reply to Philippe Mathieu-Daudé

Pass the FWCfgState object by argument, this will allow us to remove the PCMachineState argument later.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

hw/i386/pc.c +4 -3

index e70c02441b..39155a14d9 100644
@@ -1521,7 +1521,8 @@ void pc_cpus_init(PCMachineState *pcms)
     }
 }
 
-static void pc_build_feature_control_file(PCMachineState *pcms)
+static void pc_build_feature_control_file(PCMachineState *pcms,
+                                          FWCfgState *fw_cfg)
 {
     MachineState *ms = MACHINE(pcms);
     X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);

@@ -1547,7 +1548,7 @@ static void pc_build_feature_control_file(PCMachineState *pcms)
 
     val = g_malloc(sizeof(*val));
     *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
-    fw_cfg_add_file(pcms->fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
+    fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
 }
 
 static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count)

@@ -1593,7 +1594,7 @@ void pc_machine_done(Notifier *notifier, void *data)
     acpi_setup();
     if (pcms->fw_cfg) {
         fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
-        pc_build_feature_control_file(pcms);
+        pc_build_feature_control_file(pcms, pcms->fw_cfg);
         /* update FW_CFG_NB_CPUS to account for -device added CPUs */
         fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
     }

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #26 lore raw

PATCH v2 18/20 hw/i386/pc: Let pc_build_feature_control() take a MachineState argument

In reply to Philippe Mathieu-Daudé

Let the pc_build_feature_control_file() function take a generic MachineState argument.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

hw/i386/pc.c +2 -3

index 39155a14d9..0969efa87d 100644
@@ -1521,10 +1521,9 @@ void pc_cpus_init(PCMachineState *pcms)
     }
 }
 
-static void pc_build_feature_control_file(PCMachineState *pcms,
+static void pc_build_feature_control_file(MachineState *ms,
                                           FWCfgState *fw_cfg)
 {
-    MachineState *ms = MACHINE(pcms);
     X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
     CPUX86State *env = &cpu->env;
     uint32_t unused, ecx, edx;

@@ -1594,7 +1593,7 @@ void pc_machine_done(Notifier *notifier, void *data)
     acpi_setup();
     if (pcms->fw_cfg) {
         fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
-        pc_build_feature_control_file(pcms, pcms->fw_cfg);
+        pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg);
         /* update FW_CFG_NB_CPUS to account for -device added CPUs */
         fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
     }

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #27 lore raw

PATCH v2 19/20 hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*

In reply to Philippe Mathieu-Daudé

Now that the pc_build_feature_control_file() function has been refactored to not depend of PC specific types, rename it to a more generic name.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/pc.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

hw/i386/pc.c +3 -3

index 0969efa87d..d96328d8db 100644
@@ -1521,8 +1521,8 @@ void pc_cpus_init(PCMachineState *pcms)
     }
 }
 
-static void pc_build_feature_control_file(MachineState *ms,
-                                          FWCfgState *fw_cfg)
+static void fw_cfg_build_feature_control(MachineState *ms,
+                                         FWCfgState *fw_cfg)
 {
     X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
     CPUX86State *env = &cpu->env;

@@ -1593,7 +1593,7 @@ void pc_machine_done(Notifier *notifier, void *data)
     acpi_setup();
     if (pcms->fw_cfg) {
         fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
-        pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg);
+        fw_cfg_build_feature_control(MACHINE(pcms), pcms->fw_cfg);
         /* update FW_CFG_NB_CPUS to account for -device added CPUs */
         fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
     }

Signature · 1 line

2.20.1

Philippe Mathieu-Daudé

author

2019-06-13 15:01 UTC #28 lore raw

PATCH v2 20/20 hw/i386/pc: Extract the x86 generic fw_cfg code

In reply to Philippe Mathieu-Daudé

Extract all the functions that are not PC-machine specific into the (arch-specific) fw_cfg.c file. This will allow other X86-machine to reuse these functions.

Signed-off-by Philippe Mathieu-Daudé <[email protected]>

---
 hw/i386/fw_cfg.c | 137 +++++++++++++++++++++++++++++++++++++++++++++++
 hw/i386/fw_cfg.h |   8 +++
 hw/i386/pc.c     | 130 +-------------------------------------------
 3 files changed, 146 insertions(+), 129 deletions(-)

hw/i386/fw_cfg.c +137 -0

index 380a819230..b033d99bc4 100644
@@ -13,8 +13,15 @@
  */
 
 #include "qemu/osdep.h"
+#include "sysemu/numa.h"
+#include "hw/acpi/acpi.h"
+#include "hw/firmware/smbios.h"
+#include "hw/i386/pc.h"
 #include "hw/i386/fw_cfg.h"
+#include "hw/timer/hpet.h"
 #include "hw/nvram/fw_cfg.h"
+#include "e820_memory_layout.h"
+#include "kvm_i386.h"
 
 const char *fw_cfg_arch_key_name(uint16_t key)
 {

@@ -36,3 +43,133 @@ const char *fw_cfg_arch_key_name(uint16_t key)
     }
     return NULL;
 }
+
+FWCfgState *fw_cfg_arch_create(MachineState *ms,
+                               const CPUArchIdList *cpus,
+                               uint16_t boot_cpus,
+                               uint16_t apic_id_limit)
+{
+    FWCfgState *fw_cfg;
+    uint64_t *numa_fw_cfg;
+    int i;
+
+    fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
+                                &address_space_memory);
+    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
+
+    /*
+     * FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
+     *
+     * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for
+     * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table,
+     * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface
+     * for CPU hotplug also uses APIC ID and not "CPU index".
+     * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs",
+     * but the "limit to the APIC ID values SeaBIOS may see".
+     *
+     * So for compatibility reasons with old BIOSes we are stuck with
+     * "etc/max-cpus" actually being apic_id_limit
+     */
+    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
+    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+    fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
+                     acpi_tables, acpi_tables_len);
+    fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
+
+    fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
+                     &e820_reserve, sizeof(e820_reserve));
+    fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
+                    sizeof(struct e820_entry) * e820_get_num_entries());
+
+    fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
+    /*
+     * allocate memory for the NUMA channel: one (64bit) word for the number
+     * of nodes, one word for each VCPU->node and one word for each node to
+     * hold the amount of memory.
+     */
+    numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
+    numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
+    for (i = 0; i < cpus->len; i++) {
+        unsigned int apic_id = cpus->cpus[i].arch_id;
+        assert(apic_id < apic_id_limit);
+        numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
+    }
+    for (i = 0; i < nb_numa_nodes; i++) {
+        numa_fw_cfg[apic_id_limit + 1 + i] =
+            cpu_to_le64(numa_info[i].node_mem);
+    }
+    fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
+                     (1 + apic_id_limit + nb_numa_nodes) *
+                     sizeof(*numa_fw_cfg));
+
+    return fw_cfg;
+}
+
+void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
+{
+    uint8_t *smbios_tables, *smbios_anchor;
+    size_t smbios_tables_len, smbios_anchor_len;
+    struct smbios_phys_mem_area *mem_array;
+    unsigned i, array_count;
+    X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
+
+    /* tell smbios about cpuid version and features */
+    smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
+
+    smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
+    if (smbios_tables) {
+        fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+                         smbios_tables, smbios_tables_len);
+    }
+
+    /* build the array of physical mem area from e820 table */
+    mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries());
+    for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
+        uint64_t addr, len;
+
+        if (e820_get_entry(i, E820_RAM, &addr, &len)) {
+            mem_array[array_count].address = addr;
+            mem_array[array_count].length = len;
+            array_count++;
+        }
+    }
+    smbios_get_tables(mem_array, array_count,
+                      &smbios_tables, &smbios_tables_len,
+                      &smbios_anchor, &smbios_anchor_len);
+    g_free(mem_array);
+
+    if (smbios_anchor) {
+        fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
+                        smbios_tables, smbios_tables_len);
+        fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
+                        smbios_anchor, smbios_anchor_len);
+    }
+}
+
+void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg)
+{
+    X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
+    CPUX86State *env = &cpu->env;
+    uint32_t unused, ecx, edx;
+    uint64_t feature_control_bits = 0;
+    uint64_t *val;
+
+    cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
+    if (ecx & CPUID_EXT_VMX) {
+        feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
+    }
+
+    if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
+        (CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
+        (env->mcg_cap & MCG_LMCE_P)) {
+        feature_control_bits |= FEATURE_CONTROL_LMCE;
+    }
+
+    if (!feature_control_bits) {
+        return;
+    }
+
+    val = g_malloc(sizeof(*val));
+    *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
+    fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
+}

hw/i386/fw_cfg.h +8 -0

index 17a4bc32f2..f9047a74e8 100644
@@ -9,6 +9,7 @@
 #ifndef HW_I386_FW_CFG_H
 #define HW_I386_FW_CFG_H
 
+#include "hw/boards.h"
 #include "hw/nvram/fw_cfg.h"
 
 #define FW_CFG_ACPI_TABLES      (FW_CFG_ARCH_LOCAL + 0)

@@ -17,4 +18,11 @@
 #define FW_CFG_E820_TABLE       (FW_CFG_ARCH_LOCAL + 3)
 #define FW_CFG_HPET             (FW_CFG_ARCH_LOCAL + 4)
 
+FWCfgState *fw_cfg_arch_create(MachineState *ms,
+                               const CPUArchIdList *cpus,
+                               uint16_t boot_cpus,
+                               uint16_t apic_id_limit);
+void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg);
+void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg);
+
 #endif

hw/i386/pc.c +1 ~~-129~~

148 lines not on this page · raw message

Signature · 1 line

2.20.1