Tegra30+ CPU suspend-resume bug-fixes
Subsystems (3)
v2 cover Tegra30+ CPU suspend-resume bug-fixes
Hello,
This small series addresses two suspend-resume bugs: one affects Tegra30+ due to a typo in the code, other fixes CPU hang on Tegra30 specifically.
Changelog:
v2: Reworded comment to the code to make it sound better in the patch
"Use WFE for power-gating on Tegra30".
Dmitry Osipenko (2):
ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
ARM: tegra: Use WFE for power-gating on Tegra30
arch/arm/mach-tegra/reset-handler.S | 6 +++--- arch/arm/mach-tegra/sleep-tegra30.S | 4 +++- drivers/soc/tegra/flowctrl.c | 19 +++++++++++++++++-- 3 files changed, 23 insertions(+), 6 deletions(-)
Signature · 1 line
2.22.0
PATCH v2 1/2 ARM: tegra: Fix FLOW_CTLR_HALT register clobbering by tegra_resume()
There is an unfortunate typo in the code that results in writing to FLOW_CTLR_HALT instead of FLOW_CTLR_CSR.
--- arch/arm/mach-tegra/reset-handler.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
arch/arm/mach-tegra/reset-handler.S +3 -3
@@ -44,16 +44,16 @@ ENTRY(tegra_resume) cmp r6, #TEGRA20 beq 1f @ Yes /* Clear the flow controller flags for this CPU. */ - cpu_to_csr_reg r1, r0 + cpu_to_csr_reg r3, r0 mov32 r2, TEGRA_FLOW_CTRL_BASE - ldr r1, [r2, r1] + ldr r1, [r2, r3] /* Clear event & intr flag */ orr r1, r1, \ #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG movw r0, #0x3FFD @ enable, cluster_switch, immed, bitmaps @ & ext flags for CPU power mgnt bic r1, r1, r0 - str r1, [r2] + str r1, [r2, r3] 1: mov32 r9, 0xc09
Signature · 1 line
2.22.0
PATCH v2 2/2 ARM: tegra: Use WFE for power-gating on Tegra30
In reply to Dmitry OsipenkoTurned out that WFI doesn't work reliably on Tegra30 as a trigger for the power-gating, it causes CPU hang under some circumstances like having memory controller running of PLLP. The TRM doc states that WFI should be used for the Big-Little "Cluster Switch", while WFE for the power-gating. Hence let's use the WFE for CPU0 power-gating, like it is done for the power-gating of a secondary cores. This fixes CPU hang after entering LP2 with memory running off PLLP.
--- arch/arm/mach-tegra/sleep-tegra30.S | 4 +++- drivers/soc/tegra/flowctrl.c | 19 +++++++++++++++++-- 2 files changed, 20 insertions(+), 3 deletions(-)
arch/arm/mach-tegra/sleep-tegra30.S +3 -1
@@ -683,10 +683,12 @@ tegra30_enter_sleep: dsb ldr r0, [r6, r2] /* memory barrier */ + cmp r10, #TEGRA30 halted: isb dsb - wfi /* CPU should be power gated here */ + wfine /* CPU should be power gated here */ + wfeeq /* !!!FIXME!!! Implement halt failure handler */ b halted
drivers/soc/tegra/flowctrl.c +17 -2
@@ -91,8 +91,23 @@ void flowctrl_cpu_suspend_enter(unsigned int cpuid) reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP ;/* clear wfi bitmap */ reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP ; -/* pwr gating on wfi */ - reg |=TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid; + +if (tegra_get_chip_id () ==TEGRA30 ) { +/* +* The wfi doesn't work well on Tegra30 because +* CPU hangs under some odd circumstances after +* power-gating (like memory running off PLLP), +* hence use wfe that is working perfectly fine. +* Note that Tegra30 TRM doc clearly stands that +* wfi should be used for the "Cluster Switching", +* while wfe for the power-gating, just like it +* is done on Tegra20. +*/ + reg |=TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid; + }else { +/* pwr gating on wfi */ + reg |=TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid; + }break ; } reg |=FLOW_CTRL_CSR_INTR_FLAG ;/* clear intr flag */
Signature · 1 line
2.22.0
Re: [PATCH v2 2/2] ARM: tegra: Use WFE for power-gating on Tegra30
The Ouya (tegra30) hard locks when the emc clock drops below 400mhz. Discovered while testing the devfreq and emc drivers. This patch resolves that issue.
Quoted 67 lines · Dmitry Osipenko
Turned out that WFI doesn't work reliably on Tegra30 as a trigger for the power-gating, it causes CPU hang under some circumstances like having memory controller running of PLLP. The TRM doc states that WFI should be used for the Big-Little "Cluster Switch", while WFE for the power-gating. Hence let's use the WFE for CPU0 power-gating, like it is done for the power-gating of a secondary cores. This fixes CPU hang after entering LP2 with memory running off PLLP.
Signed-off-by Dmitry Osipenko <[email protected]>--- arch/arm/mach-tegra/sleep-tegra30.S | 4 +++- drivers/soc/tegra/flowctrl.c | 19 +++++++++++++++++-- 2 files changed, 20 insertions(+), 3 deletions(-)arch/arm/mach-tegra/sleep-tegra30.S +3
-1@@ -683,10 +683,12 @@ tegra30_enter_sleep: dsb ldr r0, [r6, r2] /* memory barrier */ + cmp r10, #TEGRA30 halted: isb dsb - wfi /* CPU should be power gated here */ + wfine /* CPU should be power gated here */ + wfeeq /* !!!FIXME!!! Implement halt failure handler */ b halteddrivers/soc/tegra/flowctrl.c +17
-3@@ -91,8 +91,23 @@ void flowctrl_cpu_suspend_enter(unsigned int cpuid) reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP ;/* clear wfi bitmap */ reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP ; -/* pwr gating on wfi */ - reg |=TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid; + +if (tegra_get_chip_id () ==TEGRA30 ) { +/* +* The wfi doesn't work well on Tegra30 because +* CPU hangs under some odd circumstances after +* power-gating (like memory running off PLLP), +* hence use wfe that is working perfectly fine. +* Note that Tegra30 TRM doc clearly stands that +* wfi should be used for the "Cluster Switching", +* while wfe for the power-gating, just like it +* is done on Tegra20. +*/ + reg |=TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid; + }else { +/* pwr gating on wfi */ + reg |=TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid; + }break ; } reg |=FLOW_CTRL_CSR_INTR_FLAG ;/* clear intr flag */ --2.22.0
Thierry Reding
AppliedQuoted 5 lines · Dmitry Osipenko
Hello,
This small series addresses two suspend-resume bugs: one affects Tegra30+ due to a typo in the code, other fixes CPU hang on Tegra30 specifically.
Quoted 8 lines
Changelog:
v2: Reworded comment to the code to make it sound better in the patch
"Use WFE for power-gating on Tegra30".Dmitry Osipenko (2):
ARM: tegra: FixFLOW_CTLR_HALTregister clobbering bytegra_resume()
ARM: tegra: Use WFE for power-gating on Tegra30
Applied to for-5.5/arm/core, thanks.
Thierry