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FAILED: patch "[PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section" failed to apply to 5.2-stable tree

PATCH In review [email protected] 3 participants 6 messages Aug 5, 2019 – Aug 8, 2019

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[email protected]

author maintainer
#0 lore raw

The patch below does not apply to the 5.2-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 Mon Sep 17 00:00:00 2001
From: Dhinakaran Pandiyan <[email protected]>
Date: Wed, 17 Jul 2019 15:34:51 -0700
Subject: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

A single 32-bit PSR2 training pattern field follows the sixteen element array of PSR table entries in the VBT spec. But, we incorrectly define this PSR2 field for each of the PSR table entries. As a result, the PSR1 training pattern duration for any panel_type != 0 will be parsed incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb version >= 226 will also be wrong.

Cc Rodrigo Vivi <[email protected]>
Cc José Roberto de Souza <[email protected]>
Fixes 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183

drivers/gpu/drm/i915/display/intel_bios.c +1 -1
index c4710889cb32..3ef4e9f573cf 100644
@@ -765,7 +765,7 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 	}
 
 	if (bdb->version >= 226) {
-		u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
+		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
 
 		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
 		switch (wakeup_time) {
drivers/gpu/drm/i915/display/intel_vbt_defs.h +3 -3
index 2f4894e9a03d..5ddbe71ab423 100644
@@ -478,13 +478,13 @@ struct psr_table {
 	/* TP wake up time in multiple of 100 */
 	u16 tp1_wakeup_time;
 	u16 tp2_tp3_wakeup_time;
-
-	/* PSR2 TP2/TP3 wakeup time for 16 panels */
-	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 struct bdb_psr {
 	struct psr_table psr_table[16];
+
+	/* PSR2 TP2/TP3 wakeup time for 16 panels */
+	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 /*
#1 lore raw

PATCH 1/1 drm/i915/vbt: Fix VBT parsing for the PSR section

From: Dhinakaran Pandiyan <[email protected]>

A single 32-bit PSR2 training pattern field follows the sixteen element array of PSR table entries in the VBT spec. But, we incorrectly define this PSR2 field for each of the PSR table entries. As a result, the PSR1 training pattern duration for any panel_type != 0 will be parsed incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb version >= 226 will also be wrong.

Cc Rodrigo Vivi <[email protected]>
Cc José Roberto de Souza <[email protected]>
Fixes 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183

---

Sending it for Dhinakaran, let me know if something is wrong.

 drivers/gpu/drm/i915/intel_bios.c     | 2 +-
 drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)
drivers/gpu/drm/i915/intel_bios.c +1 -1
index 1dc8d03ff127..ee6fa75d65a2 100644
@@ -762,7 +762,7 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 	}
 
 	if (bdb->version >= 226) {
-		u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
+		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
 
 		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
 		switch (wakeup_time) {
drivers/gpu/drm/i915/intel_vbt_defs.h +3 -3
index fdbbb9a53804..796c070bbe6f 100644
@@ -772,13 +772,13 @@ struct psr_table {
 	/* TP wake up time in multiple of 100 */
 	u16 tp1_wakeup_time;
 	u16 tp2_tp3_wakeup_time;
-
-	/* PSR2 TP2/TP3 wakeup time for 16 panels */
-	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 struct bdb_psr {
 	struct psr_table psr_table[16];
+
+	/* PSR2 TP2/TP3 wakeup time for 16 panels */
+	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 /*
Signature · 1 line
2.22.0
#2 lore raw

Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section

Quoted 2 lines · José Roberto de Souza

From: Dhinakaran Pandiyan <[email protected]>

commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 upstream.

Quoted 65 lines

A single 32-bit PSR2 training pattern field follows the sixteen element array of PSR table entries in the VBT spec. But, we incorrectly define this PSR2 field for each of the PSR table entries. As a result, the PSR1 training pattern duration for any panel_type != 0 will be parsed incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb version >= 226 will also be wrong.

Cc Rodrigo Vivi <[email protected]>
Cc José Roberto de Souza <[email protected]>
Fixes 88a0d9606aff ("drm/i915/vbt: Parse and use the new field with PSR2 TP2/3 wakeup time")

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183

---

Sending it for Dhinakaran, let me know if something is wrong.

 drivers/gpu/drm/i915/intel_bios.c     | 2 +-
 drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)
drivers/gpu/drm/i915/intel_bios.c +1 -1
index 1dc8d03ff127..ee6fa75d65a2 100644
@@ -762,7 +762,7 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
 	}
 
 	if (bdb->version >= 226) {
-		u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
+		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
 
 		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
 		switch (wakeup_time) {
drivers/gpu/drm/i915/intel_vbt_defs.h +3 -3
index fdbbb9a53804..796c070bbe6f 100644
@@ -772,13 +772,13 @@ struct psr_table {
 	/* TP wake up time in multiple of 100 */
 	u16 tp1_wakeup_time;
 	u16 tp2_tp3_wakeup_time;
-
-	/* PSR2 TP2/TP3 wakeup time for 16 panels */
-	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 struct bdb_psr {
 	struct psr_table psr_table[16];
+
+	/* PSR2 TP2/TP3 wakeup time for 16 panels */
+	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 /*
Signature · 1 line
Jani Nikula, Intel Open Source Graphics Center
#3 lore raw

Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section

Hi Greg

Anything is missing to have this merged for 5.2.8?

Quoted 82 lines · Jani Nikula
Quoted 2 lines · José Roberto de Souza

From: Dhinakaran Pandiyan <[email protected]>

commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 upstream.

Quoted 75 lines

A single 32-bit PSR2 training pattern field follows the sixteen element
array of PSR table entries in the VBT spec. But, we incorrectly define
this PSR2 field for each of the PSR table entries. As a result, the PSR1
training pattern duration for any panel_type != 0 will be parsed incorrectly. Secondly, PSR2 training pattern durations for VBTs with bdb
version >= 226 will also be wrong.

Cc Rodrigo Vivi <[email protected]>
Cc José Roberto de Souza <[email protected]>
Fixes 88a0d9606aff ("drm/i915/vbt: Parse and use the new field

with PSR2 TP2/3 wakeup time")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111088
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204183

Link:
https://patchwork.freedesktop.org/patch/msgid/[email protected]

(cherry picked from commit

6d61f716a01ec0e134de38ae97e71d6fec5a6ff6)
---

Sending it for Dhinakaran, let me know if something is wrong.

 drivers/gpu/drm/i915/intel_bios.c     | 2 +-
 drivers/gpu/drm/i915/intel_vbt_defs.h | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)
drivers/gpu/drm/i915/intel_bios.c +1 -1
index 1dc8d03ff127..ee6fa75d65a2 100644
@@ -762,7 +762,7 @@ parse_psr(struct drm_i915_private *dev_priv,
 const struct bdb_header *bdb)
 	}
 
 	if (bdb->version >= 226) {
-		u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
+		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
 
 		wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
drivers/gpu/drm/i915/intel_bios.c +0 -0
 		switch (wakeup_time) {
drivers/gpu/drm/i915/intel_vbt_defs.h +3 -3
index fdbbb9a53804..796c070bbe6f 100644
@@ -772,13 +772,13 @@ struct psr_table {
 	/* TP wake up time in multiple of 100 */
 	u16 tp1_wakeup_time;
 	u16 tp2_tp3_wakeup_time;
-
-	/* PSR2 TP2/TP3 wakeup time for 16 panels */
-	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 struct bdb_psr {
 	struct psr_table psr_table[16];
+
+	/* PSR2 TP2/TP3 wakeup time for 16 panels */
+	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 /*
author maintainer
#4 lore raw

Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section

Quoted 3 lines · Jose

Hi Greg

Anything is missing to have this merged for 5.2.8?

Patience :)

The queue is long and you only sent this 2 days ago...

author maintainer
#5 lore raw

Re: [PATCH] drm/i915/vbt: Fix VBT parsing for the PSR section

In reply to Jani Nikula
Quoted 5 lines · Jani Nikula
Quoted 2 lines · José Roberto de Souza

From: Dhinakaran Pandiyan <[email protected]>

commit 6d61f716a01ec0e134de38ae97e71d6fec5a6ff6 upstream.

Now queued up, thanks.

greg k-h