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tools/power: intel-speed-select: Fix a read overflow in isst_set_tdp_level_msr()

PATCH In review Dan Carpenter 2 participants 2 messages Aug 21, 2019

Subsystems (3)
Kernel janitors x86 platform drivers Intel speed select technology
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Dan Carpenter

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#0 lore raw

PATCH 1/1 tools/power: intel-speed-select: Fix a read overflow in isst_set_tdp_level_msr()

The isst_send_msr_command() function will read 8 bytes but we are passing an address to an int (4 bytes) so it results in a read overflow.

Fixes 3fb4f7cd472c ("tools/power/x86: A tool to validate Intel Speed Select commands")
Signed-off-by Dan Carpenter <[email protected]>
---
 tools/power/x86/intel-speed-select/isst-core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
tools/power/x86/intel-speed-select/isst-core.c +2 -2
index 8de4ac39a008..f724322856ed 100644
@@ -190,6 +190,7 @@ int isst_get_get_trl(int cpu, int level, int avx_level, int *trl)
 
 int isst_set_tdp_level_msr(int cpu, int tdp_level)
 {
+	unsigned long long level = tdp_level;
 	int ret;
 
 	debug_printf("cpu: tdp_level via MSR %d\n", cpu, tdp_level);

@@ -202,8 +203,7 @@ int isst_set_tdp_level_msr(int cpu, int tdp_level)
 	if (tdp_level > 2)
 		return -1; /* invalid value */
 
-	ret = isst_send_msr_command(cpu, 0x64b, 1,
-				    (unsigned long long *)&tdp_level);
+	ret = isst_send_msr_command(cpu, 0x64b, 1, &level);
 	if (ret)
 		return ret;
Signature · 1 line
2.20.1
maintainer Acked-by on v1 1/1
#1 lore raw
Quoted 7 lines · Dan Carpenter

The isst_send_msr_command() function will read 8 bytes but we are passing an address to an int (4 bytes) so it results in a read overflow.

Fixes 3fb4f7cd472c ("tools/power/x86: A tool to validate Intel Speed

Select commands")

Signed-off-by Dan Carpenter <[email protected]>
Acked-by Srinivas Pandruvada <[email protected]>
Quoted 29 lines
---
 tools/power/x86/intel-speed-select/isst-core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
tools/power/x86/intel-speed-select/isst-core.c +1 -0
index 8de4ac39a008..f724322856ed 100644
@@ -190,6 +190,7 @@ int isst_get_get_trl(int cpu, int level, int
 avx_level, int *trl)
 
 int isst_set_tdp_level_msr(int cpu, int tdp_level)
 {
+	unsigned long long level = tdp_level;
 	int ret;
tools/power/x86/intel-speed-select/isst-core.c +1 -2
 	debug_printf("cpu: tdp_level via MSR %d\n", cpu, tdp_level);

@@ -202,8 +203,7 @@ int isst_set_tdp_level_msr(int cpu, int
 tdp_level)
 	if (tdp_level > 2)
 		return -1; /* invalid value */
 
-	ret = isst_send_msr_command(cpu, 0x64b, 1,
-				    (unsigned long long *)&tdp_level);
+	ret = isst_send_msr_command(cpu, 0x64b, 1, &level);
 	if (ret)
 		return ret;