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clk: qcom: Add support for SM8150

PATCH Superseded Vinod Koul 2 participants 6 messages Aug 26, 2019 – Sep 9, 2019

Subsystems (4)

v4 of 5 Superseded Latest is v5 →

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Vinod Koul

author
#0 lore raw

v4 cover clk: qcom: Add support for SM8150

Add support for rpm clock controller found in SM8150 and while at it update the driver to support parent data clock scheme as suggested by Stephen.

Changes since v3:
- Make clock parent name as xo instead of xo_board

Changes since v2:
- Add reviewed-by from Bjorn
- Update the parent name as xo_board
- Fix style issue

Changes since v1:
- Describe parent clocks for rpmhcc
- Add support for parent data scheme for rpmhcc

Vinod Koul (4):
dt-bindings: clock: Document the parent clocks
clk: qcom: clk-rpmh: Convert to parent data scheme
dt-bindings: clock: Document SM8150 rpmh-clock compatible
clk: qcom: clk-rpmh: Add support for SM8150

 .../bindings/clock/qcom,rpmh-clk.txt          |  7 +++-
 drivers/clk/qcom/clk-rpmh.c                   | 38 ++++++++++++++++++-
 2 files changed, 42 insertions(+), 3 deletions(-)
Signature · 1 line
2.20.1
author
#1 lore raw

PATCH v4 1/4 dt-bindings: clock: Document the parent clocks

With clock parent data scheme we must specify the parent clocks for the rpmhcc nodes. So describe the parent clock for rpmhcc in the bindings.

---
 Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt +3 -0
index 3c007653da31..8b97968f9c88 100644
@@ -9,6 +9,9 @@ Required properties :
 - compatible : shall contain "qcom,sdm845-rpmh-clk"
 
 - #clock-cells : must contain 1
+- clocks: a list of phandles and clock-specifier pairs,
+	  one for each entry in clock-names.
+- clock-names: Parent board clock: "xo".
 
 Example :
 
Signature · 1 line
2.20.1
maintainer
#2 lore raw

Re: [PATCH v4 1/4] dt-bindings: clock: Document the parent clocks

Quoting Vinod Koul (2019-08-26 05:14:50)

Quoted 14 lines

With clock parent data scheme we must specify the parent clocks for the rpmhcc nodes. So describe the parent clock for rpmhcc in the bindings.

---
 Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt +0 -0
index 3c007653da31..8b97968f9c88 100644

Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt Required properties : · line 14

Quoted 6 lines
Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt +3 -0
@@ -9,6 +9,9 @@ Required properties :
 - compatible : shall contain "qcom,sdm845-rpmh-clk"
 
 - #clock-cells : must contain 1
+- clocks: a list of phandles and clock-specifier pairs,
+         one for each entry in clock-names.
+- clock-names: Parent board clock: "xo".

Ok. xo is fine!

author
#3 lore raw

PATCH v4 2/4 clk: qcom: clk-rpmh: Convert to parent data scheme

In reply to Vinod Koul

Convert the rpmh clock driver to use the new parent data scheme by specifying the parent data for board clock.

---
 drivers/clk/qcom/clk-rpmh.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)
drivers/clk/qcom/clk-rpmh.c +8 -2
index c3fd632af119..97aa092f5f40 100644
@@ -95,7 +95,10 @@ static DEFINE_MUTEX(rpmh_clk_lock);
 		.hw.init = &(struct clk_init_data){			\
 			.ops = &clk_rpmh_ops,				\
 			.name = #_name,					\
-			.parent_names = (const char *[]){ "xo_board" },	\
+			.parent_data =  &(const struct clk_parent_data){ \
+					.fw_name = "xo_board",		\
+					.name = "xo",			\
+			},						\
 			.num_parents = 1,				\
 		},							\
 	};								\
@@ -110,7 +113,10 @@ static DEFINE_MUTEX(rpmh_clk_lock);
 		.hw.init = &(struct clk_init_data){			\
 			.ops = &clk_rpmh_ops,				\
 			.name = #_name_active,				\
-			.parent_names = (const char *[]){ "xo_board" },	\
+			.parent_data =  &(const struct clk_parent_data){ \
+					.fw_name = "xo_board",		\
+					.name = "xo",			\
+			},						\
 			.num_parents = 1,				\
 		},							\
 	}
Signature · 1 line
2.20.1
author
#4 lore raw

PATCH v4 3/4 dt-bindings: clock: Document SM8150 rpmh-clock compatible

In reply to Vinod Koul

Document the SM8150 rpmh-clock compatible for rpmh clock controller found on SM8150 platforms.

---
 Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt +3 -1
index 8b97968f9c88..365bbde599b1 100644
@@ -6,7 +6,9 @@ some Qualcomm Technologies Inc. SoCs. It accepts clock requests from
 other hardware subsystems via RSC to control clocks.
 
 Required properties :
-- compatible : shall contain "qcom,sdm845-rpmh-clk"
+- compatible : must be one of:
+	       "qcom,sdm845-rpmh-clk"
+	       "qcom,sm8150-rpmh-clk"
 
 - #clock-cells : must contain 1
 - clocks: a list of phandles and clock-specifier pairs,
Signature · 1 line
2.20.1
author
#5 lore raw

PATCH v4 4/4 clk: qcom: clk-rpmh: Add support for SM8150

In reply to Vinod Koul

Add support for rpmh clocks found in SM8150

---
 drivers/clk/qcom/clk-rpmh.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
drivers/clk/qcom/clk-rpmh.c +28 -0
index 97aa092f5f40..082d0b72fe1e 100644
@@ -374,6 +374,33 @@ static const struct clk_rpmh_desc clk_rpmh_sdm845 = {
 	.num_clks = ARRAY_SIZE(sdm845_rpmh_clocks),
 };
 
+DEFINE_CLK_RPMH_ARC(sm8150, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 2);
+DEFINE_CLK_RPMH_VRM(sm8150, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 2);
+DEFINE_CLK_RPMH_VRM(sm8150, ln_bb_clk3, ln_bb_clk3_ao, "lnbclka3", 2);
+DEFINE_CLK_RPMH_VRM(sm8150, rf_clk1, rf_clk1_ao, "rfclka1", 1);
+DEFINE_CLK_RPMH_VRM(sm8150, rf_clk2, rf_clk2_ao, "rfclka2", 1);
+DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1);
+
+static struct clk_hw *sm8150_rpmh_clocks[] = {
+	[RPMH_CXO_CLK]		= &sm8150_bi_tcxo.hw,
+	[RPMH_CXO_CLK_A]	= &sm8150_bi_tcxo_ao.hw,
+	[RPMH_LN_BB_CLK2]	= &sm8150_ln_bb_clk2.hw,
+	[RPMH_LN_BB_CLK2_A]	= &sm8150_ln_bb_clk2_ao.hw,
+	[RPMH_LN_BB_CLK3]	= &sm8150_ln_bb_clk3.hw,
+	[RPMH_LN_BB_CLK3_A]	= &sm8150_ln_bb_clk3_ao.hw,
+	[RPMH_RF_CLK1]		= &sm8150_rf_clk1.hw,
+	[RPMH_RF_CLK1_A]	= &sm8150_rf_clk1_ao.hw,
+	[RPMH_RF_CLK2]		= &sm8150_rf_clk2.hw,
+	[RPMH_RF_CLK2_A]	= &sm8150_rf_clk2_ao.hw,
+	[RPMH_RF_CLK3]		= &sm8150_rf_clk3.hw,
+	[RPMH_RF_CLK3_A]	= &sm8150_rf_clk3_ao.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_sm8150 = {
+	.clks = sm8150_rpmh_clocks,
+	.num_clks = ARRAY_SIZE(sm8150_rpmh_clocks),
+};
+
 static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
 					 void *data)
 {
@@ -453,6 +480,7 @@ static int clk_rpmh_probe(struct platform_device *pdev)
 
 static const struct of_device_id clk_rpmh_match_table[] = {
 	{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
+	{ .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
 	{ }
 };
 MODULE_DEVICE_TABLE(of, clk_rpmh_match_table);
Signature · 1 line
2.20.1