reset: npcm: add NPCM reset driver support

PATCH Superseded Tomer Maimon 2 participants 5 messages Oct 24, 2019 – Oct 28, 2019

Subsystems (3)

Device tree bindings Reset controller framework Arm/nuvoton npcm architecture

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Tomer Maimon

author maintainer

2019-10-24 21:48 UTC #0 lore raw

cover reset: npcm: add NPCM reset driver support

This patch set adds reset controller support
for the Nuvoton NPCM Baseboard Management Controller (BMC).

Apart of controlling all NPCM BMC reset module lines the NPCM reset driver support NPCM BMC software reset to restarting the NPCM BMC.

Supporting NPCM USB-PHY reset as follow:

NPCM BMC USB-PHY connected to two modules USB device (UDC) and USB host.

If we will restart the USB-PHY at the UDC probe and later the USB host probe will restart USB-PHY again it will disable the UDC and vice versa.

The solution is to reset the USB-PHY at the reset probe stage before the UDC and the USB host are initializing.

NPCM reset driver tested on NPCM750 evaluation board.

Tomer Maimon (3):
dt-binding: reset: add NPCM reset controller documentation
dt-bindings: reset: Add binding constants for NPCM7xx reset controller
reset: npcm: add NPCM reset controller driver

 .../bindings/reset/nuvoton,npcm-reset.txt     |  35 +++
 drivers/reset/Kconfig                         |   7 +
 drivers/reset/Makefile                        |   1 +
 drivers/reset/reset-npcm.c                    | 273 ++++++++++++++++++
 .../dt-bindings/reset/nuvoton,npcm7xx-reset.h |  82 ++++++
 5 files changed, 398 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt
 create mode 100644 drivers/reset/reset-npcm.c
 create mode 100644 include/dt-bindings/reset/nuvoton,npcm7xx-reset.h

Signature · 1 line

2.22.0

Tomer Maimon

author maintainer

2019-10-24 21:48 UTC #1 lore raw

PATCH 1/3 dt-binding: reset: add NPCM reset controller documentation

Added device tree binding documentation for Nuvoton BMC NPCM reset controller.

Signed-off-by Tomer Maimon <[email protected]>

---
 .../bindings/reset/nuvoton,npcm-reset.txt     | 35 +++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt

Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt new file +35 -0

new file mode 100644
index 000000000000..94793285a2ac
@@ -0,0 +1,35 @@
+Nuvoton NPCM Reset controller
+
+In the NPCM Reset controller boot the USB PHY, USB host
+and USB device initialize.
+
+Required properties:
+- compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC
+- reg : specifies physical base address and size of the register.
+- #reset-cells: must be set to 1
+
+Optional property:
+- nuvoton,sw-reset-number - Contains the software reset number to restart the SoC.
+  NPCM7xx contain four software reset that represent numbers 1 to 4.
+
+  If 'nuvoton,sw-reset-number' is not specfied software reset is disabled.
+
+Example:
+	rstc: rstc@f0801000 {
+		compatible = "nuvoton,npcm750-reset";
+		reg = <0xf0801000 0x70>;
+		#reset-cells = <1>;
+		nuvoton,sw-reset-number = <2>;
+	};
+
+Specifying reset lines connected to IP NPCM7XX modules
+======================================================
+example:
+
+        spi0: spi@..... {
+                ...
+                resets = <&rstc NPCM7XX_RESET_PSPI1>;
+                ...
+        };
+
+The index could be found in <dt-bindings/reset/nuvoton,npcm7xx-reset.h>.

Signature · 1 line

2.22.0

Tomer Maimon

author maintainer

2019-10-24 21:48 UTC #2 lore raw

PATCH 2/3 dt-bindings: reset: Add binding constants for NPCM7xx reset controller

In reply to Tomer Maimon

Add device tree binding constants for Nuvoton BMC NPCM7xx reset controller.

Signed-off-by Tomer Maimon <[email protected]>

---
 .../dt-bindings/reset/nuvoton,npcm7xx-reset.h | 82 +++++++++++++++++++
 1 file changed, 82 insertions(+)
 create mode 100644 include/dt-bindings/reset/nuvoton,npcm7xx-reset.h

include/dt-bindings/reset/nuvoton,npcm7xx-reset.h new file +82 -0

new file mode 100644
index 000000000000..7b7e870eac35
@@ -0,0 +1,82 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+// Copyright (c) 2019 Nuvoton Technology corporation.
+
+#ifndef _DT_BINDINGS_NPCM7XX_RESET_H
+#define _DT_BINDINGS_NPCM7XX_RESET_H
+
+#define NPCM7XX_RESET_FIU3		1
+#define NPCM7XX_RESET_UDC1		5
+#define NPCM7XX_RESET_EMC1		6
+#define NPCM7XX_RESET_UART_2_3		7
+#define NPCM7XX_RESET_UDC2		8
+#define NPCM7XX_RESET_PECI		9
+#define NPCM7XX_RESET_AES		10
+#define NPCM7XX_RESET_UART_0_1		11
+#define NPCM7XX_RESET_MC		12
+#define NPCM7XX_RESET_SMB2		13
+#define NPCM7XX_RESET_SMB3		14
+#define NPCM7XX_RESET_SMB4		15
+#define NPCM7XX_RESET_SMB5		16
+#define NPCM7XX_RESET_PWM_M0		18
+#define NPCM7XX_RESET_TIMER_0_4		19
+#define NPCM7XX_RESET_TIMER_5_9		20
+#define NPCM7XX_RESET_EMC2		21
+#define NPCM7XX_RESET_UDC4		22
+#define NPCM7XX_RESET_UDC5		23
+#define NPCM7XX_RESET_UDC6		24
+#define NPCM7XX_RESET_UDC3		25
+#define NPCM7XX_RESET_ADC		27
+#define NPCM7XX_RESET_SMB6		28
+#define NPCM7XX_RESET_SMB7		29
+#define NPCM7XX_RESET_SMB0		30
+#define NPCM7XX_RESET_SMB1		31
+#define NPCM7XX_RESET_MFT0		32
+#define NPCM7XX_RESET_MFT1		33
+#define NPCM7XX_RESET_MFT2		34
+#define NPCM7XX_RESET_MFT3		35
+#define NPCM7XX_RESET_MFT4		36
+#define NPCM7XX_RESET_MFT5		37
+#define NPCM7XX_RESET_MFT6		38
+#define NPCM7XX_RESET_MFT7		39
+#define NPCM7XX_RESET_MMC		40
+#define NPCM7XX_RESET_SDHC		41
+#define NPCM7XX_RESET_GFX_SYS		42
+#define NPCM7XX_RESET_AHB_PCIBRG	43
+#define NPCM7XX_RESET_VDMA		44
+#define NPCM7XX_RESET_ECE		45
+#define NPCM7XX_RESET_VCD		46
+#define NPCM7XX_RESET_OTP		48
+#define NPCM7XX_RESET_SIOX1		50
+#define NPCM7XX_RESET_SIOX2		51
+#define NPCM7XX_RESET_3DES		53
+#define NPCM7XX_RESET_PSPI1		54
+#define NPCM7XX_RESET_PSPI2		55
+#define NPCM7XX_RESET_GMAC2		57
+#define NPCM7XX_RESET_USB_HOST		58
+#define NPCM7XX_RESET_GMAC1		60
+#define NPCM7XX_RESET_CP		63
+#define NPCM7XX_RESET_PWM_M1		160
+#define NPCM7XX_RESET_SMB12		161
+#define NPCM7XX_RESET_SPIX		162
+#define NPCM7XX_RESET_SMB13		163
+#define NPCM7XX_RESET_UDC0		164
+#define NPCM7XX_RESET_UDC7		165
+#define NPCM7XX_RESET_UDC8		166
+#define NPCM7XX_RESET_UDC9		167
+#define NPCM7XX_RESET_PCI_MAILBOX	169
+#define NPCM7XX_RESET_SMB14		172
+#define NPCM7XX_RESET_SHA		173
+#define NPCM7XX_RESET_SEC_ECC		174
+#define NPCM7XX_RESET_PCIE_RC		175
+#define NPCM7XX_RESET_TIMER_10_14	176
+#define NPCM7XX_RESET_RNG		177
+#define NPCM7XX_RESET_SMB15		178
+#define NPCM7XX_RESET_SMB8		179
+#define NPCM7XX_RESET_SMB9		180
+#define NPCM7XX_RESET_SMB10		181
+#define NPCM7XX_RESET_SMB11		182
+#define NPCM7XX_RESET_ESPI		183
+#define NPCM7XX_RESET_USB_PHY_1		184
+#define NPCM7XX_RESET_USB_PHY_2		185
+
+#endif

Signature · 1 line

2.22.0

Tomer Maimon

author maintainer

2019-10-24 21:48 UTC #3 lore raw

PATCH 3/3 reset: npcm: add NPCM reset controller driver

In reply to Tomer Maimon

Add Nuvoton NPCM BMC reset controller driver.

Signed-off-by Tomer Maimon <[email protected]>

---
 drivers/reset/Kconfig      |   7 +
 drivers/reset/Makefile     |   1 +
 drivers/reset/reset-npcm.c | 273 +++++++++++++++++++++++++++++++++++++
 3 files changed, 281 insertions(+)
 create mode 100644 drivers/reset/reset-npcm.c

drivers/reset/Kconfig +7 -0

index 7b07281aa0ae..5dbfdf6d717a 100644
@@ -89,6 +89,13 @@ config RESET_MESON_AUDIO_ARB
 	  This enables the reset driver for Audio Memory Arbiter of
 	  Amlogic's A113 based SoCs
 
+config RESET_NPCM
+	bool "NPCM BMC Reset Driver"
+	depends on ARCH_NPCM || COMPILE_TEST
+	help
+	  This enables the reset controller driver for Nuvoton NPCM 
+	  BMC SoCs.
+
 config RESET_OXNAS
 	bool

drivers/reset/Makefile +1 -0

index cf60ce526064..00767c03f5f2 100644
@@ -14,6 +14,7 @@ obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o
 obj-$(CONFIG_RESET_LPC18XX) += reset-lpc18xx.o
 obj-$(CONFIG_RESET_MESON) += reset-meson.o
 obj-$(CONFIG_RESET_MESON_AUDIO_ARB) += reset-meson-audio-arb.o
+obj-$(CONFIG_RESET_NPCM) += reset-npcm.o
 obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o
 obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
 obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o

drivers/reset/reset-npcm.c new file +273 -0

273 lines not on this page · raw message

Signature · 1 line

2.22.0

kbuild test robot

build bot

2019-10-28 00:40 UTC #4 lore raw

Re: [PATCH v1 3/3] reset: npcm: add NPCM reset controller driver

I love your patch! Perhaps something to improve:

Hi Tomer,

I love your patch! Perhaps something to improve:

[auto build test WARNING on pza/reset/next]
[also build test WARNING on v5.4-rc5 next-20191025]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    https://github.com/0day-ci/linux/commits/Tomer-Maimon/reset-npcm-add-NPCM-reset-driver-support/20191028-025236
base:   https://git.pengutronix.de/git/pza/linux reset/next
config: c6x-allyesconfig (attached as .config)
compiler: c6x-elf-gcc (GCC) 7.4.0

reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=c6x

If you fix the issue, kindly add following tag

Reported-by kbuild test robot <[email protected]>

Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings

All warnings (new ones prefixed by >>):

In file included from drivers//reset/reset-npcm.c:15:0:
drivers//reset/reset-npcm.c: In function 'npcm_rc_probe':

>> include/linux/regmap.h:75:2: warning: 'gcr_regmap' may be used uninitialized in this function [-Wmaybe-uninitialized]
     regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
     ^~~~~~~~~~~~~~~~~~~~~~~
   drivers//reset/reset-npcm.c:131:17: note: 'gcr_regmap' was declared here
     struct regmap *gcr_regmap;
                    ^~~~~~~~~~
--
   In file included from drivers/reset/reset-npcm.c:15:0:
   drivers/reset/reset-npcm.c: In function 'npcm_rc_probe':
>> include/linux/regmap.h:75:2: warning: 'gcr_regmap' may be used uninitialized in this function [-Wmaybe-uninitialized]
     regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
     ^~~~~~~~~~~~~~~~~~~~~~~
   drivers/reset/reset-npcm.c:131:17: note: 'gcr_regmap' was declared here
     struct regmap *gcr_regmap;
                    ^~~~~~~~~~

vim +/gcr_regmap +75 include/linux/regmap.h

8019ff6cfc0440 Nariman Poushin 2015-07-16 73

ca7a94464b5457 Kuninori Morimoto 2016-02-15  74  #define	regmap_update_bits(map, reg, mask, val) \
ca7a94464b5457 Kuninori Morimoto 2016-02-15 @75  	regmap_update_bits_base(map, reg, mask, val, NULL, false, false)
30ed9cb7a49b49 Kuninori Morimoto 2016-02-15  76  #define	regmap_update_bits_async(map, reg, mask, val)\
30ed9cb7a49b49 Kuninori Morimoto 2016-02-15  77  	regmap_update_bits_base(map, reg, mask, val, NULL, true, false)
98c2dc48694a47 Kuninori Morimoto 2016-02-15  78  #define	regmap_update_bits_check(map, reg, mask, val, change)\
98c2dc48694a47 Kuninori Morimoto 2016-02-15  79  	regmap_update_bits_base(map, reg, mask, val, change, false, false)
89d8d4b833b0b2 Kuninori Morimoto 2016-02-15  80  #define	regmap_update_bits_check_async(map, reg, mask, val, change)\
89d8d4b833b0b2 Kuninori Morimoto 2016-02-15  81  	regmap_update_bits_base(map, reg, mask, val, change, true, false)

ca7a94464b5457 Kuninori Morimoto 2016-02-15 82

:::::: The code at line 75 was first introduced by commit
:::::: ca7a94464b5457a8dc5add19f6fc3bea59d6193f regmap: merge regmap_update_bits() into macro

:::::: TO: Kuninori Morimoto <[email protected]> :::::: CC: Mark Brown <[email protected]>

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