Add support for capturing the highest observable L2 TSC
v3 cover Add support for capturing the highest observable L2 TSC
The L1 hypervisor may include the IA32_TIME_STAMP_COUNTER MSR in the vmcs12 MSR VM-exit MSR-store area as a way of determining the highest TSC value that might have been observed by L2 prior to VM-exit. The current implementation does not capture a very tight bound on this value. To tighten the bound, add the IA32_TIME_STAMP_COUNTER MSR to the vmcs02 VM-exit MSR-store area whenever it appears in the vmcs12 VM-exit MSR-store area. When L0 processes the vmcs12 VM-exit MSR-store area during the emulation of an L2->L1 VM-exit, special-case the IA32_TIME_STAMP_COUNTER MSR, using the value stored in the vmcs02 VM-exit MSR-store area to derive the value to be stored in the vmcs12 VM-exit MSR-store area.
v2 -> v3:
- Rename NR_MSR_ENTRIES to NR_LOADSAVE_MSRS
- Pull setup code for preparing the MSR-store area out of the final commit and put it in it's own commit (4/5).
- Export vmx_find_msr_index() in the final commit instead of in commit 3/5 as it isn't until the final commit that we actually use it.
v1 -> v2:
- Rename function nested_vmx_get_msr_value() to nested_vmx_get_vmexit_msr_value().
- Remove unneeded tag 'Change-Id' from commit messages.
Aaron Lewis (5):
kvm: nested: Introduce read_and_check_msr_entry()
kvm: vmx: Rename NR_AUTOLOAD_MSRS to NR_MSR_ENTRIES
kvm: vmx: Rename function find_msr() to vmx_find_msr_index()
KVM: nVMX: Prepare MSR-store area
KVM: nVMX: Add support for capturing highest observable L2 TSC
arch/x86/kvm/vmx/nested.c | 136 ++++++++++++++++++++++++++++++++------ arch/x86/kvm/vmx/vmx.c | 14 ++-- arch/x86/kvm/vmx/vmx.h | 9 ++- 3 files changed, 131 insertions(+), 28 deletions(-)
Signature · 1 line
2.24.0.432.g9d3f5f5b63-goog
PATCH v3 1/5 kvm: nested: Introduce read_and_check_msr_entry()
Add the function read_and_check_msr_entry() which just pulls some code out of nested_vmx_store_msr(). This will be useful as reusable code in upcoming patches.
--- arch/x86/kvm/vmx/nested.c | 35 ++++++++++++++++++++++------------- 1 file changed, 22 insertions(+), 13 deletions(-)
arch/x86/kvm/vmx/nested.c +22 -13
@@ -929,6 +929,26 @@ static u32 nested_vmx_load_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)return i +1 ; } +static bool read_and_check_msr_entry (struct kvm_vcpu *vcpu,u64 gpa,int i, +struct vmx_msr_entry *e) +{ +if (kvm_vcpu_read_guest (vcpu, + gpa + i *sizeof (*e), + e,2 *sizeof (u32))) { +pr_debug_ratelimited ( +"%s cannot read MSR entry (%u, 0x%08llx)\n" , + __func__, i, gpa + i *sizeof (*e)); +return false; + } +if (nested_vmx_store_msr_check (vcpu, e)) { +pr_debug_ratelimited ( +"%s check failed (%u, 0x%x, 0x%x)\n" , + __func__, i, e->index, e->reserved); +return false; + } +return true; +} +static int nested_vmx_store_msr (struct kvm_vcpu *vcpu,u64 gpa,u32 count) {u64 data;
@@ -940,20 +960,9 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)if (unlikely (i >= max_msr_list_size))return -EINVAL ; -if (kvm_vcpu_read_guest (vcpu, - gpa + i *sizeof (e), - &e,2 *sizeof (u32))) { -pr_debug_ratelimited ( -"%s cannot read MSR entry (%u, 0x%08llx)\n" , - __func__, i, gpa + i *sizeof (e)); +if (!read_and_check_msr_entry (vcpu, gpa, i, &e))return -EINVAL ; - } -if (nested_vmx_store_msr_check (vcpu, &e)) { -pr_debug_ratelimited ( -"%s check failed (%u, 0x%x, 0x%x)\n" , - __func__, i, e.index, e.reserved); -return -EINVAL ; - } +if (kvm_get_msr (vcpu, e.index, &data)) { pr_debug_ratelimited( "%s cannot read MSR (%u, 0x%x)\n",
Signature · 1 line
2.24.0.432.g9d3f5f5b63-goog
PATCH v3 2/5 kvm: vmx: Rename NR_AUTOLOAD_MSRS to NR_LOADSTORE_MSRS
In reply to Aaron LewisRename NR_AUTOLOAD_MSRS to NR_LOADSTORE_MSRS. This needs to be done due to the addition of the MSR-autostore area that will be added in a future patch. After that the name AUTOLOAD will no longer make sense.
--- arch/x86/kvm/vmx/vmx.c | 4 ++-- arch/x86/kvm/vmx/vmx.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-)
arch/x86/kvm/vmx/vmx.c +2 -2
@@ -940,8 +940,8 @@ static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,if (!entry_only) j =find_msr (&m->host, msr); -if ((i <0 && m->guest.nr ==NR_AUTOLOAD_MSRS ) || - (j <0 && m->host.nr ==NR_AUTOLOAD_MSRS )) { +if ((i <0 && m->guest.nr ==NR_LOADSTORE_MSRS ) || + (j <0 && m->host.nr ==NR_LOADSTORE_MSRS )) {printk_once (KERN_WARNING "Not enough msr switch entries. " "Can't add msr %x\n" , msr);return ;
arch/x86/kvm/vmx/vmx.h +2 -2
@@ -22,11 +22,11 @@ extern u32 get_umwait_control_msr(void);#define X2APIC_MSR (r) (APIC_BASE_MSR + ((r) >> 4)) -#define NR_AUTOLOAD_MSRS 8 +#define NR_LOADSTORE_MSRS 8struct vmx_msrs {unsigned int nr; -struct vmx_msr_entry val[NR_AUTOLOAD_MSRS ]; +struct vmx_msr_entry val[NR_LOADSTORE_MSRS ]; };struct shared_msr_entry {
Signature · 1 line
2.24.0.432.g9d3f5f5b63-goog
PATCH v3 3/5 kvm: vmx: Rename function find_msr() to vmx_find_msr_index()
In reply to Aaron LewisRename function find_msr() to vmx_find_msr_index() in preparation for an upcoming patch where we export it and use it in nested.c.
--- arch/x86/kvm/vmx/vmx.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
arch/x86/kvm/vmx/vmx.c +5 -5
@@ -835,7 +835,7 @@ static void clear_atomic_switch_msr_special(struct vcpu_vmx *vmx,vm_exit_controls_clearbit (vmx, exit); } -static int find_msr (struct vmx_msrs *m,unsigned int msr) +static int vmx_find_msr_index (struct vmx_msrs *m,u32 msr) {unsigned int i;
@@ -869,7 +869,7 @@ static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr) }break ; } - i =find_msr (&m->guest, msr); + i =vmx_find_msr_index (&m->guest, msr);if (i <0 ) goto skip_guest; --m->guest.nr;
@@ -877,7 +877,7 @@ static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)vmcs_write32 (VM_ENTRY_MSR_LOAD_COUNT , m->guest.nr); skip_guest: - i =find_msr (&m->host, msr); + i =vmx_find_msr_index (&m->host, msr);if (i <0 )return ;
@@ -936,9 +936,9 @@ static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,wrmsrl (MSR_IA32_PEBS_ENABLE ,0 ); } - i =find_msr (&m->guest, msr); + i =vmx_find_msr_index (&m->guest, msr);if (!entry_only) - j =find_msr (&m->host, msr); + j =vmx_find_msr_index (&m->host, msr);if ((i <0 && m->guest.nr ==NR_LOADSTORE_MSRS ) || (j <0 && m->host.nr ==NR_LOADSTORE_MSRS )) {
Signature · 1 line
2.24.0.432.g9d3f5f5b63-goog
PATCH v3 4/5 KVM: nVMX: Prepare MSR-store area
In reply to Aaron LewisPrepare the MSR-store area to be used in a follow up patch.
--- arch/x86/kvm/vmx/nested.c | 17 ++++++++++++++++- arch/x86/kvm/vmx/vmx.h | 4 ++++ 2 files changed, 20 insertions(+), 1 deletion(-)
arch/x86/kvm/vmx/nested.c +16 -1
@@ -982,6 +982,14 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)return 0 ; } +static void prepare_vmx_msr_autostore_list (struct kvm_vcpu *vcpu) +{ +struct vcpu_vmx *vmx =to_vmx (vcpu); +struct vmx_msrs *autostore = &vmx->msr_autostore.guest; + + autostore->nr =0 ; +} +static bool nested_cr3_valid (struct kvm_vcpu *vcpu,unsigned long val) {unsigned long invalid_mask;
@@ -2027,7 +2035,7 @@ static void prepare_vmcs02_constant_state(struct vcpu_vmx *vmx)* addresses are constant (for vmcs02), the counts can change based * on L2's behavior, e.g. switching to/from long mode. */ -vmcs_write32 (VM_EXIT_MSR_STORE_COUNT ,0 ); +vmcs_write64 (VM_EXIT_MSR_STORE_ADDR ,__pa (vmx->msr_autostore.guest.val));vmcs_write64 (VM_EXIT_MSR_LOAD_ADDR ,__pa (vmx->msr_autoload.host.val));vmcs_write64 (VM_ENTRY_MSR_LOAD_ADDR ,__pa (vmx->msr_autoload.guest.val));
@@ -2294,6 +2302,13 @@ static void prepare_vmcs02_rare(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12)vmcs_write64 (EOI_EXIT_BITMAP3 , vmcs12->eoi_exit_bitmap3); } +/* +* Make sure the msr_autostore list is up to date before we set the +* count in the vmcs02. +*/ +prepare_vmx_msr_autostore_list (&vmx->vcpu,MSR_IA32_TSC ); + +vmcs_write32 (VM_EXIT_MSR_STORE_COUNT , vmx->msr_autostore.guest.nr);vmcs_write32 (VM_EXIT_MSR_LOAD_COUNT , vmx->msr_autoload.host.nr);vmcs_write32 (VM_ENTRY_MSR_LOAD_COUNT , vmx->msr_autoload.guest.nr);
arch/x86/kvm/vmx/vmx.h +4 -0
@@ -230,6 +230,10 @@ struct vcpu_vmx {struct vmx_msrs host; } msr_autoload; +struct msr_autostore { +struct vmx_msrs guest; + } msr_autostore; +struct {int vm86_active;ulong save_rflags;
Signature · 1 line
2.24.0.432.g9d3f5f5b63-goog
Re: [PATCH v3 4/5] KVM: nVMX: Prepare MSR-store area
Quoted 41 lines · Aaron Lewis
Prepare the MSR-store area to be used in a follow up patch.
Signed-off-by Aaron Lewis <[email protected]>---
arch/x86/kvm/vmx/nested.c| 17 ++++++++++++++++-arch/x86/kvm/vmx/vmx.h| 4 ++++2 files changed, 20 insertions(+), 1 deletion(-)arch/x86/kvm/vmx/nested.c +9
-1@@ -982,6 +982,14 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)return 0 ; } +static void prepare_vmx_msr_autostore_list (struct kvm_vcpu *vcpu) +{ +struct vcpu_vmx *vmx =to_vmx (vcpu); +struct vmx_msrs *autostore = &vmx->msr_autostore.guest; + + autostore->nr =0 ; +} +static bool nested_cr3_valid (struct kvm_vcpu *vcpu,unsigned long val) {unsigned long invalid_mask;@@ -2027,7 +2035,7 @@ static void prepare_vmcs02_constant_state(struct vcpu_vmx *vmx)* addresses are constant (for vmcs02), the counts can change based * on L2's behavior, e.g. switching to/from long mode. */ -vmcs_write32 (VM_EXIT_MSR_STORE_COUNT ,0 ); +vmcs_write64 (VM_EXIT_MSR_STORE_ADDR ,__pa (vmx->msr_autostore.guest.val));vmcs_write64 (VM_EXIT_MSR_LOAD_ADDR ,__pa (vmx->msr_autoload.host.val));vmcs_write64 (VM_ENTRY_MSR_LOAD_ADDR ,__pa (vmx->msr_autoload.guest.val));
arch/x86/kvm/vmx/nested.c static void prepare_vmcs02_rare(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12) · line 2309
Quoted 8 lines
arch/x86/kvm/vmx/nested.c +5
-0@@ -2294,6 +2302,13 @@ static void prepare_vmcs02_rare(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12)vmcs_write64 (EOI_EXIT_BITMAP3 , vmcs12->eoi_exit_bitmap3); } +/* +* Make sure the msr_autostore list is up to date before we set the +* count in the vmcs02. +*/ +prepare_vmx_msr_autostore_list (&vmx->vcpu,MSR_IA32_TSC );
Doesn’t this fail compilation?prepare_vmx_msr_autostore_list() is declared with single parameter while it is called here with two parameters.
Also, why do we need this as a separate patch?
It made sense if next patch was split between all the framework code and the code specific using it in regards to MSR_IA32_TSC, but current separation is a bit bizarre. It is also OK if this patch and next one will just be merged to one (with no such separation).
Quoted 23 lines
arch/x86/kvm/vmx/nested.c +2
-0+ +vmcs_write32 (VM_EXIT_MSR_STORE_COUNT , vmx->msr_autostore.guest.nr);vmcs_write32 (VM_EXIT_MSR_LOAD_COUNT , vmx->msr_autoload.host.nr);vmcs_write32 (VM_ENTRY_MSR_LOAD_COUNT , vmx->msr_autoload.guest.nr);arch/x86/kvm/vmx/vmx.h +4
-0@@ -230,6 +230,10 @@ struct vcpu_vmx {struct vmx_msrs host; } msr_autoload; +struct msr_autostore { +struct vmx_msrs guest; + } msr_autostore; +struct {int vm86_active;ulong save_rflags;Signature · 1 line
2.24.0.432.g9d3f5f5b63-goog
Re: [PATCH v3 4/5] KVM: nVMX: Prepare MSR-store area
Quoted 54 lines · Liran Alon
Quoted 42 lines · Aaron Lewis
Prepare the MSR-store area to be used in a follow up patch.
Signed-off-by Aaron Lewis <[email protected]>---
arch/x86/kvm/vmx/nested.c| 17 ++++++++++++++++-arch/x86/kvm/vmx/vmx.h| 4 ++++2 files changed, 20 insertions(+), 1 deletion(-)arch/x86/kvm/vmx/nested.c +9
-1@@ -982,6 +982,14 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)return 0 ; } +static void prepare_vmx_msr_autostore_list (struct kvm_vcpu *vcpu) +{ +struct vcpu_vmx *vmx =to_vmx (vcpu); +struct vmx_msrs *autostore = &vmx->msr_autostore.guest; + + autostore->nr =0 ; +} +static bool nested_cr3_valid (struct kvm_vcpu *vcpu,unsigned long val) {unsigned long invalid_mask;@@ -2027,7 +2035,7 @@ static void prepare_vmcs02_constant_state(struct vcpu_vmx *vmx)* addresses are constant (for vmcs02), the counts can change based * on L2's behavior, e.g. switching to/from long mode. */ -vmcs_write32 (VM_EXIT_MSR_STORE_COUNT ,0 ); +vmcs_write64 (VM_EXIT_MSR_STORE_ADDR ,__pa (vmx->msr_autostore.guest.val));vmcs_write64 (VM_EXIT_MSR_LOAD_ADDR ,__pa (vmx->msr_autoload.host.val));vmcs_write64 (VM_ENTRY_MSR_LOAD_ADDR ,__pa (vmx->msr_autoload.guest.val));arch/x86/kvm/vmx/nested.c static void prepare_vmcs02_rare(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12) · line 2309
Quoted 8 lines
arch/x86/kvm/vmx/nested.c +5
-0@@ -2294,6 +2302,13 @@ static void prepare_vmcs02_rare(struct vcpu_vmx *vmx, struct vmcs12 *vmcs12)vmcs_write64 (EOI_EXIT_BITMAP3 , vmcs12->eoi_exit_bitmap3); } +/* +* Make sure the msr_autostore list is up to date before we set the +* count in the vmcs02. +*/ +prepare_vmx_msr_autostore_list (&vmx->vcpu,MSR_IA32_TSC );Doesn’t this fail compilation?
prepare_vmx_msr_autostore_list()is declared with single parameter while it is called here with two parameters.
Quoted 3 lines
Also, why do we need this as a separate patch?
It made sense if next patch was split between all the framework code and the code specific using it in regards toMSR_IA32_TSC, but current separation is a bit bizarre. It is also OK if this patch and next one will just be merged to one (with no such separation).
I'll send out an updated patch with this patch and the next one merged together like it originally was.
Quoted 25 lines
Quoted 24 lines
arch/x86/kvm/vmx/nested.c +2
-0+ +vmcs_write32 (VM_EXIT_MSR_STORE_COUNT , vmx->msr_autostore.guest.nr);vmcs_write32 (VM_EXIT_MSR_LOAD_COUNT , vmx->msr_autoload.host.nr);vmcs_write32 (VM_ENTRY_MSR_LOAD_COUNT , vmx->msr_autoload.guest.nr);arch/x86/kvm/vmx/vmx.h +4
-1@@ -230,6 +230,10 @@ struct vcpu_vmx {struct vmx_msrs host; } msr_autoload; +struct msr_autostore { +struct vmx_msrs guest; + } msr_autostore; +struct {int vm86_active;ulong save_rflags; --2.24.0.432.g9d3f5f5b63-goog
PATCH v3 5/5 KVM: nVMX: Add support for capturing highest observable L2 TSC
In reply to Aaron LewisThe L1 hypervisor may include the IA32_TIME_STAMP_COUNTER MSR in the vmcs12 MSR VM-exit MSR-store area as a way of determining the highest TSC value that might have been observed by L2 prior to VM-exit. The current implementation does not capture a very tight bound on this value. To tighten the bound, add the IA32_TIME_STAMP_COUNTER MSR to the vmcs02 VM-exit MSR-store area whenever it appears in the vmcs12 VM-exit MSR-store area. When L0 processes the vmcs12 VM-exit MSR-store area during the emulation of an L2->L1 VM-exit, special-case the IA32_TIME_STAMP_COUNTER MSR, using the value stored in the vmcs02 VM-exit MSR-store area to derive the value to be stored in the vmcs12 VM-exit MSR-store area.
--- arch/x86/kvm/vmx/nested.c | 88 +++++++++++++++++++++++++++++++++++---- arch/x86/kvm/vmx/vmx.c | 2 +- arch/x86/kvm/vmx/vmx.h | 1 + 3 files changed, 83 insertions(+), 8 deletions(-)
arch/x86/kvm/vmx/nested.c +81 -7
@@ -929,6 +929,37 @@ static u32 nested_vmx_load_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)return i +1 ; } +static bool nested_vmx_get_vmexit_msr_value (struct kvm_vcpu *vcpu, +u32 msr_index, +u64 *data) +{ +struct vcpu_vmx *vmx =to_vmx (vcpu); + +/* +* If the L0 hypervisor stored a more accurate value for the TSC that +* does not include the time taken for emulation of the L2->L1 +* VM-exit in L0, use the more accurate value. +*/ +if (msr_index ==MSR_IA32_TSC ) { +int index =vmx_find_msr_index (&vmx->msr_autostore.guest, +MSR_IA32_TSC ); + +if (index >=0 ) { +u64 val = vmx->msr_autostore.guest.val[index].value; + + *data =kvm_read_l1_tsc (vcpu, val); +return true; + } + } + +if (kvm_get_msr (vcpu, msr_index, data)) { +pr_debug_ratelimited ("%s cannot read MSR (0x%x)\n" , __func__, + msr_index); +return false; + } +return true; +} +static bool read_and_check_msr_entry (struct kvm_vcpu *vcpu,u64 gpa,int i,struct vmx_msr_entry *e) {
@@ -963,12 +994,9 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)if (!read_and_check_msr_entry (vcpu, gpa, i, &e))return -EINVAL ; -if (kvm_get_msr (vcpu, e.index, &data)) { -pr_debug_ratelimited ( -"%s cannot read MSR (%u, 0x%x)\n" , - __func__, i, e.index); +if (!nested_vmx_get_vmexit_msr_value (vcpu, e.index, &data))return -EINVAL ; - } + if (kvm_vcpu_write_guest(vcpu, gpa + i * sizeof(e) + offsetof(struct vmx_msr_entry, value),
@@ -982,12 +1010,58 @@ static int nested_vmx_store_msr(struct kvm_vcpu *vcpu, u64 gpa, u32 count)return 0 ; } -static void prepare_vmx_msr_autostore_list (struct kvm_vcpu *vcpu) +static bool nested_msr_store_list_has_msr (struct kvm_vcpu *vcpu,u32 msr_index) +{ +struct vmcs12 *vmcs12 =get_vmcs12 (vcpu); +u32 count = vmcs12->vm_exit_msr_store_count; +u64 gpa = vmcs12->vm_exit_msr_store_addr; +struct vmx_msr_entry e; +u32 i; + +for (i =0 ; i < count; i++) { +if (!read_and_check_msr_entry (vcpu, gpa, i, &e)) +return false; + +if (e.index == msr_index) +return true; + } +return false; +} + +static void prepare_vmx_msr_autostore_list (struct kvm_vcpu *vcpu, +u32 msr_index) {struct vcpu_vmx *vmx =to_vmx (vcpu);struct vmx_msrs *autostore = &vmx->msr_autostore.guest; +bool in_vmcs12_store_list; +int msr_autostore_index; +bool in_autostore_list; +int last; - autostore->nr =0 ; + msr_autostore_index =vmx_find_msr_index (autostore, msr_index); + in_autostore_list = msr_autostore_index >=0 ; + in_vmcs12_store_list =nested_msr_store_list_has_msr (vcpu, msr_index); + +if (in_vmcs12_store_list && !in_autostore_list) { +if (autostore->nr ==NR_LOADSTORE_MSRS ) { +/* +* Emulated VMEntry does not fail here. Instead a less +* accurate value will be returned by +* nested_vmx_get_vmexit_msr_value() using kvm_get_msr() +* instead of reading the value from the vmcs02 VMExit +* MSR-store area. +*/ +pr_warn_ratelimited ( +"Not enough msr entries in msr_autostore. Can't add msr %x\n" , + msr_index); +return ; + } + last = autostore->nr++; + autostore->val[last].index = msr_index; + }else if (!in_vmcs12_store_list && in_autostore_list) { + last = --autostore->nr; + autostore->val[msr_autostore_index] = autostore->val[last]; + } }static bool nested_cr3_valid (struct kvm_vcpu *vcpu,unsigned long val)
arch/x86/kvm/vmx/vmx.c +1 -1
@@ -835,7 +835,7 @@ static void clear_atomic_switch_msr_special(struct vcpu_vmx *vmx,vm_exit_controls_clearbit (vmx, exit); } -static int vmx_find_msr_index (struct vmx_msrs *m,u32 msr) +int vmx_find_msr_index (struct vmx_msrs *m,u32 msr) {unsigned int i;
arch/x86/kvm/vmx/vmx.h +1 -0
@@ -338,6 +338,7 @@ void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu);struct shared_msr_entry *find_msr_entry (struct vcpu_vmx *vmx,u32 msr);void pt_update_intercept_for_msr (struct vcpu_vmx *vmx);void vmx_update_host_rsp (struct vcpu_vmx *vmx,unsigned long host_rsp); +int vmx_find_msr_index (struct vmx_msrs *m,u32 msr);#define POSTED_INTR_ON 0#define POSTED_INTR_SN 1
Signature · 1 line
2.24.0.432.g9d3f5f5b63-goog