Atomic switch of MSR_IA32_UMWAIT_CONTROL
PATCH RESEND 1/1 Atomic switch of MSR_IA32_UMWAIT_CONTROL
cc'ing KVM and LKML this time...
Why does KVM use the atomic load/store lists to load MSR_IA32_UMWAIT_CONTROL on VM-Enter/VM-Exit? Unless the host kernel is doing UWMAIT, which it really shouldn't and AFAICT doesn't, isn't it better to use the shared MSR mechanism to load the host value only when returning to userspace, and reload the guest value on demand?
Paolo Bonzini
maintainerQuoted 7 lines · Sean Christopherson
cc'ing KVM and LKML this time...
Why does KVM use the atomic load/store lists to load
MSR_IA32_UMWAIT_CONTROLon VM-Enter/VM-Exit? Unless the host kernel is doing UWMAIT, which it really shouldn't and AFAICT doesn't, isn't it better to use the shared MSR mechanism to load the host value only when returning to userspace, and reload the guest value on demand?
Just laziness I guess.
Paolo
Paolo Bonzini
maintainerQuoted 8 lines · Sean Christopherson
cc'ing KVM and LKML this time...
Why does KVM use the atomic load/store lists to load
MSR_IA32_UMWAIT_CONTROLon VM-Enter/VM-Exit? Unless the host kernel is doing UWMAIT, which it really shouldn't and AFAICT doesn't, isn't it better to use the shared MSR mechanism to load the host value only when returning to userspace, and reload the guest value on demand?
To clarify, laziness also on part of the reviewer, aka me.
Paolo